static int
_nvram_set(const char *name, const char *value)
{
size_t count = strlen(name) + 1;
char tmp[100], *buf = tmp;
int ret;
if ((ret = nvram_init(NULL)))
return ret;
/* Unset if value is NULL */
if (value)
count += strlen(value) + 1;
if (count > sizeof(tmp)) {
if (!(buf = malloc(count)))
return -ENOMEM;
}
if (value)
sprintf(buf, "%s=%s", name, value);
else
strcpy(buf, name);
ret = write(nvram_fd, buf, count);
if (ret < 0)
perror(PATH_DEV_NVRAM);
if (buf != tmp)
free(buf);
return (ret == count) ? 0 : ret;
}
void SysParamInit( void ) //system param init
{
char* pdst = NULL;
int iRet;
/* BEGIN: Added by wupm, 2013/3/12 */
#ifdef HONESTECH
ReadHTClassParams();
#endif
InitSystemParam();
Textout("Read Config File , UUID = [%s], MAC = [%s]",
bparam.stIEBaseParam.dwDeviceID,
bparam.stIEBaseParam.szMac );
Textout("ApiLisense = [%s]",bparam.stIEBaseParam.dwApiLisense);
nvram_init( RT2860_NVRAM );
IPCStart(); //ipc init
#ifndef NOT_READ_MAC
ReadFactoryMac(); //read mac
Textout("ReadFactoryMac, UUID = [%s], MAC = [%s]",
bparam.stIEBaseParam.dwDeviceID,
bparam.stIEBaseParam.szMac );
Textout("ApiLisense = [%s]",bparam.stIEBaseParam.dwApiLisense);
#endif
ReadRactoryID(); //read deviceid
Textout("ReadRactoryID, UUID = [%s], MAC = [%s]",
bparam.stIEBaseParam.dwDeviceID,
bparam.stIEBaseParam.szMac );
Textout("ApiLisense = [%s]",bparam.stIEBaseParam.dwApiLisense);
//ReadDnsFactory(); //read dns factory
ConfigVersion(); //config system version
DateInit();
FactoryUpdateInit();
}
char *
nvram_xfr(char *buf)
{
size_t count = strlen(buf)*2 + 1; // ham 1120
int ret;
char tmpbuf[1024];
if (nvram_fd < 0)
if ((ret = nvram_init(NULL)))
return NULL;
if (count > sizeof(tmpbuf))
return NULL;
strcpy(tmpbuf, buf);
if (!nvram_xfr_buf)
nvram_xfr_buf=(char *)malloc(1024+1);
if (!nvram_xfr_buf)
return NULL;
ret = ioctl(nvram_fd, NVRAM_MAGIC, tmpbuf);
if (ret < 0)
{
perror(PATH_DEV_NVRAM);
return NULL;
}
else
{
strcpy(nvram_xfr_buf, tmpbuf);
return nvram_xfr_buf;
}
}
int gen_config(int mode)
{
FILE *fp;
int i, ssid_num = 1;
char tx_rate[16], wmm_enable[16];
nvram_init(mode);
/*
nvram_bufset(mode, "SystemName", "RalinkAP");
nvram_bufset(mode, "ModuleName", "RT2860");
nvram_commit(mode);
*/
if (mode == RT2860_NVRAM) {
unsigned char temp[2], buf[4];
flash_read_NicConf(buf);
sprintf(temp, "%x", buf[1]);
nvram_bufset(mode, "RFICType", temp);
sprintf(temp, "%x", buf[0]&0xf0>>4);
if (atoi(temp) < atoi(nvram_bufget(mode, "HT_TxStream")))
nvram_bufset(mode, "HT_TxStream", temp);
nvram_bufset(mode, "TXPath", temp);
sprintf(temp, "%x", buf[0]&0x0f);
if (atoi(temp) < atoi(nvram_bufget(mode, "HT_RxStream")))
nvram_bufset(mode, "HT_RxStream", temp);
nvram_bufset(mode, "RXPath", temp);
nvram_commit(mode);
}
int ra_nv_get(int argc, char *argv[])
{
char *fz;
char *key;
char *value;
int index;
if (argc != 3 && argc != 2)
return get_usage(argv[0]);
if (argc == 2) {
fz = DEFAULT_FLASH_ZONE_NAME;
key = argv[1];
} else {
fz = argv[1];
key = argv[2];
}
if ((index = getNvramIndex(fz)) == -1) {
printf("%s: Error: \"%s\" flash zone not existed\n", argv[0], fz);
return get_usage(argv[0]);
}
nvram_init(index);
printf("%s\n", nvram_bufget(index, key));
nvram_close(index);
return 0;
}
int ra_nv_set(int argc,char **argv)
{
int index, rc;
char *fz, *key, *value;
if (argc == 1 || argc > 5)
return set_usage(argv[0]);
if (argc == 2) {
fz = DEFAULT_FLASH_ZONE_NAME;
key = argv[1];
value = "";
} else if (argc == 3) {
fz = DEFAULT_FLASH_ZONE_NAME;
key = argv[1];
value = argv[2];
} else if (argc == 4) {
fz = argv[1];
key = argv[2];
value = argv[3];
}
if ((index = getNvramIndex(fz)) == -1) {
printf("%s: Error: \"%s\" flash zone not existed\n", argv[0], fz);
return set_usage(argv[0]);
}
nvram_init(index);
rc = nvram_set(index, key, value);
nvram_close(index);
return rc;
}
void attach_share_memory()
{
int shmid;
/*create share memory*/
shmid=shmget((key_t)NVRAMKEY,(size_t)SHARESIZE,IPC_CREAT|IPC_EXCL|0666);
if(shmid==-1)
{
// perror("shmget 1");
if ((shmid=shmget((key_t)NVRAMKEY,(size_t)SHARESIZE,0666))==-1)
perror ("attach_share_memory failed, shmid is -1");
}
pointer=shmat(shmid,(void *)0, 0);
shm_flag=0;
ptr_start=pointer;
/*set semaphore*/
if ((sem_id = semget(NVRAMKEY, 1, IPC_CREAT | 0666)) == -1)
{
perror("semget error");
}
/*set semaphore*/
if ((sem_id_realloc = semget(NVRAMKEY+1, 1, IPC_CREAT | 0666)) == -1)
{
perror("semget error");
}
nvram_init();
}
int nvram_show(int mode)
{
char *buffer, *p;
int rc;
int crc;
unsigned int len = 0x4000;
nvram_init(mode);
len = getNvramBlockSize(mode);
buffer = malloc(len);
if (buffer == NULL) {
fprintf(stderr, "nvram_show: Can not allocate memory!\n");
return -1;
}
flash_read(buffer, getNvramOffset(mode), len);
memcpy(&crc, buffer, 4);
fprintf(stderr, "crc = %x\n", crc);
p = buffer + 4;
while (*p != '\0') {
printf("%s\n", p);
p += strlen(p) + 1;
}
free(buffer);
return 0;
}
int bcm47xx_nvram_getenv(char *name, char *val, size_t val_len)
{
char *var, *value, *end, *eq;
int err;
if (!name)
return -EINVAL;
if (!nvram_buf[0]) {
err = nvram_init();
if (err)
return err;
}
/* Look for name=value and return value */
var = &nvram_buf[sizeof(struct nvram_header)];
end = nvram_buf + sizeof(nvram_buf) - 2;
end[0] = end[1] = '\0';
for (; *var; var = value + strlen(value) + 1) {
eq = strchr(var, '=');
if (!eq)
break;
value = eq + 1;
if ((eq - var) == strlen(name) &&
strncmp(var, name, (eq - var)) == 0) {
return snprintf(val, val_len, "%s", value);
}
}
return -ENOENT;
}
/**
* Reset ST emulator states, chips, interrupts and registers.
* Return zero or negative TOS image load error code.
*/
static const char* Reset_ST(bool bCold)
{
if (bCold)
{
const char* error_str;
error_str=memory_init(ConfigureParams.Memory.nMemoryBankSize);
if (error_str!=NULL) {
return error_str;
}
}
CycInt_Reset(); /* Reset interrupts */
Video_Reset(); /* Reset video */
TMC_Reset(); /* Reset TMC Registers */
SCR_Reset(); /* Reset System Control Registers */
nvram_init(); /* Reset NVRAM */
SCSI_Reset(); /* Reset SCSI disks */
MO_Reset(); /* Reset MO disks */
Floppy_Reset(); /* Reset Floppy disks */
SCC_Reset(2); /* Reset SCC */
Ethernet_Reset(true); /* Reset Ethernet */
Sound_Reset(); /* Reset Sound */
Screen_Reset(); /* Reset screen */
DSP_Reset(); /* Reset DSP */
M68000_Reset(bCold); /* Reset CPU */
DebugCpu_SetDebugging(); /* Re-set debugging flag if needed */
return NULL;
}
int nvram_commit(void)
{
if (nvram_match("flash_active", "1")) {
fprintf(stderr, "not allowed, flash process in progress");
exit(1);
}
#if defined(HAVE_WZRHPG300NH) || defined(HAVE_WHRHPGN) || defined(HAVE_WZRHPAG300NH) || defined(HAVE_DIR825) || defined(HAVE_TEW632BRP) || defined(HAVE_TG2521) || defined(HAVE_WR1043) || defined(HAVE_WRT400) || defined(HAVE_WZRHPAG300NH) || defined(HAVE_WZRG450) || defined(HAVE_DANUBE) || defined(HAVE_WR741)
system("/sbin/ledtool 1");
#elif HAVE_LSX
//nothing
#else
system("/sbin/ledtool 1");
#endif
lock();
int ret;
if (nvram_fd < 0) {
if ((ret = nvram_init(NULL))) {
fprintf(stderr, "nvram_commit(): failed\n");
unlock();
return ret;
}
}
ret = ioctl(nvram_fd, NVRAM_MAGIC, NULL);
if (ret < 0) {
fprintf(stderr, "nvram_commit(): failed\n");
perror(PATH_DEV_NVRAM);
}
unlock();
sync();
return ret;
}
int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len)
{
char *var, *value, *end, *eq;
int err;
if (!name)
return -EINVAL;
if (!nvram_len) {
err = nvram_init();
if (err)
return err;
}
/* Look for name=value and return value */
var = &nvram_buf[sizeof(struct nvram_header)];
end = nvram_buf + sizeof(nvram_buf);
while (var < end && *var) {
eq = strchr(var, '=');
if (!eq)
break;
value = eq + 1;
if (eq - var == strlen(name) &&
strncmp(var, name, eq - var) == 0)
return snprintf(val, val_len, "%s", value);
var = value + strlen(value) + 1;
}
return -ENOENT;
}
char *
nvram_get(const char *name)
{
char tmp[NVRAM_MAX_VALUE_LEN], *value;
char *off = tmp;
size_t count = sizeof(tmp);
int ret=0;
if (nvram_fd < 0)
if (nvram_init(NULL)){
DEBUG_MSG("%s: nvram_init fail\n",__func__);
return NULL;
}
DEBUG_MSG("%s: nvram_fd=%d\n",__func__,nvram_fd);
/* Get offset into mmap() space */
strcpy(off, name);
DEBUG_MSG("%s: name=%s,count=%d\n",__func__,name,count);
count = read(nvram_fd, off, count);
DEBUG_MSG("%s: off=%s,count=%x\n",__func__,off,count);
if (count == strlen(off)){
value = off;
DEBUG_MSG("%s: value=%s\n",__func__,value);
}
else{
value = NULL;
DEBUG_MSG("%s: value=NULL\n",__func__);
}
if (count < 0)
perror(PATH_DEV_NVRAM);
return value;
}
static void QoSSetup(webs_t wp, char_t *path, char_t *query)
{
char *submitUrl;
char_t *QoS_type = websGetVar(wp, T("QoSSelect"), T("0"));
if (QoS_type == NULL)
QoS_type = "0";
char_t *simpleqos = websGetVar(wp, T("simple_qos"), T("0"));
if (strcmp(simpleqos, "on") != 0)
simpleqos = "off";
simpleqos = (strcmp(simpleqos, "on") == 0) ? "1" : "0";
nvram_init(RT2860_NVRAM);
nvram_bufset(RT2860_NVRAM, "QoSEnable", QoS_type);
nvram_bufset(RT2860_NVRAM, "simple_qos", simpleqos);
if (CHK_IF_DIGIT(QoS_type, 2))
setupParameters(wp, QoS_args, 0);
nvram_close(RT2860_NVRAM);
doSystem("service shaper restart && service iptables restart && service kext restart");
submitUrl = websGetVar(wp, T("submit-url"), T("")); // hidden page
#ifdef PRINT_DEBUG
if (!submitUrl || !submitUrl[0])
websDone(wp, 200);
else
#endif
websRedirect(wp, submitUrl);
}
static int
_nvram_set(const char *name, const char *value)
{
size_t count = strlen(name) + 1;
char tmp[NVRAM_MAX_PARAM_LEN+NVRAM_MAX_VALUE_LEN], *buf = tmp;
int ret=0;
if (nvram_fd < 0)
if ((ret = nvram_init(NULL))){
DEBUG_MSG("%s: nvram_init fail\n",__func__);
return ret;
}
DEBUG_MSG("%s: nvram_fd=%d\n",__func__,nvram_fd);
/* Unset if value is NULL */
if (value)
count += strlen(value) + 1;
if (count > sizeof(tmp)) {
DEBUG_MSG("%s: size over fail\n",__func__);
return -ENOMEM;
}
if (value)
sprintf(buf, "%s=%s", name, value);
else
strcpy(buf, name);
DEBUG_MSG("%s: write=%s\n",__func__,buf);
ret = write(nvram_fd, buf, count);
if (ret < 0)
perror(PATH_DEV_NVRAM);
return (ret == count) ? 0 : ret;
}
char *
nvram_get(const char *name)
{
size_t count = strlen(name) + 1;
char tmp[100], *value;
unsigned long *off = (unsigned long *) tmp;
if (nvram_init(NULL))
return NULL;
if (count > sizeof(tmp)) {
if (!(off = malloc(count)))
return NULL;
}
/* Get offset into mmap() space */
strcpy((char *) off, name);
count = read(nvram_fd, off, count);
if (count == sizeof(unsigned long))
value = &nvram_buf[*off];
else
value = NULL;
if (count < 0)
perror(PATH_DEV_NVRAM);
if (off != (unsigned long *) tmp)
free(off);
return value;
}
int
nvram_getall(char *buf, int count)
{
int ret;
if (nvram_fd < 0)
if ((ret = nvram_init(NULL))){
DEBUG_MSG("%s: nvram_init fail\n",__func__);
return ret;
}
DEBUG_MSG("%s: nvram_fd=%d\n",__func__,nvram_fd);
if (count == 0){
DEBUG_MSG("%s: count fail\n",__func__);
return 0;
}
/* Get all variables */
*buf = '\0';
DEBUG_MSG("%s: count=%x\n",__func__,count);
ret = read(nvram_fd, buf, count);
if (ret < 0)
perror(PATH_DEV_NVRAM);
#ifdef NVRAM_DEBUG
{
char *name;
for (name = buf; *name; name += strlen(name) + 1)
puts(name);
}
#endif
DEBUG_MSG("%s: ret=%x,count=%x\n",__func__,ret,count);
return (ret == count) ? 0 : ret;
}
int
nvram_commit(void)
{
int ret;
FILE *fp;
if (nvram_get(ASUS_STOP_COMMIT) != NULL)
{
cprintf("# skip nvram commit #\n");
return ret;
}
fp = fopen("/var/log/commit_ret", "w");
if ((ret = nvram_init(NULL)))
return ret;
ret = ioctl(nvram_fd, NVRAM_MAGIC, NULL);
if (ret < 0)
perror(PATH_DEV_NVRAM);
else {
if(fp!=NULL)
fprintf(fp,"commit: OK\n");
}
fclose(fp);
return ret;
}
int nvram_getall(char *buf, int count)
{
//lock();
int ret;
if (nvram_fd < 0) {
#ifdef HAVE_X86
FILE *in = fopen("/usr/local/nvram/nvram.bin", "rb");
if (in == NULL)
return 0;
fclose(in);
#endif
if ((ret = nvram_init(NULL))) {
//unlock();
return ret;
}
}
if (count == 0) {
//unlock();
return 0;
}
/* Get all variables */
*buf = '\0';
ret = read(nvram_fd, buf, count);
if (ret < 0)
perror(PATH_DEV_NVRAM);
//unlock();
return (ret == count) ? 0 : ret;
}
/*
* Set Default should be done by nvram_daemon.
* We check the pid file's existence.
*/
int setDefault(void)
{
FILE *fp;
int i;
//retry 15 times (15 seconds)
for (i = 0; i < 15; i++) {
fp = fopen("/var/run/nvramd.pid", "r");
if (fp == NULL) {
if (i == 0)
trace(0, T("goahead: waiting for nvram_daemon "));
else
trace(0, T(". "));
}
else {
fclose(fp);
#if defined (RT2860_MBSS_SUPPORT)
int max_bss_num = 8;
int bssidnum = strtol(nvram_get(RT2860_NVRAM, "BssidNum"), NULL, 10);
char newBssidNum[3];
#if defined (RT2860_NEW_MBSS_SUPPORT)
max_bss_num = 16;
#endif
#ifdef CONFIG_RT2860V2_AP_MESH
max_bss_num--;
#endif
#if defined (RT2860_APCLI_SUPPORT)
max_bss_num--;
#endif
if (bssidnum > max_bss_num)
bssidnum = max_bss_num;
sprintf(newBssidNum, "%d", bssidnum);
nvram_set(RT2860_NVRAM, "BssidNum", newBssidNum);
#endif
nvram_init(RT2860_NVRAM);
#if defined (RTDEV_SUPPORT) || defined (CONFIG_RT2561_AP) || defined (CONFIG_RT2561_AP_MODULE)
nvram_init(RTDEV_NVRAM);
#endif
return 0;
}
Sleep(1);
}
error(E_L, E_LOG, T("goahead: please execute nvram_daemon first!"));
return (-1);
}
int nvram_get_nvramspace()
{
if (nvram_fd < 0)
if (nvram_init(NULL)){
DEBUG_MSG("%s: nvram_init fail\n",__func__);
return -1;
}
return NVRAM_SPACE;
}
ulg
decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p)
{
output_data = (uch *) output_start;
free_mem_ptr = free_mem_ptr_p;
free_mem_ptr_end = free_mem_ptr_end_p;
disable_watchdog();
arch_decomp_setup();
/* initialize clock */
HAL_CLOCK_INITIALIZE(RTC_PERIOD);
printf("MicroRedBoot v1.4, (c) 2009 DD-WRT.COM (%s REVISION %s)\n", __DATE__,SVN_REVISION);
printf("keep the reset button pushed to enter redboot!\n");
printf("CPU Type: Atheros AR%s\n",get_system_type());
printf("CPU Clock: %dMhz\n", cpu_frequency() / 1000000);
nvram_init();
char *ddboard = nvram_get("DD_BOARD");
if (ddboard)
printf("Board: %s\n", ddboard);
char *resetbutton = nvram_get("resetbutton_enable");
if (resetbutton && !strcmp(resetbutton, "0"))
puts("reset button manual override detected! (nvram var resetbutton_enable=0)\n");
if (resetTouched() || (resetbutton && !strcmp(resetbutton, "0"))) {
puts("Reset Button triggered\nBooting Recovery RedBoot\n");
int count = 5;
while (count--) {
if (!resetTouched()) // check if reset button is unpressed again
break;
udelay(1000000);
}
if (count <= 0) {
puts("reset button 5 seconds pushed, erasing nvram\n");
if (!flashdetect())
flash_erase_nvram(flashsize, NVRAM_SPACE);
}
bootoffset = 0x800004bc;
resettrigger = 0;
puts("loading");
lzma_unzip();
puts("\n\n\n");
return output_ptr;
} else {
flashdetect();
linuxaddr = getLinux();
puts("Booting Linux\n");
resettrigger = 1;
/* important, enable ethernet bus, if the following lines are not initialized linux will not be able to use the ethernet mac, taken from redboot source */
enable_ethernet();
puts("loading");
lzma_unzip();
set_cmdline();
}
}
int gp_init() {
if(common_init()) return -1; //armv6 works.
if(cmd_init()) return -1;
if(memory_init()) return -1;
if(task_init()) return -1;
if(bdev_init()) return -1;
if(image_init()) return -1;
if(nvram_init()) return -1;
if(fs_init()) return -1;
if(fb_init()) return -1;
gGpHasInit = TRUE;
return 0;
}
/*
* main()
* Startup of the "nvram" server
*/
int
main(void)
{
/*
* Initialize syslog
*/
openlog("nvram", LOG_PID, LOG_DAEMON);
/*
* Allocate handle->file hash table. 16 is just a guess
* as to what we'll have to handle.
*/
filehash = hash_alloc(16);
if (filehash == 0) {
syslog(LOG_ERR, "unable to allocate file hash");
exit(1);
}
/*
* Enable I/O for the NVRAM index and data ports
*/
if (enable_io(RTCSEL, RTCDATA) < 0) {
syslog(LOG_ERR, "unable to get I/O permissions");
exit(1);
}
/*
* Initialise the server parameters for the NVRAM - basically find out
* how many bytes of data we can support
*/
nvram_init();
/*
* Get a port for the NVRAM server
*/
nvram_port = msg_port((port_name)0, &nvram_name);
/*
* Register the device name with the namer
*/
if (namer_register("srv/nvram", nvram_name) < 0) {
syslog(LOG_ERR, "can't register name");
exit(1);
}
/*
* Start serving requests for the filesystem
*/
nvram_main();
return(0);
}
int nvram_getall(char *buf, int count)
{
int r;
if (count <= 0) return 0;
*buf = 0;
if (nvram_fd < 0) {
if ((r = nvram_init(NULL)) != 0) return r;
}
r = read(nvram_fd, buf, count);
if (r < 0) perror(PATH_DEV_NVRAM);
return (r == count) ? 0 : r;
}
char *nvram_get(const char *name)
{
//lock();
size_t count = strlen(name) + 1;
char tmp[100], *value;
unsigned long *off = (unsigned long *)tmp;
if (nvram_fd < 0) {
#ifdef HAVE_X86
FILE *in = fopen("/usr/local/nvram/nvram.bin", "rb");
if (in == NULL)
return NULL;
fclose(in);
#endif
if (nvram_init(NULL)) {
//unlock();
return NULL;
}
}
if (count > sizeof(tmp)) {
if (!(off = malloc(count))) {
//unlock();
return NULL;
}
}
/* Get offset into mmap() space */
strcpy((char *)off, name);
count = read(nvram_fd, off, count);
if (count == sizeof(unsigned long))
value = &nvram_buf[*off];
else
value = NULL;
#ifndef HAVE_MICRO
if (value)
msync(nvram_buf, NVRAM_SPACE, MS_INVALIDATE);
#endif
if (count < 0)
perror(PATH_DEV_NVRAM);
if (off != (unsigned long *)tmp)
free(off);
//unlock();
return value;
}
/*
* board_console_init()
*
* Add the console device and set it to be the primary
* console.
*
* Input parameters:
* nothing
*
* Return value:
* nothing
*/
void
board_console_init(void)
{
#if !CFG_MINIMAL_SIZE
cfe_set_console(CFE_BUFFER_CONSOLE);
#endif
/* Initialize SB access */
sih = si_kattach(SI_OSH);
ASSERT(sih);
/* Set this to a default value, since nvram_reset needs to use it in OSL_DELAY */
board_cfe_cpu_speed_upd(sih);
#if !CFG_SIM
board_pinmux_init(sih);
/* Check whether NVRAM reset needs be done */
if (nvram_reset((void *)sih) > 0)
restore_defaults = 1;
#endif
/*
* init gpio mode for leds and reset button
*/
recovery_button_init();
leds_gpio_init();
/* Initialize NVRAM access accordingly. In case of invalid NVRAM, load defaults */
if (nvram_init((void *)sih) > 0)
restore_defaults = 1;
#if CFG_SIM
restore_defaults = 0;
#else /* !CFG_SIM */
if (!restore_defaults)
board_clock_init(sih);
board_power_init(sih);
#endif /* !CFG_SIM */
board_cpu_init(sih);
/* Initialize UARTs */
si_serial_init(sih, board_console_add);
if (cfe_finddev("uart0"))
cfe_set_console("uart0");
}
int main(void)
{
uint32_t pos, len;
board_init();
nvram_init();
LED_On(LED0);
printk("Writing firmware data to flash\n");
pos = 0;
while (pos < fw_len) {
if (fw_len - pos > SECTOR_SIZE)
len = SECTOR_SIZE;
else
len = fw_len - pos;
nvram_write(pos, fw_buf + pos, len);
pos += len;
}
LED_Off(LED0);
printk("Verifying firmware data\n");
pos = 0;
while (pos < fw_len) {
static uint8_t page_buf[SECTOR_SIZE];
uint32_t i;
if (fw_len - pos > SECTOR_SIZE)
len = SECTOR_SIZE;
else
len = fw_len - pos;
nvram_read(pos, page_buf, len);
for (i = 0; i < len; i++)
if (*(page_buf + i) != *(fw_buf + pos + i)) {
printk("Verify failed at byte %d, 0x%02x != 0x%02x\n",
pos + i, *(page_buf + i), *(fw_buf + pos + i));
return 0;
}
pos += len;
}
LED_On(LED0);
printk("Firmware successfully stored in flash!\n");
return 0;
}
int
nvram_commit(void)
{
int ret;
if ((ret = nvram_init(NULL)))
return ret;
ret = ioctl(nvram_fd, NVRAM_MAGIC, NULL);
if (ret < 0)
perror(PATH_DEV_NVRAM);
return ret;
}
/*
* board_console_init()
*
* Add the console device and set it to be the primary
* console.
*
* Input parameters:
* nothing
*
* Return value:
* nothing
*/
void
board_console_init(void)
{
#if !CFG_MINIMAL_SIZE
cfe_set_console(CFE_BUFFER_CONSOLE);
#endif
/* Initialize SB access */
sih = si_kattach(SI_OSH);
ASSERT(sih);
/* Set this to a default value, since nvram_reset needs to use it in OSL_DELAY */
board_cfe_cpu_speed_upd(sih);
#if !CFG_SIM
board_pinmux_init(sih);
/* Check whether NVRAM reset needs be done */
if (nvram_reset((void *)sih) > 0)
restore_defaults = 1;
#endif
/* Initialize NVRAM access accordingly. In case of invalid NVRAM, load defaults */
if (nvram_init((void *)sih) > 0)
restore_defaults = 1;
#if CFG_SIM
restore_defaults = 0;
#else /* !CFG_SIM */
if (!restore_defaults)
board_clock_init(sih);
board_power_init(sih);
#endif /* !CFG_SIM */
board_cpu_init(sih);
/* Initialize UARTs */
si_serial_init(sih, board_console_add);
if (cfe_finddev("uart0"))
cfe_set_console("uart0");
printf("Detect CPU turbo button... ");
detect_turbo_button();
if (cpu_turbo_mode && atoi(nvram_safe_get("btn_led_mode")))
board_clock_init(sih);
}
