static void __init ocotea_setup_arch(void) { ocotea_set_emacdata(); ibm440gx_tah_enable(); /* * Determine various clocks. * To be completely correct we should get SysClk * from FPGA, because it can be changed by on-board switches * --ebs */ ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); ocp_sys_info.opb_bus_freq = clocks.opb; /* Setup TODC access */ TODC_INIT(TODC_TYPE_DS1743, 0, 0, ioremap64(OCOTEA_RTC_ADDR, OCOTEA_RTC_SIZE), 8); /* init to some ~sane value until calibrate_delay() runs */ loops_per_jiffy = 50000000/HZ; /* Setup PCI host bridge */ ocotea_setup_hose(); #ifdef CONFIG_BLK_DEV_INITRD if (initrd_start) ROOT_DEV = Root_RAM0; else #endif #ifdef CONFIG_ROOT_NFS ROOT_DEV = Root_NFS; #else ROOT_DEV = Root_HDA1; #endif ocotea_early_serial_map(); /* Identify the system */ printk("IBM Ocotea port (MontaVista Software, Inc. <*****@*****.**>)\n"); }
static void __init ocotea_setup_arch(void) { ocotea_set_emacdata(); ibm440gx_tah_enable(); /* Setup TODC access */ TODC_INIT(TODC_TYPE_DS1743, 0, 0, ioremap64(OCOTEA_RTC_ADDR, OCOTEA_RTC_SIZE), 8); /* init to some ~sane value until calibrate_delay() runs */ loops_per_jiffy = 50000000/HZ; /* Setup PCI host bridge */ ocotea_setup_hose(); #ifdef CONFIG_BLK_DEV_INITRD if (initrd_start) ROOT_DEV = Root_RAM0; else #endif #ifdef CONFIG_ROOT_NFS ROOT_DEV = Root_NFS; #else ROOT_DEV = Root_HDA1; #endif ocotea_early_serial_map(); /* Identify the system */ printk("IBM Ocotea port (MontaVista Software, Inc. <*****@*****.**>)\n"); }