static int
rtaspci_attach(device_t dev)
{
struct rtaspci_softc *sc;
sc = device_get_softc(dev);
sc->read_pci_config = rtas_token_lookup("read-pci-config");
sc->write_pci_config = rtas_token_lookup("write-pci-config");
sc->ex_read_pci_config = rtas_token_lookup("ibm,read-pci-config");
sc->ex_write_pci_config = rtas_token_lookup("ibm,write-pci-config");
sc->sc_extended_config = 0;
OF_getprop(ofw_bus_get_node(dev), "ibm,pci-config-space-type",
&sc->sc_extended_config, sizeof(sc->sc_extended_config));
bus_dma_tag_create(bus_get_dma_tag(dev),
1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
NULL, NULL, BUS_SPACE_MAXSIZE, BUS_SPACE_UNRESTRICTED,
BUS_SPACE_MAXSIZE, 0, NULL, NULL, &sc->dma_tag);
#ifdef __powerpc64__
if (!(mfmsr() & PSL_HV))
phyp_iommu_set_dma_tag(dev, dev, sc->dma_tag);
#endif
return (ofw_pci_attach(dev));
}
static int
grackle_attach(device_t dev)
{
struct grackle_softc *sc;
sc = device_get_softc(dev);
/*
* The Grackle PCI config addr/data registers are actually in
* PCI space, but since they are needed to actually probe the
* PCI bus, use the fact that they are also available directly
* on the processor bus and map them
*/
sc->sc_addr = (vm_offset_t)pmap_mapdev(GRACKLE_ADDR, PAGE_SIZE);
sc->sc_data = (vm_offset_t)pmap_mapdev(GRACKLE_DATA, PAGE_SIZE);
return (ofw_pci_attach(dev));
}
static int
rtaspci_attach(device_t dev)
{
struct rtaspci_softc *sc;
sc = device_get_softc(dev);
sc->read_pci_config = rtas_token_lookup("read-pci-config");
sc->write_pci_config = rtas_token_lookup("write-pci-config");
sc->ex_read_pci_config = rtas_token_lookup("ibm,read-pci-config");
sc->ex_write_pci_config = rtas_token_lookup("ibm,write-pci-config");
sc->sc_extended_config = 0;
OF_getprop(ofw_bus_get_node(dev), "ibm,pci-config-space-type",
&sc->sc_extended_config, sizeof(sc->sc_extended_config));
return (ofw_pci_attach(dev));
}
static int
uninorth_attach(device_t dev)
{
struct uninorth_softc *sc;
const char *compatible;
phandle_t node;
uint32_t reg[3];
uint64_t regbase;
cell_t acells;
node = ofw_bus_get_node(dev);
sc = device_get_softc(dev);
if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
return (ENXIO);
sc->sc_ver = 0;
compatible = ofw_bus_get_compat(dev);
if (strcmp(compatible, "u3-agp") == 0)
sc->sc_ver = 3;
if (strcmp(compatible, "u4-pcie") == 0)
sc->sc_ver = 4;
acells = 1;
OF_getprop(OF_parent(node), "#address-cells", &acells, sizeof(acells));
regbase = reg[0];
if (acells == 2) {
regbase <<= 32;
regbase |= reg[1];
}
sc->sc_addr = (vm_offset_t)pmap_mapdev(regbase + 0x800000, PAGE_SIZE);
sc->sc_data = (vm_offset_t)pmap_mapdev(regbase + 0xc00000, PAGE_SIZE);
return (ofw_pci_attach(dev));
}
