static inline void cpu_clear_prev_logic_pwrst(unsigned int cpu_id) { u32 reg; if (cpu_id) { reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU1_INST, OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET); omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU1_INST, OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET); } else { reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU0_INST, OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET); omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU0_INST, OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET); } }
static inline void cpu_clear_prev_logic_pwrst(unsigned int cpu_id) { u32 reg; if (cpu_id) { reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU1_INST, cpu_context_offset); omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU1_INST, cpu_context_offset); } else { reg = omap4_prcm_mpu_read_inst_reg(OMAP4430_PRCM_MPU_CPU0_INST, cpu_context_offset); omap4_prcm_mpu_write_inst_reg(reg, OMAP4430_PRCM_MPU_CPU0_INST, cpu_context_offset); } }
u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) { u32 v; v = omap4_prcm_mpu_read_inst_reg(inst, reg); v &= ~mask; v |= bits; omap4_prcm_mpu_write_inst_reg(v, inst, reg); return v; }
/* * Enable Mercury Fast HG retention mode by default. */ static void enable_mercury_retention_mode(void) { u32 reg; reg = omap4_prcm_mpu_read_inst_reg(OMAP54XX_PRCM_MPU_DEVICE_INST, OMAP54XX_PRCM_MPU_PRM_PSCON_COUNT_OFFSET); /* Enable HG_EN, HG_RAMPUP = fast mode */ reg |= BIT(24) | BIT(25); omap4_prcm_mpu_write_inst_reg(reg, OMAP54XX_PRCM_MPU_DEVICE_INST, OMAP54XX_PRCM_MPU_PRM_PSCON_COUNT_OFFSET); }