static void __init osk_init(void) { /* Workaround for wrong CS3 (NOR flash) timing * There are some U-Boot versions out there which configure * wrong CS3 memory timings. This mainly leads to CRC * or similar errors if you use NOR flash (e.g. with JFFS2) */ if (EMIFS_CCS(3) != EMIFS_CS3_VAL) EMIFS_CCS(3) = EMIFS_CS3_VAL; osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys(); osk_flash_resource.end += SZ_32M - 1; platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices)); omap_board_config = osk_config; omap_board_config_size = ARRAY_SIZE(osk_config); USB_TRANSCEIVER_CTRL_REG |= (3 << 1); /* irq for tps65010 chip */ /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */ if (gpio_request(OMAP_MPUIO(1), "tps65010") == 0) gpio_direction_input(OMAP_MPUIO(1)); omap_serial_init(); omap_register_i2c_bus(1, 400, osk_i2c_board_info, ARRAY_SIZE(osk_i2c_board_info)); osk_mistral_init(); }
static void __init h3_init(void) { /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. * * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND * (which on H2 may be 16bit) on CS3. Try detecting that in code here, * to avoid probing every possible flash configuration... */ nor_resource.end = nor_resource.start = omap_cs3_phys(); nor_resource.end += SZ_32M - 1; nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; nand_resource.end += SZ_4K - 1; if (gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); nand_data.dev_ready = nand_dev_ready; /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ omap_cfg_reg(V2_1710_GPIO10); platform_add_devices(devices, ARRAY_SIZE(devices)); spi_register_board_info(h3_spi_board_info, ARRAY_SIZE(h3_spi_board_info)); omap_board_config = h3_config; omap_board_config_size = ARRAY_SIZE(h3_config); omap_serial_init(); omap_register_i2c_bus(1, 100, h3_i2c_board_info, ARRAY_SIZE(h3_i2c_board_info)); h3_mmc_init(); }
static void __init h2_init(void) { /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. * * FIXME revC boards (and H3) support NAND-boot, with a dip switch to * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try * detecting that in code here, to avoid probing every possible flash * configuration... */ h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys(); h2_nor_resource.end += SZ_32M - 1; omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); /* MMC: card detect and WP */ // omap_cfg_reg(U19_ARMIO1); /* CD */ omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ /* Irda */ #if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE) omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A); if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) { omap_set_gpio_direction(H2_IRDA_FIRSEL_GPIO_PIN, 0); h2_irda_data.transceiver_mode = h2_transceiver_mode; } #endif platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); omap_board_config = h2_config; omap_board_config_size = ARRAY_SIZE(h2_config); omap_serial_init(); }
static void __init h2_init(void) { h2_init_smc91x(); /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. * * FIXME revC boards (and H3) support NAND-boot, with a dip switch to * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try * detecting that in code here, to avoid probing every possible flash * configuration... */ h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys(); h2_nor_resource.end += SZ_32M - 1; h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS; h2_nand_resource.end += SZ_4K - 1; if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); gpio_direction_input(H2_NAND_RB_GPIO_PIN); omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); /* MMC: card detect and WP */ /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ /* Mux pins for keypad */ omap_cfg_reg(F18_1610_KBC0); omap_cfg_reg(D20_1610_KBC1); omap_cfg_reg(D19_1610_KBC2); omap_cfg_reg(E18_1610_KBC3); omap_cfg_reg(C21_1610_KBC4); omap_cfg_reg(G18_1610_KBR0); omap_cfg_reg(F19_1610_KBR1); omap_cfg_reg(H14_1610_KBR2); omap_cfg_reg(E20_1610_KBR3); omap_cfg_reg(E19_1610_KBR4); omap_cfg_reg(N19_1610_KBR5); /* GPIO based LEDs */ omap_cfg_reg(P18_1610_GPIO3); omap_cfg_reg(MPUIO4); h2_smc91x_resources[1].start = gpio_to_irq(0); h2_smc91x_resources[1].end = gpio_to_irq(0); platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); omap_serial_init(); h2_i2c_board_info[0].irq = gpio_to_irq(58); h2_i2c_board_info[1].irq = gpio_to_irq(2); omap_register_i2c_bus(1, 100, h2_i2c_board_info, ARRAY_SIZE(h2_i2c_board_info)); omap1_usb_init(&h2_usb_config); h2_mmc_init(); omapfb_set_lcd_config(&h2_lcd_config); }
static void __init h3_init(void) { h3_flash_resource.end = h3_flash_resource.start = omap_cs3_phys(); h3_flash_resource.end += OMAP_CS3_SIZE - 1; (void) platform_add_devices(devices, ARRAY_SIZE(devices)); omap_board_config = h3_config; omap_board_config_size = ARRAY_SIZE(h3_config); }
static void __init h3_init(void) { h3_init_smc91x(); /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped * to address 0 by a dip switch), NAND on CS2B. The NAND driver will * notice whether a NAND chip is enabled at probe time. * * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND * (which on H2 may be 16bit) on CS3. Try detecting that in code here, * to avoid probing every possible flash configuration... */ nor_resource.end = nor_resource.start = omap_cs3_phys(); nor_resource.end += SZ_32M - 1; nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; nand_resource.end += SZ_4K - 1; BUG_ON(gpio_request(H3_NAND_RB_GPIO_PIN, "NAND ready") < 0); gpio_direction_input(H3_NAND_RB_GPIO_PIN); /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ omap_cfg_reg(V2_1710_GPIO10); /* Mux pins for keypad */ omap_cfg_reg(F18_1610_KBC0); omap_cfg_reg(D20_1610_KBC1); omap_cfg_reg(D19_1610_KBC2); omap_cfg_reg(E18_1610_KBC3); omap_cfg_reg(C21_1610_KBC4); omap_cfg_reg(G18_1610_KBR0); omap_cfg_reg(F19_1610_KBR1); omap_cfg_reg(H14_1610_KBR2); omap_cfg_reg(E20_1610_KBR3); omap_cfg_reg(E19_1610_KBR4); omap_cfg_reg(N19_1610_KBR5); /* GPIO based LEDs */ omap_cfg_reg(P18_1610_GPIO3); omap_cfg_reg(MPUIO4); smc91x_resources[1].start = gpio_to_irq(40); smc91x_resources[1].end = gpio_to_irq(40); platform_add_devices(devices, ARRAY_SIZE(devices)); h3_spi_board_info[0].irq = gpio_to_irq(H3_TS_GPIO); spi_register_board_info(h3_spi_board_info, ARRAY_SIZE(h3_spi_board_info)); omap_serial_init(); h3_i2c_board_info[1].irq = gpio_to_irq(14); omap_register_i2c_bus(1, 100, h3_i2c_board_info, ARRAY_SIZE(h3_i2c_board_info)); omap1_usb_init(&h3_usb_config); h3_mmc_init(); omapfb_set_lcd_config(&h3_lcd_config); }
static void __init osk_init(void) { osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys(); osk_flash_resource.end += SZ_32M - 1; platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices)); omap_board_config = osk_config; omap_board_config_size = ARRAY_SIZE(osk_config); USB_TRANSCEIVER_CTRL_REG |= (3 << 1); osk_mistral_init(); }
static void __init osk_init(void) { u32 l; osk_init_smc91x(); osk_init_cf(); /* Workaround for wrong CS3 (NOR flash) timing * There are some U-Boot versions out there which configure * wrong CS3 memory timings. This mainly leads to CRC * or similar errors if you use NOR flash (e.g. with JFFS2) */ l = omap_readl(EMIFS_CCS(3)); if (l != EMIFS_CS3_VAL) omap_writel(EMIFS_CS3_VAL, EMIFS_CCS(3)); osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys(); osk_flash_resource.end += SZ_32M - 1; osk5912_smc91x_resources[1].start = gpio_to_irq(0); osk5912_smc91x_resources[1].end = gpio_to_irq(0); osk5912_cf_resources[0].start = gpio_to_irq(62); osk5912_cf_resources[0].end = gpio_to_irq(62); platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices)); l = omap_readl(USB_TRANSCEIVER_CTRL); l |= (3 << 1); omap_writel(l, USB_TRANSCEIVER_CTRL); omap1_usb_init(&osk_usb_config); /* irq for tps65010 chip */ /* bootloader effectively does: omap_cfg_reg(U19_1610_MPUIO1); */ if (gpio_request(OMAP_MPUIO(1), "tps65010") == 0) gpio_direction_input(OMAP_MPUIO(1)); omap_serial_init(); osk_i2c_board_info[0].irq = gpio_to_irq(OMAP_MPUIO(1)); omap_register_i2c_bus(1, 400, osk_i2c_board_info, ARRAY_SIZE(osk_i2c_board_info)); osk_mistral_init(); #ifdef CONFIG_OMAP_OSK_MISTRAL omapfb_set_lcd_config(&osk_lcd_config); #endif }
static void __init osk_init(void) { /* Workaround for wrong CS3 (NOR flash) timing * There are some U-Boot versions out there which configure * wrong CS3 memory timings. This mainly leads to CRC * or similar errors if you use NOR flash (e.g. with JFFS2) */ if (EMIFS_CCS(3) != EMIFS_CS3_VAL) EMIFS_CCS(3) = EMIFS_CS3_VAL; osk_flash_resource.end = osk_flash_resource.start = omap_cs3_phys(); osk_flash_resource.end += SZ_32M - 1; platform_add_devices(osk5912_devices, ARRAY_SIZE(osk5912_devices)); omap_board_config = osk_config; omap_board_config_size = ARRAY_SIZE(osk_config); USB_TRANSCEIVER_CTRL_REG |= (3 << 1); omap_serial_init(); osk_mistral_init(); }
static void __init h2_init(void) { h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys(); h2_nor_resource.end += SZ_32M - 1; h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS; h2_nand_resource.end += SZ_4K - 1; if (gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0) BUG(); gpio_direction_input(H2_NAND_RB_GPIO_PIN); omap_cfg_reg(L3_1610_FLASH_CS2B_OE); omap_cfg_reg(M8_1610_FLASH_CS2B_WE); /* MMC: card detect and WP */ /* omap_cfg_reg(U19_ARMIO1); */ /* CD */ omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */ /* Mux pins for keypad */ omap_cfg_reg(F18_1610_KBC0); omap_cfg_reg(D20_1610_KBC1); omap_cfg_reg(D19_1610_KBC2); omap_cfg_reg(E18_1610_KBC3); omap_cfg_reg(C21_1610_KBC4); omap_cfg_reg(G18_1610_KBR0); omap_cfg_reg(F19_1610_KBR1); omap_cfg_reg(H14_1610_KBR2); omap_cfg_reg(E20_1610_KBR3); omap_cfg_reg(E19_1610_KBR4); omap_cfg_reg(N19_1610_KBR5); platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices)); omap_board_config = h2_config; omap_board_config_size = ARRAY_SIZE(h2_config); omap_serial_init(); omap_register_i2c_bus(1, 100, h2_i2c_board_info, ARRAY_SIZE(h2_i2c_board_info)); omap1_usb_init(&h2_usb_config); h2_mmc_init(); }