static void omap_pwm_led_set_blink(struct omap_pwm_led *led)
{
pr_debug("%s%s: \n", PASS1,__func__);
if (!led->powered)
return;
if (led->on_period != 0 && led->off_period != 0) {
unsigned long load_reg, cmp_reg;
load_reg = 32768 * (led->on_period + led->off_period) / 1000;
cmp_reg = 32768 * led->on_period / 1000;
omap_dm_timer_stop(led->blink_timer);
omap_dm_timer_set_load(led->blink_timer, 1, -load_reg);
omap_dm_timer_set_match(led->blink_timer, 1, -cmp_reg);
omap_dm_timer_set_pwm(led->blink_timer, 1, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_write_counter(led->blink_timer, -2);
omap_dm_timer_start(led->blink_timer);
} else {
omap_dm_timer_set_pwm(led->blink_timer, 1, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_stop(led->blink_timer);
}
}
static void omap_pwm_led_set_pwm_cycle(struct omap_pwm_led *led, int cycle)
{
int n;
pr_debug("%s%s: \n", PASS1,__func__);
if (cycle == 0)
n = 0xff;
else n = cycle - 1;
if (cycle == LED_FULL) {
printk("!!!!!!!!!!cycle == LED_FULL \n");
omap_dm_timer_start(led->intensity_timer);
omap_dm_timer_set_pwm(led->intensity_timer, 1, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_set_match(led->intensity_timer, 1,
0xffffff00);
} else {
printk("!!!!!!!!!!cycle != LED_FULL, cycle=%i \n", cycle);
omap_dm_timer_start(led->intensity_timer);
omap_dm_timer_set_pwm(led->intensity_timer, 0, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_set_match(led->intensity_timer, 1,
(0xffffff00) | cycle);
}
}
static void omap_pwm_led_set_pwm_cycle(struct omap_pwm_led *led, int cycle)
{
int pwm_frequency = 10000;
int def_on;
pr_debug("%s: cycle: %i\n",
__func__, cycle);
if (led->pdata->bkl_max)
cycle = ( (cycle * led->pdata->bkl_max ) / 255);
if (cycle < led->pdata->bkl_min)
cycle = led->pdata->bkl_min;
if (led->pdata->bkl_freq)
pwm_frequency = led->pdata->bkl_freq;
if (cycle != LED_FULL)
def_on = led->pdata->invert ? 1:0;
else
def_on = led->pdata->invert ? 0:1;
omap_dm_timer_set_pwm(led->intensity_timer, def_on, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
if (cycle != LED_FULL) {
pwm_set_speed(led->intensity_timer, pwm_frequency, 256-cycle);
omap_dm_timer_start(led->intensity_timer);
} else
omap_dm_timer_stop(led->intensity_timer);
}
static ssize_t store_irblaster_freq(struct device *dev, struct device_attribute *attr,
const char* buf, size_t len)
{
frequency = simple_strtol(buf, NULL, 10);
/* Disable pwm */
if (frequency == 0) {
omap_dm_timer_stop(irb_pwm_timer);
omap_dm_timer_disable(irb_pwm_timer);
irb_state = 0;
return 0;
}
/* Enable pwm */
if (irb_state == 0) {
omap_dm_timer_enable(irb_pwm_timer);
omap_dm_timer_set_pwm(irb_pwm_timer, 0, 1, 2);
omap_dm_timer_start(irb_pwm_timer);
irb_state = 1;
}
pwm_set_speed(irb_pwm_timer, frequency, duty_cycle);
return len;
}
static irqreturn_t omap2_irblaster_timer_interrupt_no_carrier(void)
{
int next_cycle;
struct omap_dm_timer *timer_ctrl = gpt_pwm_list[ IRBLASTER_TIMER_CTRL].timer;
struct omap_dm_timer *timer_pwm = gpt_pwm_list[ IRBLASTER_PWM ].timer;
unsigned int timer_ctrl_period = gpt_pwm_list[ IRBLASTER_TIMER_CTRL].period;
unsigned int timer_pwm_period = gpt_pwm_list[ IRBLASTER_PWM].period;
omap_dm_timer_write_status(timer_ctrl, OMAP_TIMER_INT_MATCH);
_gio_debug_clear();
next_cycle = *irq_irblaster_cycles;
if ( next_cycle ) {
irq_irblaster_cycles++;
gpt_set_new_cycle(timer_ctrl,timer_ctrl_period, next_cycle);
gpt_set_new_cycle(timer_pwm,timer_pwm_period, next_cycle);
}
else {
/* no trigger */
omap_dm_timer_set_pwm(timer_pwm,0,1,0);
/* stop timers */
omap_dm_timer_stop(timer_pwm);
omap_dm_timer_stop(timer_ctrl);
irb_over = 1;
wake_up_interruptible(&irb_wait);
}
_gio_debug_set();
return IRQ_HANDLED;
}
static void set_gptimer_pwm_vibrator(int on)
{
unsigned long flags;
if (pwm_timer == NULL) {
pr_err(KERN_ERR "vibrator pwm timer is NULL\n");
return;
}
spin_lock_irqsave(&vibe__timer_lock, flags);
if (on) {
if(!vibe_timer_state) {
gpio_set_value(GPIO_VIB_EN, 1);
omap_dm_timer_enable(pwm_timer);
omap_dm_timer_set_match(pwm_timer, 1, 0xFFFFFFFE);
omap_dm_timer_set_pwm(pwm_timer, 0, 1, OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_set_load_start(pwm_timer, 1, MOTOR_RESONANCE_COUTER_VALUE);
vibe_timer_state = 1;
}
} else {
if(vibe_timer_state) {
omap_dm_timer_stop(pwm_timer);
omap_dm_timer_disable(pwm_timer);
gpio_set_value(GPIO_VIB_EN, 0);
vibe_timer_state = 0;
}
}
spin_unlock_irqrestore(&vibe__timer_lock, flags);
}
static void omap_pwm_led_set_pwm_cycle(struct omap_pwm_led *led, int cycle)
{
int n;
if (cycle == 0)
n = 0xff;
else n = cycle - 1;
if (cycle == LED_FULL) {
omap_dm_timer_set_pwm(led->intensity_timer, 0, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_stop(led->intensity_timer);
} else {
omap_dm_timer_set_pwm(led->intensity_timer, 1, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_set_match(led->intensity_timer, 1,
(0xffffff00) | cycle);
omap_dm_timer_start(led->intensity_timer);
}
}
static int panel_set_backlight_level(
struct omap_display *disp, int level)
{
int hw_level;
pr_debug("panel_set_backlight_level [%s] %d\n",
disp != NULL ? disp->panel->name: "cpt_wvga_48", level);
/* skip if panel is not on */
if (panel_state == 0) {
saved_bkl_level = level;
return 0;
}
/* clamp the level */
if (level < 0)
level = 0;
if (level > 255)
level = 255;
/* nothing to do if levels are equal */
if (bkl_level == level)
return 0;
/* stop backlight? */
if (level == 0) {
if (GPIO_EXISTS(display_gpio.bkl_pwon))
omap_set_gpio_dataout(GPIO_PIN(display_gpio.bkl_pwon), 0);
omap_dm_timer_stop(bkl_pwm);
omap_dm_timer_disable(bkl_pwm);
bkl_level = 0;
return 0;
}
/* start backlight? */
if (bkl_level == 0) {
omap_dm_timer_enable(bkl_pwm);
omap_dm_timer_set_pwm(bkl_pwm, 0, 1, 2);
omap_dm_timer_start(bkl_pwm);
if (GPIO_EXISTS(display_gpio.bkl_pwon))
omap_set_gpio_dataout(GPIO_PIN(display_gpio.bkl_pwon), 1);
}
/* set new level, g7 machines have inverted level */
hw_level = level;
if (!machine_is_archos_g6h())
hw_level = 255 - level;
pwm_set_speed(bkl_pwm, 10000, hw_level);
bkl_level = level;
return 0;
}
/*
* For setting the values in registers for varying the duty cycle and time period
*/
static void vibtonz_GPTimerSetValue(unsigned long load,unsigned long cmp)
{
unsigned long load_reg, cmp_reg;
// printk("[VIBRATOR] %s \n",__func__);
load_reg = load; /* For setting the frequency=22.2Khz */
cmp_reg = cmp; /* For varying the duty cycle */
omap_dm_timer_enable(gptimer);
omap_dm_timer_set_load(gptimer, 1, -load_reg);
omap_dm_timer_set_match(gptimer, 1, -cmp_reg);
omap_dm_timer_set_pwm(gptimer, 0, 1,OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_write_counter(gptimer, -2);
omap_dm_timer_save_context(gptimer);
}
static void backlight_gptimer_update(struct omap_dss_device *dssdev)
{
struct ltn101al03 *lcd = dev_get_drvdata(&dssdev->dev);
omap_dm_timer_set_load(lcd->gptimer, 1, -PWM_DUTY_MAX);
omap_dm_timer_set_match(lcd->gptimer, 1, /* 0~25 */
-PWM_DUTY_MAX + lcd->current_brightness);
omap_dm_timer_set_pwm(lcd->gptimer, 0, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_enable(lcd->gptimer);
omap_dm_timer_write_counter(lcd->gptimer, -2);
omap_dm_timer_disable(lcd->gptimer);
omap_dm_timer_start(lcd->gptimer);
}
static int sholest_lvibrator_initialization(void)
{
unsigned long load_reg, cmp_reg;
uint32_t timer_rate = 0;
int ret = 0;
vib_pwm_timer = omap_dm_timer_request_specific(11);
if (vib_pwm_timer == NULL)
ret = -ENODEV;
timer_rate = clk_get_rate(omap_dm_timer_get_fclk(vib_pwm_timer));
load_reg = timer_rate * SHOLEST_LVIBRATOR_PERIOD / 1000000;
cmp_reg = timer_rate * (SHOLEST_LVIBRATOR_PERIOD -
SHOLEST_LVIBRATOR_DUTY) / 1000000;
omap_dm_timer_set_source(vib_pwm_timer, OMAP_TIMER_SRC_32_KHZ);
omap_dm_timer_set_load(vib_pwm_timer, 1, -load_reg);
omap_dm_timer_set_match(vib_pwm_timer, 1, -cmp_reg);
omap_dm_timer_set_pwm(vib_pwm_timer, 0, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_write_counter(vib_pwm_timer, -2);
return 0;
}
static void omap_pwm_led_power_off(struct omap_pwm_led *led)
{
pr_debug("%s%s: \n", PASS1,__func__);
printk("!!!!!!!!!!%s the brightness is %d \n",__func__, led->brightness);
if (!led->powered)
return;
led->powered = 0;
/* Everything off */
omap_dm_timer_set_pwm(led->intensity_timer, 0, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
omap_dm_timer_stop(led->intensity_timer);
omap_dm_timer_disable(led->intensity_timer);
if (led->blink_timer != NULL) {
omap_dm_timer_stop(led->blink_timer);
omap_dm_timer_disable(led->blink_timer);
}
if (led->pdata->set_power != NULL)
led->pdata->set_power(led->pdata, 0);
}
static int panel_set_vcom_level(
struct omap_display *disp, int level)
{
pr_debug("panel_set_vcom_level [%s] %i\n",
disp->panel->name, level);
/* clamp the level */
if (level < 0)
level = 0;
if (level > 255)
level = 255;
/* nothing to do if levels are equal */
if (vcom_level == level)
return 0;
/* stop vcom? */
if (level == 0) {
omap_dm_timer_stop(vcom_pwm);
omap_dm_timer_disable(vcom_pwm);
vcom_level = 0;
return 0;
}
/* start vcom? */
if (vcom_level == 0) {
omap_dm_timer_enable(vcom_pwm);
omap_dm_timer_set_pwm(vcom_pwm, 0, 1, 2);
omap_dm_timer_start(vcom_pwm);
}
vcom_level = level;
pwm_set_speed(vcom_pwm, 10000, vcom_level);
vcom_level = level;
return 0;
}
static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
{
omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
OMAP_TIMER_TRIGGER_NONE);
}
static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
{
omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
}
static void gp_irblaster_init(int carrier_frequency, int no_carrier, unsigned short *pt_cycles_list)
{
u32 val;
u32 period;
int min_cycle=0x70000000; /* this min cycle can be set to another minimum: but which value ? */
unsigned short *pt = pt_cycles_list;
irb_over = 0;
//_select_irb_config();
/* find min cycle */
while ( *pt != 0) {
if ( *pt < min_cycle )
min_cycle = *pt;
pt++;
}
/* enable timer clock */
omap_dm_timer_enable(gpt_pwm_list[IRBLASTER_PWM].timer);
omap_dm_timer_enable(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer);
irq_irblaster_cycles = pt_cycles_list;
if ( no_carrier ) {
/* set the callback irq function */
_callback_irblaster_timer_interrupt = omap2_irblaster_timer_interrupt_no_carrier;
/* set IRBLASTER TIMER PWM */
/* default output is 0 */
/* toogle */
/* trigger on overflow */
omap_dm_timer_set_pwm(gpt_pwm_list[IRBLASTER_PWM].timer,0,1,1);
/* set frequency */
period = _get_innotech_period(gpt_pwm_list[IRBLASTER_PWM].rate,carrier_frequency);
gpt_pwm_list[IRBLASTER_PWM].period = period;
/* at init, nothing to do during few cycles */
/* and let say, during min cycle */
val = 0xFFFFFFFF+1-(period*min_cycle);
omap_dm_timer_set_load(gpt_pwm_list[IRBLASTER_PWM].timer, 1, val);
/* set IRBLASTER TIMER CTRL */
/* timer freq is the same as the carrier */
period = _get_innotech_period(gpt_pwm_list[IRBLASTER_TIMER_CTRL].rate,carrier_frequency);
gpt_pwm_list[IRBLASTER_TIMER_CTRL].period = period;
/* at init, nothing to do during few cycles */
/* and let say, during min cycle */
val = 0xFFFFFFFF+1-(period*min_cycle);
omap_dm_timer_set_load(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer, 1, val);
/* prepare the irblaster match condition */
/* irblaster timer run twice time faster than the pwm */
/* so this match is set on the middle of the min cycle time */
val = 0xFFFFFFFF+1-(period*min_cycle/2);
omap_dm_timer_set_match(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer, 1, val);
} else {
/* set the callback irq function */
_callback_irblaster_timer_interrupt = omap2_irblaster_timer_interrupt_carrier;
/* set IRBLASTER TIMER PWM */
/* default output is 0 */
/* toogle */
/* trigger on match and overflow */
omap_dm_timer_set_pwm(gpt_pwm_list[IRBLASTER_PWM].timer,0,1,2);
/* set waveform frequency and duty cycle 1/2 = 128/256 */
_set_innotech_speed(IRBLASTER_PWM,carrier_frequency,128);
/* at init, no trigger = default output on pin */
irq_irblaster_pwm_ctrl_reg = omap_dm_timer_read_reg(gpt_pwm_list[IRBLASTER_PWM].timer, OMAP_TIMER_CTRL_REG);
irq_irblaster_pwm_ctrl_reg &= ~(3<<10);
omap_dm_timer_write_reg(gpt_pwm_list[IRBLASTER_PWM].timer, OMAP_TIMER_CTRL_REG, irq_irblaster_pwm_ctrl_reg);
/* make the start readuy */
irq_irblaster_pwm_ctrl_reg |= OMAP_TIMER_CTRL_ST;
/* set IRBLASTER TIMER CTRL */
/* timer freq is the same as the carrier */
period = _get_innotech_period(gpt_pwm_list[IRBLASTER_TIMER_CTRL].rate,carrier_frequency);
gpt_pwm_list[IRBLASTER_TIMER_CTRL].period = period;
/* at init, nothing to do during few cycles */
/* and let say, during min cycle */
val = 0xFFFFFFFF+1-(period*(*irq_irblaster_cycles));
omap_dm_timer_set_load(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer, 1, val);
/* set the irblaster ctrl timer match condition */
/* to the middle of min cycle */
/* from (end_of_cycle - min_cycle/2) to end_of_cycle, */
/* the timer ctrl irq will pool ...*/
// val = 0xFFFFFFFF+1-(period*min_cycle/2);
val = 0xFFFFFFFF+1-_get_best_match_timing_int(min_cycle,gpt_pwm_list[IRBLASTER_TIMER_CTRL].period,gpt_pwm_list[IRBLASTER_TIMER_CTRL].rate);
omap_dm_timer_set_match(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer, 1,val );
}
omap_dm_timer_start(gpt_pwm_list[ IRBLASTER_TIMER_CTRL].timer);
omap_dm_timer_start(gpt_pwm_list[ IRBLASTER_PWM].timer);
}
static int _init_gpt(void)
{
int irqno;
int ret = 0;
if ((gpt_pwm_list[IRBLASTER_PWM].timer = omap_dm_timer_request_specific(gpt_pwm_list[IRBLASTER_PWM].no)) == NULL) {
printk(KERN_ERR "%s: failed to request dm-timer (%d)\n", gpt_pwm_list[IRBLASTER_PWM].name, gpt_pwm_list[IRBLASTER_PWM].no);
return -ENODEV;
}
omap_dm_timer_set_source(gpt_pwm_list[IRBLASTER_PWM].timer, gpt_pwm_list[IRBLASTER_PWM].source);
gpt_pwm_list[IRBLASTER_PWM].rate = clk_get_rate(omap_dm_timer_get_fclk(gpt_pwm_list[IRBLASTER_PWM].timer));
printk(KERN_DEBUG "%s (%d) timer rate is: %d\n", gpt_pwm_list[IRBLASTER_PWM].name, gpt_pwm_list[IRBLASTER_PWM].no, gpt_pwm_list[IRBLASTER_PWM].rate);
if ((gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer = omap_dm_timer_request_specific(gpt_pwm_list[IRBLASTER_TIMER_CTRL].no)) == NULL) {
printk(KERN_ERR "%s: failed to request dm-timer (%d)\n", gpt_pwm_list[IRBLASTER_TIMER_CTRL].name, gpt_pwm_list[IRBLASTER_TIMER_CTRL].no);
omap_dm_timer_free(gpt_pwm_list[IRBLASTER_PWM].timer);
return -ENODEV;
}
omap_dm_timer_set_source(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer, gpt_pwm_list[IRBLASTER_TIMER_CTRL].source);
gpt_pwm_list[IRBLASTER_TIMER_CTRL].rate = clk_get_rate(omap_dm_timer_get_fclk(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer));
printk(KERN_DEBUG "%s (%d) timer rate is: %d\n", gpt_pwm_list[IRBLASTER_TIMER_CTRL].name, gpt_pwm_list[IRBLASTER_TIMER_CTRL].no, gpt_pwm_list[IRBLASTER_TIMER_CTRL].rate);
/* select irblaster configuration */
_select_irb_config();
/* enable timer clock */
omap_dm_timer_enable(gpt_pwm_list[IRBLASTER_PWM].timer);
omap_dm_timer_enable(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer);
/* set modulation mod */
/* trigger on overflow and match */
omap_dm_timer_set_pwm(gpt_pwm_list[IRBLASTER_PWM].timer,0,1,2);
omap_dm_timer_set_pwm(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer, 0, 1, 2);
//if ( gpt_pwm_list[IRBLASTER_TIMER_CTRL].mux_config )
// omap_cfg_reg(gpt_pwm_list[IRBLASTER_TIMER_CTRL].mux_config);
irqno = omap_dm_timer_get_irq(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer);
if (request_irq(irqno, omap2_irblaster_timer_interrupt,
IRQF_DISABLED, "gp timer", NULL)) {
ret = -EBUSY;
goto failed_request_irq;
}
omap_dm_timer_set_int_enable(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer, IRBLASTER_TIMER_CTRL_IT_TYPE);
/* disable timer clocks after init */
omap_dm_timer_disable(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer);
omap_dm_timer_disable(gpt_pwm_list[IRBLASTER_PWM].timer);
init_waitqueue_head(&irb_wait);
_gio_debug_init();
return 0;
failed_request_irq:
omap_dm_timer_free(gpt_pwm_list[IRBLASTER_PWM].timer);
omap_dm_timer_free(gpt_pwm_list[IRBLASTER_TIMER_CTRL].timer);
return ret;
}
static int omap_pwm_led_probe(struct platform_device *pdev)
{
struct omap_pwm_led_platform_data *pdata = pdev->dev.platform_data;
struct omap_pwm_led *led;
int ret;
if (pdata->intensity_timer < 1 || pdata->intensity_timer > MAX_GPTIMER_ID)
return -EINVAL;
if (pdata->blink_timer != 0 || pdata->blink_timer > MAX_GPTIMER_ID)
return -EINVAL;
led = kzalloc(sizeof(struct omap_pwm_led), GFP_KERNEL);
if (led == NULL) {
dev_err(&pdev->dev, "No memory for device\n");
return -ENOMEM;
}
platform_set_drvdata(pdev, led);
led->cdev.brightness_set = omap_pwm_led_set;
led->cdev.default_trigger = pdata->default_trigger;
led->cdev.name = pdata->name;
led->pdata = pdata;
led->brightness = LED_OFF;
dev_info(&pdev->dev, "OMAP PWM LED (%s) at GP timer %d/%d\n",
pdata->name, pdata->intensity_timer, pdata->blink_timer);
/* register our new led device */
ret = led_classdev_register(&pdev->dev, &led->cdev);
if (ret < 0) {
dev_err(&pdev->dev, "led_classdev_register failed\n");
goto error_classdev;
}
/* get related dm timers */
led->intensity_timer = omap_dm_timer_request_specific(pdata->intensity_timer);
if (led->intensity_timer == NULL) {
dev_err(&pdev->dev, "failed to request intensity pwm timer\n");
ret = -ENODEV;
goto error_intensity;
}
if (led->pdata->invert)
omap_dm_timer_set_pwm(led->intensity_timer, 1, 1,
OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
if (pdata->blink_timer != 0) {
led->blink_timer = omap_dm_timer_request_specific(pdata->blink_timer);
if (led->blink_timer == NULL) {
dev_err(&pdev->dev, "failed to request blinking pwm timer\n");
ret = -ENODEV;
goto error_blink1;
}
ret = device_create_file(led->cdev.dev,
&dev_attr_on_period);
if(ret)
goto error_blink2;
ret = device_create_file(led->cdev.dev,
&dev_attr_off_period);
if(ret)
goto error_blink3;
}
return 0;
error_blink3:
device_remove_file(led->cdev.dev,
&dev_attr_on_period);
error_blink2:
dev_err(&pdev->dev, "failed to create device file(s)\n");
error_blink1:
omap_dm_timer_free(led->intensity_timer);
error_intensity:
led_classdev_unregister(&led->cdev);
error_classdev:
kfree(led);
return ret;
}
