示例#1
0
static void omap_pwm_led_power_on(struct omap_pwm_led *led)
{
	if (led->powered)
		return;
	led->powered = 1;

	/* Select clock */
	omap_dm_timer_enable(led->intensity_timer);
	omap_dm_timer_set_source(led->intensity_timer, OMAP_TIMER_SRC_32_KHZ);

	/* Turn voltage on */
	if (led->pdata->set_power != NULL)
		led->pdata->set_power(led->pdata, 1);

	/* Enable PWM timers */
	if (led->blink_timer != NULL) {
		omap_dm_timer_enable(led->blink_timer);
		omap_dm_timer_set_source(led->blink_timer,
					 OMAP_TIMER_SRC_32_KHZ);
		omap_pwm_led_set_blink(led);
	}

	omap_dm_timer_write_counter(led->intensity_timer, 0xffffffff);
	omap_dm_timer_set_load(led->intensity_timer, 1, 0xffffff00);
}
long hrt_ioctl(struct file* file,unsigned int cmd, unsigned long arg)
{
	switch(cmd)
	{
		case CMD_START_TIMER:
			if (!omap_dm_timer_start(timer))
			{
				return -EINVAL;
			}
			break;
		case CMD_STOP_TIMER:
			if (!omap_dm_timer_stop(timer))
			{
				return -EINVAL;
			}
			break;
		case CMD_SET_TIMER_COUNTER_VALUE:
			if(!omap_dm_timer_write_counter(timer,(int)arg))
			{
			    return -EINVAL;
			}
			break;
		default:
			return -ENOTTY;
			break;
	}
	return 0;
}
static void pwm_set_speed(struct omap_dm_timer *gpt,
		int frequency, int duty_cycle)
{
	u32 val;
	u32 period;
	struct clk *timer_fclk;

	/* and you will have an overflow in 1 sec         */
	/* so,                              */
	/* freq_timer     -> 1s             */
	/* carrier_period -> 1/carrier_freq */
	/* => carrier_period = freq_timer/carrier_freq */

	timer_fclk = omap_dm_timer_get_fclk(gpt);
	period = clk_get_rate(timer_fclk) / frequency;

	val = 0xFFFFFFFF+1-period;
	omap_dm_timer_set_load(gpt, 1, val);

	val = 0xFFFFFFFF+1-(period*duty_cycle/256);
	omap_dm_timer_set_match(gpt, 1, val);

	/* assume overflow first: no toogle if first trig is match */
	omap_dm_timer_write_counter(gpt, 0xFFFFFFFE);
}
示例#4
0
static void omap_pwm_led_set_blink(struct omap_pwm_led *led)
{
	pr_debug("%s%s: \n", PASS1,__func__);
	if (!led->powered)
		return;

	if (led->on_period != 0 && led->off_period != 0) {
		unsigned long load_reg, cmp_reg;

		load_reg = 32768 * (led->on_period + led->off_period) / 1000;
		cmp_reg = 32768 * led->on_period / 1000;

		omap_dm_timer_stop(led->blink_timer);
		omap_dm_timer_set_load(led->blink_timer, 1, -load_reg);
		omap_dm_timer_set_match(led->blink_timer, 1, -cmp_reg);
		omap_dm_timer_set_pwm(led->blink_timer, 1, 1,
				      OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
		omap_dm_timer_write_counter(led->blink_timer, -2);
		omap_dm_timer_start(led->blink_timer);
	} else {
		omap_dm_timer_set_pwm(led->blink_timer, 1, 1,
				      OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
		omap_dm_timer_stop(led->blink_timer);
	}
}
示例#5
0
/*
 * For setting the values in registers for varying the duty cycle and time period
 */
static void vibtonz_GPTimerSetValue(unsigned long load,unsigned long cmp)
{
	unsigned long load_reg, cmp_reg;
//	printk("[VIBRATOR] %s \n",__func__);

	load_reg =  load;	/* For setting the frequency=22.2Khz */
	cmp_reg =  cmp;		/* For varying the duty cycle */

	omap_dm_timer_enable(gptimer);
	omap_dm_timer_set_load(gptimer, 1, -load_reg);
	omap_dm_timer_set_match(gptimer, 1, -cmp_reg);
	omap_dm_timer_set_pwm(gptimer, 0, 1,OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
	omap_dm_timer_write_counter(gptimer, -2);
	omap_dm_timer_save_context(gptimer);
}
示例#6
0
static void backlight_gptimer_update(struct omap_dss_device *dssdev)
{
	struct ltn101al03 *lcd = dev_get_drvdata(&dssdev->dev);

	omap_dm_timer_set_load(lcd->gptimer, 1, -PWM_DUTY_MAX);
	omap_dm_timer_set_match(lcd->gptimer, 1,	/* 0~25 */
				-PWM_DUTY_MAX + lcd->current_brightness);
	omap_dm_timer_set_pwm(lcd->gptimer, 0, 1,
			      OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
	omap_dm_timer_enable(lcd->gptimer);
	omap_dm_timer_write_counter(lcd->gptimer, -2);
	omap_dm_timer_disable(lcd->gptimer);

	omap_dm_timer_start(lcd->gptimer);
}
示例#7
0
文件: ir-rx51.c 项目: 03199618/linux
static int init_timing_params(struct lirc_rx51 *lirc_rx51)
{
	u32 load, match;

	load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq);
	match = -(lirc_rx51->duty_cycle * -load / 100);
	omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load);
	omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match);
	omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
	omap_dm_timer_start(lirc_rx51->pwm_timer);
	omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
	omap_dm_timer_start(lirc_rx51->pulse_timer);

	lirc_rx51->match = 0;

	return 0;
}
示例#8
0
/*
 * IOCTL commands
 * TESTED
 * PARAMETERS:
 * cmd - 0xffc1 start, 0xffc2 stop, 0xffc3 set
 * arg - value to write to timer
 */
ssize_t HRTDriver_dmtimer_ioctl(struct file *file, unsigned int cmd, unsigned int arg) {

	printk("IOCTL entered\n\n");

	switch(cmd) {
		case 0xffc1: 
			printk("\nStarting the timer.\n");
			omap_dm_timer_start(hrt_devp->gptimer);
			return 0;
		case 0xffc2:
			printk("\nStopping the timer.\n\n");
			omap_dm_timer_stop(hrt_devp->gptimer);
			return 0;
		case 0xffc3:
			printk("\nSetting the timer\n\n");
			omap_dm_timer_write_counter(hrt_devp->gptimer, arg);
			return 0;
		default:
			return -1;

	}
	/*
	//start command
	if (!strcmp(cmd, "0xffc1")) {
		printk("\nStarting the timer.\n");
		omap_dm_timer_start(hrt_devp->gptimer);
		return 0;
	}
	else if (!strcmp(cmd, "0xffc2")) {
		printk("\nStopping the timer.\n\n");
		omap_dm_timer_stop(hrt_devp->gptimer);
		return 0;
	}
	else if (!strcmp(cmd, "0xffc3")) {
		printk("\nSetting the timer\n\n");
		omap_dm_timer_write_counter(hrt_devp->gptimer, arg);
		return 0;
	}
	else return -1;
	*/

}
static int sholest_lvibrator_initialization(void)
{
	unsigned long load_reg, cmp_reg;
	uint32_t timer_rate = 0;
	int ret = 0;
	vib_pwm_timer = omap_dm_timer_request_specific(11);
	if (vib_pwm_timer == NULL)
		ret = -ENODEV;
	timer_rate = clk_get_rate(omap_dm_timer_get_fclk(vib_pwm_timer));
	load_reg = timer_rate * SHOLEST_LVIBRATOR_PERIOD / 1000000;
	cmp_reg = timer_rate * (SHOLEST_LVIBRATOR_PERIOD -
				SHOLEST_LVIBRATOR_DUTY) / 1000000;
	omap_dm_timer_set_source(vib_pwm_timer, OMAP_TIMER_SRC_32_KHZ);
	omap_dm_timer_set_load(vib_pwm_timer, 1, -load_reg);
	omap_dm_timer_set_match(vib_pwm_timer, 1, -cmp_reg);
	omap_dm_timer_set_pwm(vib_pwm_timer, 0, 1,
			      OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
	omap_dm_timer_write_counter(vib_pwm_timer, -2);
	return 0;
}
示例#10
0
static void _set_innotech_speed(int id, int frequency, int duty_cycle) 
{
	u32 val;
	u32 period;

	/* and you will have an overflow in 1 sec         */
	/* so,                              */
	/* freq_timer     -> 1s             */
	/* carrier_period -> 1/carrier_freq */
	/* => carrier_period = freq_timer/carrier_freq */
	period = _get_innotech_period(gpt_pwm_list[id].rate, frequency);
	gpt_pwm_list[id].period = period;
	val = 0xFFFFFFFF+1-period;
	
	omap_dm_timer_set_load(gpt_pwm_list[id].timer, 1, val);

	val = 0xFFFFFFFF+1-(period*duty_cycle/256);
	omap_dm_timer_set_match(gpt_pwm_list[id].timer, 1, val);

	/* set overflow first: pwm will not toggle if first trig is match */
	omap_dm_timer_write_counter(gpt_pwm_list[id].timer,0xFFFFFFFE);
}