static void __init nokia_n800_init(void)
{
platform_add_devices(n800_devices, ARRAY_SIZE(n800_devices));
i2c_register_board_info(1, n800_i2c_board_info_1,
ARRAY_SIZE(n800_i2c_board_info_1));
i2c_register_board_info(2, n800_i2c_board_info_2,
ARRAY_SIZE(n800_i2c_board_info_2));
n800_flash_init();
n800_mmc_init();
n800_bt_init();
n800_audio_init(&tsc2301_config);
n800_dsp_init();
n800_usb_init();
n800_cam_init();
n800_ts_set_config();
spi_register_board_info(n800_spi_board_info,
ARRAY_SIZE(n800_spi_board_info));
omap_serial_init();
mipid_dev_init();
blizzard_dev_init();
tsc2301_dev_init();
omap_register_gpio_switches(n800_gpio_switches,
ARRAY_SIZE(n800_gpio_switches));
}
static void __init nokia_n800_init(void)
{
nokia_n800_common_init();
n800_ts_set_config();
tsc2301_dev_init();
tea5761_dev_init();
omap_register_gpio_switches(n800_gpio_switches,
ARRAY_SIZE(n800_gpio_switches));
}
static void __init omap_palmte_init(void)
{
omap_board_config = palmte_config;
omap_board_config_size = ARRAY_SIZE(palmte_config);
platform_add_devices(palmte_devices, ARRAY_SIZE(palmte_devices));
spi_register_board_info(palmte_spi_info, ARRAY_SIZE(palmte_spi_info));
omap_register_gpio_switches(palmte_switches,
ARRAY_SIZE(palmte_switches));
palmte_misc_gpio_setup();
omap_serial_init();
}
static void __init h2_init(void)
{
/* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
* to address 0 by a dip switch), NAND on CS2B. The NAND driver will
* notice whether a NAND chip is enabled at probe time.
*
* FIXME revC boards (and H3) support NAND-boot, with a dip switch to
* put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
* detecting that in code here, to avoid probing every possible flash
* configuration...
*/
h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
h2_nor_resource.end += SZ_32M - 1;
h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
h2_nand_resource.end += SZ_4K - 1;
if (!(omap_request_gpio(H2_NAND_RB_GPIO_PIN)))
h2_nand_data.dev_ready = h2_nand_dev_ready;
omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
/* MMC: card detect and WP */
/* omap_cfg_reg(U19_ARMIO1); */ /* CD */
omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
/* Irda */
#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) {
omap_set_gpio_direction(H2_IRDA_FIRSEL_GPIO_PIN, 0);
h2_irda_data.transceiver_mode = h2_transceiver_mode;
}
#endif
platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
spi_register_board_info(h2_spi_board_info,
ARRAY_SIZE(h2_spi_board_info));
omap_board_config = h2_config;
omap_board_config_size = ARRAY_SIZE(h2_config);
omap_serial_init();
omap_register_i2c_bus(1, 100, h2_i2c_board_info,
ARRAY_SIZE(h2_i2c_board_info));
h2_mmc_init();
omap_register_gpio_switches(h2_gpio_switches,
ARRAY_SIZE(h2_gpio_switches));
}
