struct ion_heap *omap_tiler_heap_create(struct ion_platform_heap *data) { struct omap_ion_heap *heap; heap = kzalloc(sizeof(struct omap_ion_heap), GFP_KERNEL); if (!heap) return ERR_PTR(-ENOMEM); if ((data->id == OMAP_ION_HEAP_TILER) || (data->id == OMAP_ION_HEAP_NONSECURE_TILER)) { heap->pool = gen_pool_create(12, -1); if (!heap->pool) { kfree(heap); return ERR_PTR(-ENOMEM); } heap->base = data->base; gen_pool_add(heap->pool, heap->base, data->size, -1); } heap->heap.ops = &omap_tiler_ops; heap->heap.type = OMAP_ION_HEAP_TYPE_TILER; heap->heap.name = data->name; heap->heap.id = data->id; if (omap_total_ram_size() <= SZ_512M) use_dynamic_pages = true; else // Use dynamic memory allocations #if 1 use_dynamic_pages = true; #else use_dynamic_pages = false; #endif return &heap->heap; }
static int __init omap_rproc_init(void) { const char *pdev_name = "omap-rproc"; struct omap_hwmod *oh[2]; struct omap_device *od; int i, ret = 0, oh_count; /* names like ipu_cx/dsp_cx might show up on other OMAPs, too */ if (!cpu_is_omap44xx()) return 0; for (i = 0; i < ARRAY_SIZE(omap4_rproc_data); i++) { const char *oh_name = omap4_rproc_data[i].oh_name; const char *oh_name_opt = omap4_rproc_data[i].oh_name_opt; oh_count = 0; if (omap_total_ram_size() == SZ_512M) { if (!strcmp("ipu", omap4_rproc_data[i].name)) omap4_rproc_data[i].firmware = "ducati-m3.512MB.bin"; else if (!strcmp("dsp", omap4_rproc_data[i].name)) omap4_rproc_data[i].firmware = "tesla-dsp.512MB.bin"; } oh[0] = omap_hwmod_lookup(oh_name); if (!oh[0]) { pr_err("could not look up %s\n", oh_name); continue; } oh_count++; if (oh_name_opt) { oh[1] = omap_hwmod_lookup(oh_name_opt); if (!oh[1]) { pr_err("could not look up %s\n", oh_name_opt); continue; } oh_count++; } omap4_rproc_data[i].memory_pool = omap_rproc_get_pool(omap4_rproc_data[i].name); od = omap_device_build_ss(pdev_name, i, oh, oh_count, &omap4_rproc_data[i], sizeof(struct omap_rproc_pdata), omap_rproc_latency, ARRAY_SIZE(omap_rproc_latency), false); if (IS_ERR(od)) { pr_err("Could not build omap_device for %s:%s\n", pdev_name, oh_name); ret = PTR_ERR(od); } } return ret; }
static int __init omap_rproc_init(void) { const char *pdev_name = "omap-rproc"; struct omap_hwmod *oh[2]; struct omap_device *od; int i, ret = 0, oh_count; /* names like ipu_cx/dsp_cx might show up on other OMAPs, too */ if (!cpu_is_omap44xx()) return 0; for (i = 0; i < ARRAY_SIZE(omap4_rproc_data); i++) { const char *oh_name = omap4_rproc_data[i].oh_name; const char *oh_name_opt = omap4_rproc_data[i].oh_name_opt; oh_count = 0; // WORKAROUND_CODE: replace ducati binary at run-time not build time. // TODO: This code must be removed. #ifdef CONFIG_MACH_LGE_U2_P769 // if HW revsion is not latest then system must be other ducati as following rull if(!strcmp(oh_name, "ipu_c0")) { if (system_rev < LGE_PCB_C) omap4_rproc_data[i].firmware = "ducati-m3_revB.bin" ; // for rev A and B // add here more mapping rull between HW revision and ducati binary name. printk("%s ducati name %s \n", __FUNCTION__,omap4_rproc_data[i].firmware); } #elif defined (CONFIG_MACH_LGE_U2_P760) // if HW revsion is not latest then system must be other ducati as following rull if(!strcmp(oh_name, "ipu_c0")) { if (system_rev < LGE_PCB_B) omap4_rproc_data[i].firmware = "ducati-m3_revA.bin" ; // for rev A and B // add here more mapping rull between HW revision and ducati binary name. printk("%s ducati name %s \n", __FUNCTION__,omap4_rproc_data[i].firmware); } #endif if (omap_total_ram_size() == SZ_512M) { if (!strcmp("ipu", omap4_rproc_data[i].name)) omap4_rproc_data[i].firmware = "ducati-m3.512MB.bin"; else if (!strcmp("dsp", omap4_rproc_data[i].name)) omap4_rproc_data[i].firmware = "tesla-dsp.512MB.bin"; } oh[0] = omap_hwmod_lookup(oh_name); if (!oh[0]) { pr_err("could not look up %s\n", oh_name); continue; } oh_count++; if (oh_name_opt) { oh[1] = omap_hwmod_lookup(oh_name_opt); if (!oh[1]) { pr_err("could not look up %s\n", oh_name_opt); continue; } oh_count++; } omap4_rproc_data[i].memory_pool = omap_rproc_get_pool(omap4_rproc_data[i].name); od = omap_device_build_ss(pdev_name, i, oh, oh_count, &omap4_rproc_data[i], sizeof(struct omap_rproc_pdata), omap_rproc_latency, ARRAY_SIZE(omap_rproc_latency), false); if (IS_ERR(od)) { pr_err("Could not build omap_device for %s:%s\n", pdev_name, oh_name); ret = PTR_ERR(od); } } return ret; }
void __init omap_ion_init(void) { int i; int ret; u32 nonsecure = omap4_ion_pdata.nonsecure_tiler2d_size; system_512m = (omap_total_ram_size() == SZ_512M); /* carveout sizes */ omap4_smc_size = (SZ_1M * 3); if (system_512m) { omap4_ion_heap_secure_input_size = 0; omap4_ion_heap_secure_output_wfdhdcp_size = 0; omap4_ducati_heap_size = (SZ_1M * 83); omap4_ion_heap_nonsec_tiler_mem_size = 0; omap4_ion_heap_tiler_mem_size = 0; } else { #ifdef CONFIG_USE_AMAZON_DUCATI omap4_ion_heap_secure_input_size = (SZ_1M * 10); omap4_ion_heap_secure_output_wfdhdcp_size = (SZ_1M * 0); omap4_ducati_heap_size = (SZ_1M * 105); omap4_ion_heap_nonsec_tiler_mem_size = nonsecure; omap4_ion_heap_tiler_mem_size = (ALIGN(omap4_ion_pdata.tiler2d_size + nonsecure, SZ_2M) - nonsecure); #else omap4_ion_heap_secure_input_size = (SZ_1M * 90); omap4_ion_heap_secure_output_wfdhdcp_size = (SZ_1M * 16); omap4_ducati_heap_size = (SZ_1M * 109); omap4_ion_heap_nonsec_tiler_mem_size = nonsecure; omap4_ion_heap_tiler_mem_size = (ALIGN(omap4_ion_pdata.tiler2d_size + nonsecure, SZ_2M) - nonsecure); #endif } /* carveout addresses */ omap4_smc_addr = PLAT_PHYS_OFFSET + omap_total_ram_size() - omap4_smc_size; omap4_ion_heap_secure_input_addr = omap4_smc_addr - omap4_ion_heap_secure_input_size; omap4_ion_heap_secure_output_wfdhdcp_addr = omap4_ion_heap_secure_input_addr - omap4_ion_heap_secure_output_wfdhdcp_size; omap4_ducati_heap_addr = omap4_ion_heap_secure_output_wfdhdcp_addr - omap4_ducati_heap_size; omap4_ion_heap_tiler_mem_addr = omap4_ducati_heap_addr - omap4_ion_heap_tiler_mem_size; omap4_ion_heap_nonsec_tiler_mem_addr = omap4_ion_heap_tiler_mem_addr - omap4_ion_heap_nonsec_tiler_mem_size; pr_info("omap4_total_ram_size = 0x%x\n" \ "omap4_smc_size = 0x%x\n" \ "omap4_ion_heap_secure_input_size = 0x%x\n" \ "omap4_ion_heap_secure_output_wfdhdcp_size = 0x%x\n" \ "omap4_ducati_heap_size = 0x%x\n" \ "omap4_ion_heap_tiler_mem_size = 0x%x\n" \ "omap4_ion_heap_nonsec_tiler_mem_size = 0x%x\n", omap_total_ram_size(), omap4_smc_size, omap4_ion_heap_secure_input_size, omap4_ion_heap_secure_output_wfdhdcp_size, omap4_ducati_heap_size, omap4_ion_heap_tiler_mem_size, omap4_ion_heap_nonsec_tiler_mem_size); pr_info(" omap4_smc_addr = 0x%x\n" \ "omap4_ion_heap_secure_input_addr = 0x%x\n" \ "omap4_ion_heap_secure_output_wfdhdcp_addr = 0x%x\n" \ "omap4_ducati_heap_addr = 0x%x\n" \ "omap4_ion_heap_tiler_mem_addr = 0x%x\n" \ "omap4_ion_heap_nonsec_tiler_mem_addr = 0x%x\n", omap4_smc_addr, omap4_ion_heap_secure_input_addr, omap4_ion_heap_secure_output_wfdhdcp_addr, omap4_ducati_heap_addr, omap4_ion_heap_tiler_mem_addr, omap4_ion_heap_nonsec_tiler_mem_addr); for (i = 0; i < omap4_ion_data.nr; i++) { struct ion_platform_heap *h = &omap4_ion_data.heaps[i]; switch (h->id) { case OMAP_ION_HEAP_SECURE_INPUT: h->base = omap4_ion_heap_secure_input_addr; h->size = omap4_ion_heap_secure_input_size; break; case OMAP_ION_HEAP_SECURE_OUTPUT_WFDHDCP: h->base = omap4_ion_heap_secure_output_wfdhdcp_addr; h->size = omap4_ion_heap_secure_output_wfdhdcp_size; break; case OMAP_ION_HEAP_NONSECURE_TILER: h->base = omap4_ion_heap_nonsec_tiler_mem_addr; h->size = omap4_ion_heap_nonsec_tiler_mem_size; break; case OMAP_ION_HEAP_TILER: h->base = omap4_ion_heap_tiler_mem_addr; h->size = omap4_ion_heap_tiler_mem_size; break; default: break; } pr_info("%s: %s id=%u [%lx-%lx] size=%x\n", __func__, h->name, h->id, h->base, h->base + h->size, h->size); } for (i = 0; i < omap4_ion_data.nr; i++) if (omap4_ion_data.heaps[i].type == ION_HEAP_TYPE_CARVEOUT || omap4_ion_data.heaps[i].type == OMAP_ION_HEAP_TYPE_TILER) { if (!omap4_ion_data.heaps[i].size) continue; ret = memblock_remove(omap4_ion_data.heaps[i].base, omap4_ion_data.heaps[i].size); if (omap4_ion_data.heaps[i].id == OMAP_ION_HEAP_SECURE_OUTPUT_WFDHDCP) { /* Reducing the actual size being mapped for Ion/Ducati as * secure component uses the remaining memory */ omap4_ion_data.heaps[i].size = omap4_ion_heap_secure_output_wfdhdcp_size >> 1; } if (ret) pr_err("memblock remove of %x@%lx failed\n", omap4_ion_data.heaps[i].size, omap4_ion_data.heaps[i].base); }
void __init omap_ion_init(void) { int i; int ret; system_512m = (omap_total_ram_size() == SZ_512M); /* carveout sizes */ omap4_smc_size = (SZ_1M * 2); if (system_512m) { omap4_ion_heap_secure_input_size = 0; omap4_ducati_heap_size = (SZ_1M * 55); omap4_ion_heap_nonsec_tiler_mem_size = 0; omap4_ion_heap_tiler_mem_size = 0; } else { omap4_ion_heap_secure_input_size = (SZ_1M * 20); omap4_ducati_heap_size = (SZ_1M * 128); /* Reducing carveout sizes used by ION. The expectation is * the memory will be dynamically allocated for tiler * instead of being carveout at start */ omap4_ion_heap_nonsec_tiler_mem_size = SZ_4K; omap4_ion_heap_tiler_mem_size = SZ_4K; } /* carveout addresses */ if (system_512m) { omap4_ducati_heap_addr = PLAT_PHYS_OFFSET + omap_total_ram_size() - omap4_ducati_heap_size; omap4_smc_addr = omap4_ducati_heap_addr - omap4_smc_size; omap4_ion_heap_secure_input_addr = omap4_smc_addr - omap4_ion_heap_secure_input_size; omap4_ion_heap_tiler_mem_addr = omap4_ion_heap_secure_input_addr - omap4_ion_heap_tiler_mem_size; omap4_ion_heap_nonsec_tiler_mem_addr = omap4_ion_heap_tiler_mem_addr - omap4_ion_heap_nonsec_tiler_mem_size; } else { omap4_smc_addr = PLAT_PHYS_OFFSET + omap_total_ram_size() - omap4_smc_size; omap4_ion_heap_secure_input_addr = omap4_smc_addr - omap4_ion_heap_secure_input_size; omap4_ducati_heap_addr = omap4_ion_heap_secure_input_addr - omap4_ducati_heap_size; omap4_ion_heap_tiler_mem_addr = omap4_ducati_heap_addr - omap4_ion_heap_tiler_mem_size; omap4_ion_heap_nonsec_tiler_mem_addr = omap4_ion_heap_tiler_mem_addr - omap4_ion_heap_nonsec_tiler_mem_size; } pr_info("omap4_total_ram_size = 0x%x\n" \ "omap4_smc_size = 0x%x\n" \ "omap4_ion_heap_secure_input_size = 0x%x\n" \ "omap4_ducati_heap_size = 0x%x\n" \ "omap4_ion_heap_tiler_mem_size = 0x%x\n" \ "omap4_ion_heap_nonsec_tiler_mem_size = 0x%x\n", omap_total_ram_size(), omap4_smc_size, omap4_ion_heap_secure_input_size, omap4_ducati_heap_size, omap4_ion_heap_tiler_mem_size, omap4_ion_heap_nonsec_tiler_mem_size); pr_info(" omap4_smc_addr = 0x%x\n" \ "omap4_ion_heap_secure_input_addr = 0x%x\n" \ "omap4_ducati_heap_addr = 0x%x\n" \ "omap4_ion_heap_tiler_mem_addr = 0x%x\n" \ "omap4_ion_heap_nonsec_tiler_mem_addr = 0x%x\n", omap4_smc_addr, omap4_ion_heap_secure_input_addr, omap4_ducati_heap_addr, omap4_ion_heap_tiler_mem_addr, omap4_ion_heap_nonsec_tiler_mem_addr); for (i = 0; i < omap4_ion_data.nr; i++) { struct ion_platform_heap *h = &omap4_ion_data.heaps[i]; switch (h->id) { case OMAP_ION_HEAP_SECURE_INPUT: h->base = omap4_ion_heap_secure_input_addr; h->size = omap4_ion_heap_secure_input_size; break; case OMAP_ION_HEAP_NONSECURE_TILER: h->base = omap4_ion_heap_nonsec_tiler_mem_addr; h->size = omap4_ion_heap_nonsec_tiler_mem_size; break; case OMAP_ION_HEAP_TILER: h->base = omap4_ion_heap_tiler_mem_addr; h->size = omap4_ion_heap_tiler_mem_size; break; default: break; } pr_info("%s: %s id=%u [%lx-%lx] size=%x\n", __func__, h->name, h->id, h->base, h->base + h->size, h->size); } for (i = 0; i < omap4_ion_data.nr; i++) if (omap4_ion_data.heaps[i].type == ION_HEAP_TYPE_CARVEOUT || omap4_ion_data.heaps[i].type == OMAP_ION_HEAP_TYPE_TILER) { ret = memblock_remove(omap4_ion_data.heaps[i].base, omap4_ion_data.heaps[i].size); pr_debug("%s: ion_heap[%d] name=%s, size=%dMB, addr=0x%lx\n", __func__, i, omap4_ion_data.heaps[i].name, (omap4_ion_data.heaps[i].size >> 20), omap4_ion_data.heaps[i].base); if (!omap4_ion_data.heaps[i].size) continue; if (ret) pr_err("memblock remove of %x@%lx failed\n", omap4_ion_data.heaps[i].size, omap4_ion_data.heaps[i].base); }
void __init omap_ion_init(void) { int i; int ret; u32 nonsecure = omap4_ion_pdata.nonsecure_tiler2d_size; system_512m = (omap_total_ram_size() == SZ_512M); /* carveout sizes */ omap4_smc_size = (SZ_1M * 3); if (system_512m) { omap4_ion_heap_secure_input_size = 0; omap4_ducati_heap_size = (SZ_1M * 83); omap4_ion_heap_nonsec_tiler_mem_size = 0; omap4_ion_heap_tiler_mem_size = 0; } else { #ifdef CONFIG_MACH_LGE omap4_ion_heap_secure_input_size = (SZ_1M * 16); #else omap4_ion_heap_secure_input_size = (SZ_1M * 90); #endif omap4_ducati_heap_size = (SZ_1M * 105); omap4_ion_heap_nonsec_tiler_mem_size = nonsecure; omap4_ion_heap_tiler_mem_size = (ALIGN(omap4_ion_pdata.tiler2d_size + nonsecure, SZ_2M) - nonsecure); } /* carveout addresses */ omap4_smc_addr = PLAT_PHYS_OFFSET + omap_total_ram_size() - omap4_smc_size; #ifdef CONFIG_MACH_LGE omap4_ion_heap_secure_input_addr = omap4_smc_addr - (SZ_1M * 90); #else omap4_ion_heap_secure_input_addr = omap4_smc_addr - omap4_ion_heap_secure_input_size; #endif omap4_ducati_heap_addr = omap4_ion_heap_secure_input_addr - omap4_ducati_heap_size; omap4_ion_heap_tiler_mem_addr = omap4_ducati_heap_addr - omap4_ion_heap_tiler_mem_size; omap4_ion_heap_nonsec_tiler_mem_addr = omap4_ion_heap_tiler_mem_addr - omap4_ion_heap_nonsec_tiler_mem_size; pr_info("omap4_total_ram_size = 0x%x\n" \ "omap4_smc_size = 0x%x\n" \ "omap4_ion_heap_secure_input_size = 0x%x\n" \ "omap4_ducati_heap_size = 0x%x\n" \ "omap4_ion_heap_tiler_mem_size = 0x%x\n" \ "omap4_ion_heap_nonsec_tiler_mem_size = 0x%x\n", omap_total_ram_size(), omap4_smc_size, omap4_ion_heap_secure_input_size, omap4_ducati_heap_size, omap4_ion_heap_tiler_mem_size, omap4_ion_heap_nonsec_tiler_mem_size); pr_info(" omap4_smc_addr = 0x%x\n" \ "omap4_ion_heap_secure_input_addr = 0x%x\n" \ "omap4_ducati_heap_addr = 0x%x\n" \ "omap4_ion_heap_tiler_mem_addr = 0x%x\n" \ "omap4_ion_heap_nonsec_tiler_mem_addr = 0x%x\n", omap4_smc_addr, omap4_ion_heap_secure_input_addr, omap4_ducati_heap_addr, omap4_ion_heap_tiler_mem_addr, omap4_ion_heap_nonsec_tiler_mem_addr); for (i = 0; i < omap4_ion_data.nr; i++) { struct ion_platform_heap *h = &omap4_ion_data.heaps[i]; switch (h->id) { case OMAP_ION_HEAP_SECURE_INPUT: h->base = omap4_ion_heap_secure_input_addr; h->size = omap4_ion_heap_secure_input_size; break; case OMAP_ION_HEAP_NONSECURE_TILER: h->base = omap4_ion_heap_nonsec_tiler_mem_addr; h->size = omap4_ion_heap_nonsec_tiler_mem_size; break; case OMAP_ION_HEAP_TILER: h->base = omap4_ion_heap_tiler_mem_addr; h->size = omap4_ion_heap_tiler_mem_size; break; default: break; } pr_info("%s: %s id=%u [%lx-%lx] size=%x\n", __func__, h->name, h->id, h->base, h->base + h->size, h->size); } for (i = 0; i < omap4_ion_data.nr; i++) if (omap4_ion_data.heaps[i].type == ION_HEAP_TYPE_CARVEOUT || omap4_ion_data.heaps[i].type == OMAP_ION_HEAP_TYPE_TILER) { ret = memblock_remove(omap4_ion_data.heaps[i].base, omap4_ion_data.heaps[i].size); if (!omap4_ion_data.heaps[i].size) continue; if (ret) pr_err("memblock remove of %x@%lx failed\n", omap4_ion_data.heaps[i].size, omap4_ion_data.heaps[i].base); } }