/* CPU table initialization */
static int __init rm696_opp_init(void)
{
int r = 0;
struct device *mpu_dev;
r = omap3_opp_init();
if (IS_ERR_VALUE(r) && (r != -EEXIST)) {
pr_err("opp default init failed\n");
return r;
}
mpu_dev = omap_device_get_by_hwmod_name("mpu");
if (IS_ERR(mpu_dev)) {
pr_err("no mpu_dev error\n");
return -ENODEV;
}
/* Enable MPU 800MHz and lower opps */
r = opp_enable(mpu_dev, 800000000);
if (r)
pr_err("failed to enable higher (800MHz) opp\n");
/* Enable MPU 1GHz and lower opps */
r = opp_enable(mpu_dev, 1000000000);
if (r)
pr_err("failed to enable higher (1GHz) opp\n");
return 0;
}
static void __init beagle_opp_init(void)
{
int r = 0;
/* Initialize the omap3 opp table */
if (omap3_opp_init()) {
pr_err("%s: opp default init failed\n", __func__);
return;
}
/* Custom OPP enabled for XM */
if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM || omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XMC) {
struct omap_hwmod *mh = omap_hwmod_lookup("mpu");
struct omap_hwmod *dh = omap_hwmod_lookup("iva");
struct device *dev;
if (!mh || !dh) {
pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
__func__, mh, dh);
r = -EINVAL;
} else {
/* Enable MPU 1GHz and lower opps */
dev = &mh->od->pdev.dev;
r = opp_enable(dev, 800000000);
r |= opp_enable(dev, 1000000000);
/* Enable IVA 800MHz and lower opps */
dev = &dh->od->pdev.dev;
r |= opp_enable(dev, 660000000);
r |= opp_enable(dev, 800000000);
}
if (r) {
pr_err("%s: failed to enable higher opp %d\n",
__func__, r);
/*
* Cleanup - disable the higher freqs - we dont care
* about the results
*/
dev = &mh->od->pdev.dev;
opp_disable(dev, 800000000);
opp_disable(dev, 1000000000);
dev = &dh->od->pdev.dev;
opp_disable(dev, 660000000);
opp_disable(dev, 800000000);
} else {
pr_err("%s: turbo OPPs enabled!\n", __func__);
}
}
}
/**
* omap4_opp_init() - initialize omap4 opp table
*/
static int __init omap5_opp_init(void)
{
int r = -ENODEV;
pr_info("Registering %d OPPs\n", ARRAY_SIZE(omap54xx_opp_def_list));
if (!cpu_is_omap54xx())
return r;
r = omap_init_opp_table(omap54xx_opp_def_list,
ARRAY_SIZE(omap54xx_opp_def_list));
if (!cpu_is_omap5432()) {
/* Enable scaling on the Core domain */
struct omap_hwmod *oh_mpu = omap_hwmod_lookup("l3_main_1");
struct platform_device *pdev;
if (!oh_mpu || !oh_mpu->od) {
return r;
} else {
pdev = oh_mpu->od->pdev;
r = opp_enable(&pdev->dev, 133000000);
if (r < 0) {
dev_err(&pdev->dev,
"unable to enable Core LOW OPP for 5430 device!\n");
return r;
}
}
pr_info("Added LOW OPP to CORE domain - this is expected on 5430 device\n");
} else {
pr_info("Did not LOW OPP to CORE domain - this is expected on 5432 device\n");
}
return r;
}
static void __init overo_opp_init(void)
{
int r = 0;
/* Initialize the omap3 opp table */
if (omap3_opp_init()) {
pr_err("%s: opp default init failed\n", __func__);
return;
}
/* Custom OPP enabled for 36/3730 */
if (cpu_is_omap3630()) {
struct device *mpu_dev, *iva_dev;
mpu_dev = omap_device_get_by_hwmod_name("mpu");
if (omap3_has_iva())
iva_dev = omap_device_get_by_hwmod_name("iva");
if (!mpu_dev) {
pr_err("%s: Aiee.. no mpu device? %p\n",
__func__, mpu_dev);
return;
}
/* Enable MPU 1GHz and lower opps */
r = opp_enable(mpu_dev, 800000000);
r |= opp_enable(mpu_dev, 1000000000);
if (omap3_has_iva()) {
/* Enable IVA 800MHz and lower opps */
r |= opp_enable(iva_dev, 660000000);
r |= opp_enable(iva_dev, 800000000);
}
if (r) {
pr_err("%s: failed to enable higher opp %d\n",
__func__, r);
opp_disable(mpu_dev, 800000000);
opp_disable(mpu_dev, 1000000000);
if (omap3_has_iva()) {
opp_disable(iva_dev, 660000000);
opp_disable(iva_dev, 800000000);
}
}
}
return;
}
static int __init beagle_opp_init(void)
{
int r = 0;
if (!machine_is_omap3_beagle())
return 0;
/* Initialize the omap3 opp table if not already created. */
r = omap3_opp_init();
if (r < 0 && (r != -EEXIST)) {
pr_err("%s: opp default init failed\n", __func__);
return r;
}
/* Custom OPP enabled for all xM versions */
if (cpu_is_omap3630()) {
struct device *mpu_dev, *iva_dev;
mpu_dev = get_cpu_device(0);
iva_dev = omap_device_get_by_hwmod_name("iva");
if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
__func__, mpu_dev, iva_dev);
return -ENODEV;
}
/* Enable MPU 1GHz and lower opps */
r = opp_enable(mpu_dev, 800000000);
/* TODO: MPU 1GHz needs SR and ABB */
/* Enable IVA 800MHz and lower opps */
r |= opp_enable(iva_dev, 660000000);
/* TODO: DSP 800MHz needs SR and ABB */
if (r) {
pr_err("%s: failed to enable higher opp %d\n",
__func__, r);
/*
* Cleanup - disable the higher freqs - we dont care
* about the results
*/
opp_disable(mpu_dev, 800000000);
opp_disable(iva_dev, 660000000);
}
}
return 0;
}
static void __init beagle_opp_init(void)
{
int r = 0;
/* Initialize the omap3 opp table */
if (omap3_opp_init()) {
pr_err("%s: opp default init failed\n", __func__);
return;
}
/* Custom OPP enabled for all xM versions */
if (cpu_is_omap3630()) {
struct omap_hwmod *mh = omap_hwmod_lookup("mpu");
struct omap_hwmod *dh = omap_hwmod_lookup("iva");
struct device *dev;
if (!mh || !dh) {
pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
__func__, mh, dh);
return;
}
/* Enable MPU 1GHz and lower opps */
dev = &mh->od->pdev.dev;
r = opp_enable(dev, 800000000);
/* TODO: MPU 1GHz needs SR and ABB */
/* Enable IVA 800MHz and lower opps */
dev = &dh->od->pdev.dev;
r |= opp_enable(dev, 660000000);
/* TODO: DSP 800MHz needs SR and ABB */
if (r) {
pr_err("%s: failed to enable higher opp %d\n",
__func__, r);
/*
* Cleanup - disable the higher freqs - we dont care
* about the results
*/
dev = &mh->od->pdev.dev;
opp_disable(dev, 800000000);
dev = &dh->od->pdev.dev;
opp_disable(dev, 660000000);
}
}
return;
}
/**
* omap3_opp_enable_720Mhz() - Enable the OPP corresponding to 720MHz
*
* This function would be executed only if the silicon is capable of
* running at the 720MHz.
*/
static int __init omap3_opp_enable_720Mhz(void)
{
int r = -ENODEV;
struct omap_hwmod *oh_mpu = omap_hwmod_lookup("mpu");
struct omap_hwmod *oh_iva;
struct platform_device *pdev;
if (!oh_mpu || !oh_mpu->od) {
goto err;
} else {
pdev = &oh_mpu->od->pdev;
r = opp_enable(&pdev->dev, 720000000);
if (r < 0) {
dev_err(&pdev->dev,
"opp_enable() failed for mpu@720MHz");
goto err;
}
}
if (omap3_has_iva()) {
oh_iva = omap_hwmod_lookup("iva");
if (!oh_iva || !oh_iva->od) {
r = -ENODEV;
goto err;
} else {
pdev = &oh_iva->od->pdev;
r = opp_enable(&pdev->dev, 520000000);
if (r < 0) {
dev_err(&pdev->dev,
"opp_enable() failed for iva@520MHz");
goto err;
}
}
}
dev_info(&pdev->dev, "Enabled OPP corresponding to 720MHz\n");
err:
return r;
}
static void __init beagle_opp_init(void)
{
int r = 0;
/* Initialize the omap3 opp table */
if (omap3_opp_init()) {
pr_err("%s: opp default init failed\n", __func__);
return;
}
/* Custom OPP enabled for all xM versions */
if (cpu_is_omap3630()) {
struct device *mpu_dev, *iva_dev;
mpu_dev = omap_device_get_by_hwmod_name("mpu");
iva_dev = omap_device_get_by_hwmod_name("iva");
if (!mpu_dev || !iva_dev) {
pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
__func__, mpu_dev, iva_dev);
return;
}
/* Enable MPU 1GHz and lower opps */
r = opp_enable(mpu_dev, 800000000);
/* TODO: MPU 1GHz needs SR and ABB */
/* Enable IVA 800MHz and lower opps */
r |= opp_enable(iva_dev, 660000000);
/* TODO: DSP 800MHz needs SR and ABB */
if (r) {
pr_err("%s: failed to enable higher opp %d\n",
__func__, r);
/*
* Cleanup - disable the higher freqs - we dont care
* about the results
*/
opp_disable(mpu_dev, 800000000);
opp_disable(iva_dev, 660000000);
}
}
return;
}
/**
* omap4_mpu_opp_enable() - helper to enable the OPP
* @freq: frequency to enable
*/
static void __init omap4_mpu_opp_enable(unsigned long freq)
{
struct device *mpu_dev;
int r;
mpu_dev = omap2_get_mpuss_device();
if (!mpu_dev) {
pr_err("%s: no mpu_dev, did not enable f=%ld\n", __func__,
freq);
return;
}
r = opp_enable(mpu_dev, freq);
if (r < 0)
dev_err(mpu_dev, "%s: opp_enable failed(%d) f=%ld\n", __func__,
r, freq);
}
/**
* omap4_opp_enable() - helper to enable the OPP
* @oh_name: name of the hwmod device
* @freq: frequency to enable
*/
static void __init omap4_opp_enable(const char *oh_name, unsigned long freq)
{
struct device *dev;
int r;
dev = omap_hwmod_name_get_dev(oh_name);
if (IS_ERR(dev)) {
pr_err("%s: no %s device, did not enable f=%ld\n", __func__,
oh_name, freq);
return;
}
r = opp_enable(dev, freq);
if (r < 0)
dev_err(dev, "%s: opp_enable failed(%d) f=%ld\n", __func__,
r, freq);
}
static int __init omap4_opp_enable(unsigned long freq)
{
int r = -ENODEV;
struct device *mpu_dev;
struct omap_opp *opp;
mpu_dev = omap2_get_mpuss_device();
if (mpu_dev) {
opp = opp_find_freq_exact(mpu_dev, freq, false);
if (IS_ERR(opp))
goto err;
r = opp_enable(opp);
if (r < 0) {
dev_err(mpu_dev,
"opp_enable() failed for mpu@%ld", freq);
goto err;
}
}
err:
return r;
}
int __init omap4_pm_init_opp_table(void)
{
struct omap_opp_def *opp_def;
struct device *dev;
struct clk *gpu_fclk;
int i, r;
#if defined (CONFIG_MACH_LGE_CX2)
struct omap_opp *tnt_opp;
int has_tnt_opp = 0;
#endif
/*
* Allow multiple calls, but initialize only if not already initalized
* even if the previous call failed, coz, no reason we'd succeed again
*/
if (omap4_table_init)
return 0;
omap4_table_init = 1;
if (omap_rev() <= OMAP4430_REV_ES2_0)
opp_def = omap44xx_pre_es2_1_opp_def_list;
else
opp_def = omap44xx_opp_def_list;
for (i = 0; i < omap44xx_opp_def_size; i++) {
r = opp_add(opp_def);
if (r)
pr_err("unable to add OPP %ld Hz for %s\n",
opp_def->freq, opp_def->hwmod_name);
opp_def++;
}
dpll_mpu_clk = clk_get(NULL, "dpll_mpu_ck");
iva_clk = clk_get(NULL, "dpll_iva_m5x2_ck");
dsp_clk = clk_get(NULL, "dpll_iva_m4x2_ck");
l3_clk = clk_get(NULL, "dpll_core_m5x2_ck");
core_m2_clk = clk_get(NULL, "dpll_core_m2_ck");
core_m3_clk = clk_get(NULL, "dpll_core_m3x2_ck");
core_m6_clk = clk_get(NULL, "dpll_core_m6x2_ck");
core_m7_clk = clk_get(NULL, "dpll_core_m7x2_ck");
sgx_clk = clk_get(NULL, "dpll_per_m7x2_ck");
gpu_fclk = clk_get(NULL, "gpu_fck");
per_m3_clk = clk_get(NULL, "dpll_per_m3x2_ck");
per_m6_clk = clk_get(NULL, "dpll_per_m6x2_ck");
abe_clk = clk_get(NULL, "abe_clk");
fdif_clk = clk_get(NULL, "fdif_fck");
hsi_clk = clk_get(NULL, "hsi_fck");
/* Set SGX parent to PER DPLL */
clk_set_parent(gpu_fclk, sgx_clk);
clk_put(gpu_fclk);
/* Populate the set rate and get rate for mpu, iva, dsp and l3 device */
dev = omap2_get_mpuss_device();
if (dev)
opp_populate_rate_fns(dev, omap4_mpu_set_rate,
omap4_mpu_get_rate);
#if defined (CONFIG_MACH_LGE_CX2)
/* Enable 1.2Gz OPP for silicon that supports it
* TODO: determine if FUSE_OPP_VDD_MPU_3 is a reliable source to
* determine 1.2Gz availability.
*/
has_tnt_opp = __raw_readl(OMAP2_L4_IO_ADDRESS(CTRL_FUSE_OPP_VDD_MPU_3));
has_tnt_opp &= 0xFFFFFF;
if (has_tnt_opp) {
tnt_opp = opp_find_freq_exact(dev, TNT_FREQ, false);
if (IS_ERR(tnt_opp))
{
printk(KERN_ERR"[1.2GHz support Fail] %d\n",tnt_opp);
pr_err("unable to find OPP for 1.2Gz\n");
}
else
{
printk(KERN_ERR"[1.2GHz support success] %d\n",tnt_opp);
opp_enable(tnt_opp);
}
}
#endif
dev = omap2_get_iva_device();
if (dev)
opp_populate_rate_fns(dev, omap4_iva_set_rate,
omap4_iva_get_rate);
dev = omap4_get_dsp_device();
if (dev)
opp_populate_rate_fns(dev, omap4_iva_set_rate,
omap4_iva_get_rate);
dev = omap2_get_l3_device();
if (dev)
opp_populate_rate_fns(dev, omap4_l3_set_rate,
omap4_l3_get_rate);
/*
* This is a temporary hack since emif clocks cannot be scaled
* on ES1.0 and ES2.0. Once everybody has migrated to ES2.1 this
* check can be remove.
*/
if (omap_rev() > OMAP4430_REV_ES2_0) {
dev = find_dev_ptr("emif1");
if (dev)
opp_populate_rate_fns(dev, omap4_emif_set_rate,
omap4_emif_get_rate);
dev = find_dev_ptr("emif2");
if (dev)
opp_populate_rate_fns(dev, omap4_emif_set_rate,
omap4_emif_get_rate);
}
dev = find_dev_ptr("omap-aess-audio");
if (dev)
opp_populate_rate_fns(dev, omap4_abe_set_rate,
omap4_abe_get_rate);
dev = find_dev_ptr("gpu");
if (dev)
opp_populate_rate_fns(dev, omap4_sgx_set_rate,
omap4_sgx_get_rate);
dev = find_dev_ptr("fdif");
if (dev)
opp_populate_rate_fns(dev, omap4_fdif_set_rate,
omap4_fdif_get_rate);
dev = find_dev_ptr("hsi");
if (dev)
opp_populate_rate_fns(dev, omap4_hsi_set_rate,
omap4_hsi_get_rate);
return 0;
}
