void usb_init(void)
{
osal_sem_t *sem;
osal_task_t *task;
memset(&wifi_usb_adapter,0,sizeof(wifi_usb_adapter_t));
sem = osal_sem_create("usbh", 0);
osal_assert(sem != NULL);
USB_Host_Semphore = sem;
sem = osal_sem_create("usbc", 0);
osal_assert(sem != NULL);
USB_CtrlReq_Semphore = sem;
USBH_Init(&USB_OTG_Core_dev,
USB_OTG_FS_CORE_ID,
&USB_Host,
&USBH_Class_Cb,
&USBH_USR_Cb);
/* Finally start USB host process thread */
task = osal_task_create("usbh", usbh_thread_entry, NULL, RT_USBH_THREAD_STACK_SIZE, \
RT_USBH_THREAD_PRIORITY);
osal_assert(task != NULL);
}
INT32 wmt_ctrl (P_WMT_CTRL_DATA pWmtCtrlData)
{
UINT32 ctrlId = pWmtCtrlData->ctrlId;
if (NULL == pWmtCtrlData) {
osal_assert(0);
return -1;
}
/*1sanity check, including wmtCtrlId*/
if ( (NULL == pWmtCtrlData)
|| (WMT_CTRL_MAX <= ctrlId) )
/* || (ctrlId < WMT_CTRL_HW_PWR_OFF) ) [FixMe][GeorgeKuo]: useless comparison */
{
osal_assert(NULL != pWmtCtrlData);
osal_assert(WMT_CTRL_MAX > ctrlId);
/* osal_assert(ctrlId >= WMT_CTRL_HW_PWR_OFF); [FixMe][GeorgeKuo]: useless comparison */
return -2;
}
// TODO: [FixMe][GeorgeKuo] do sanity check to const function table when init and skip checking here
if (wmt_ctrl_func[ctrlId]) {
/*call servicd handling API*/
return (*(wmt_ctrl_func[ctrlId]))(pWmtCtrlData); /* serviceHandlerPack[ctrlId].serviceHandler */
}
else {
osal_assert(NULL != wmt_ctrl_func[ctrlId]);
return -3;
}
}
INT32 wmt_conf_read_file(VOID)
{
INT32 ret = -1;
osal_memset(&gDevWmt.rWmtGenConf, 0, osal_sizeof(gDevWmt.rWmtGenConf));
osal_memset(&gDevWmt.pWmtCfg, 0, osal_sizeof(gDevWmt.pWmtCfg));
#if 1
osal_memset(&gDevWmt.cWmtcfgName[0], 0, osal_sizeof(gDevWmt.cWmtcfgName));
osal_strncat(&(gDevWmt.cWmtcfgName[0]), CUST_CFG_WMT_PREFIX, osal_sizeof(CUST_CFG_WMT_PREFIX));
osal_strncat(&(gDevWmt.cWmtcfgName[0]), CUST_CFG_WMT, osal_sizeof(CUST_CFG_WMT));
#endif
if (!osal_strlen(&(gDevWmt.cWmtcfgName[0]))) {
WMT_ERR_FUNC("empty Wmtcfg name\n");
osal_assert(0);
return ret;
}
WMT_INFO_FUNC("WMT config file:%s\n", &(gDevWmt.cWmtcfgName[0]));
if (0 == wmt_dev_patch_get(&gDevWmt.cWmtcfgName[0], (osal_firmware **) &gDevWmt.pWmtCfg, 0)) {
/*get full name patch success */
WMT_INFO_FUNC("get full file name(%s) buf(0x%p) size(%d)\n",
&gDevWmt.cWmtcfgName[0], gDevWmt.pWmtCfg->data, gDevWmt.pWmtCfg->size);
if (0 == wmt_conf_parse(&gDevWmt, (const PINT8)gDevWmt.pWmtCfg->data, gDevWmt.pWmtCfg->size)) {
/*config file exists */
gDevWmt.rWmtGenConf.cfgExist = 1;
WMT_INFO_FUNC("&gDevWmt.rWmtGenConf=%p\n", &gDevWmt.rWmtGenConf);
ret = 0;
} else {
WMT_ERR_FUNC("wmt conf parsing fail\n");
osal_assert(0);
ret = -1;
}
wmt_dev_patch_put((osal_firmware **) &gDevWmt.pWmtCfg);
/*
if (gDevWmt.pWmtCfg)
{
if (gDevWmt.pWmtCfg->data)
{
osal_free(gDevWmt.pWmtCfg->data);
}
osal_free(gDevWmt.pWmtCfg);
gDevWmt.pWmtCfg = 0;
}
*/
return ret;
} else {
WMT_ERR_FUNC("read %s file fails\n", &(gDevWmt.cWmtcfgName[0]));
osal_assert(0);
gDevWmt.rWmtGenConf.cfgExist = 0;
return ret;
}
}
INT32
wmt_ctrl_tx_ex (
const UINT8 *pData,
const UINT32 size,
UINT32 *writtenSize,
const MTK_WCN_BOOL bRawFlag
)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
INT32 iRet;
if (NULL != writtenSize) {
*writtenSize = 0;
}
/* sanity check */
if (0 == size) {
WMT_WARN_FUNC("size to tx is 0\n");
osal_assert(size);
return -1;
}
/* if STP is not enabled yet, can't use this function. Use tx_raw instead */
if ( !osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state) ||
!osal_test_bit(WMT_STAT_STP_EN, &pDev->state) ) {
WMT_ERR_FUNC("wmt state(0x%lx) \n", pDev->state);
osal_assert(osal_test_bit(WMT_STAT_STP_EN, &pDev->state));
osal_assert(osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state));
return -2;
}
/* sanity ok, proceeding tx operation */
/*retval = mtk_wcn_stp_send_data(data, size, WMTDRV_TYPE_WMT);*/
mtk_wcn_stp_flush_rx_queue(WMT_TASK_INDX);
if (bRawFlag) {
iRet = mtk_wcn_stp_send_data_raw(pData, size, WMT_TASK_INDX);
}
else {
iRet = mtk_wcn_stp_send_data(pData, size, WMT_TASK_INDX);
}
if (iRet != size){
WMT_WARN_FUNC("write(%d) written(%d)\n", size, iRet);
osal_assert(iRet == size);
}
if (writtenSize) {
*writtenSize = iRet;
}
return 0;
}
static INT32
stp_dbg_add_pkt (
MTKSTP_DBG_T*stp_dbg,
struct stp_dbg_pkt_hdr *hdr,
const UINT8 *body
)
{
struct stp_dbg_pkt stp_pkt;
UINT32 hdr_sz = osal_sizeof(struct stp_dbg_pkt_hdr);
UINT32 body_sz = 0;
osal_assert(stp_dbg);
if (hdr->dbg_type == STP_DBG_PKT){
body_sz = (hdr->len <= STP_PKT_SZ)?(hdr->len):(STP_PKT_SZ);
}else{
body_sz = (hdr->len <= STP_DMP_SZ)?(hdr->len):(STP_DMP_SZ);
}
hdr->no = stp_dbg->pkt_trace_no++;
osal_memcpy((UINT8 *)&stp_pkt.hdr, (UINT8 *)hdr, hdr_sz);
if (body != NULL){
osal_memcpy((UINT8 *)&stp_pkt.raw[0], body, body_sz);
}
stp_gdb_notify_btm_dmp_wq(stp_dbg,(CHAR *) &stp_pkt, hdr_sz + body_sz);
return 0;
}
static USBH_Status _dev_probe ( USB_OTG_CORE_HANDLE *pdev, void * phost)
{
osal_task_t *task;
task = osal_task_create("usbm", _dev_probe_entry, NULL, RT_THREAD_STACK_SIZE, \
RT_USBEMU_THREAD_PRIORITY);
osal_assert(task != NULL);
return USBH_OK;
}
void wnet_init(void)
{
int i;
wnet_envar_t *p_wnet;
p_wnet_envar = &cms_envar.wnet;
p_wnet = p_wnet_envar;
memset(p_wnet, 0, WNET_ENVAR_T_LEN);
memcpy(&p_wnet->working_param, &cms_param.wnet, WNET_CONFIG_T_LEN);
/* Initialize the txbuf queue. */
INIT_LIST_HEAD(&p_wnet->txbuf_waiting_list);
INIT_LIST_HEAD(&p_wnet->txbuf_free_list);
for(i = 0; i< TXBUF_NUM; i++)
{
list_add_tail(&p_wnet->txbuf[i].list, &p_wnet->txbuf_free_list);
}
/* Initialize the rxbuf queue. */
INIT_LIST_HEAD(&p_wnet->rxbuf_waiting_list);
INIT_LIST_HEAD(&p_wnet->rxbuf_free_list);
for(i = 0; i < RXBUF_NUM; i++)
{
list_add_tail(&p_wnet->rxbuf[i].list, &p_wnet->rxbuf_free_list);
}
/* os object for wnet */
p_wnet->sem_wnet_tx = osal_sem_create("wntx", 0);
osal_assert(p_wnet->sem_wnet_tx != NULL);
p_wnet->sem_wnet_rx = osal_sem_create("wnrx", 0);
osal_assert(p_wnet->sem_wnet_rx != NULL);
p_wnet->task_wnet_tx = osal_task_create("wntx",
wnet_tx_thread_entry, p_wnet, RT_THREAD_STACK_SIZE, RT_WNETTX_THREAD_PRIORITY);
osal_assert(p_wnet->task_wnet_tx != NULL);
p_wnet->task_wnet_rx = osal_task_create("wnrx",
wnet_rx_thread_entry, p_wnet, RT_THREAD_STACK_SIZE, RT_WNETRX_THREAD_PRIORITY);
osal_assert(p_wnet->task_wnet_rx != NULL);
}
int rt_key_init(void)
{
osal_task_t *key_tid;
sys_envar_t *p_sys = &cms_envar.sys;
key_tid = osal_task_create("t-key",
key_thread_entry, p_sys,
RT_KEY_THREAD_STACK_SIZE, RT_KEY_THREAD_PRIORITY);
osal_assert(key_tid != NULL);
return 0;
}
long osal_is_err(int fp_id)
{
bool err;
int val = 0;
if(fp_id >= 1 && fp_id < OSAL_MAX_FP_COUNT)
{
val = down_interruptible(&osal_fp_sem);
err = IS_ERR(g_osal_fp[fp_id]);
up(&osal_fp_sem);
return err;
}
osal_assert(0);
return 1;
}
INT32 wmt_ctrl_rx(P_WMT_CTRL_DATA pWmtCtrlData/*UINT8 *pBuff, UINT32 buffLen, UINT32 *readSize*/)
{
P_DEV_WMT pDev = &gDevWmt; /* single instance */
INT32 readLen;
LONG waitRet = -1;
UINT8 *pBuff = (UINT8 *)pWmtCtrlData->au4CtrlData[0];
UINT32 buffLen = pWmtCtrlData->au4CtrlData[1];
UINT32 *readSize = (UINT32 *)pWmtCtrlData->au4CtrlData[2];
if (readSize) {
*readSize = 0;
}
/* sanity check */
if (!buffLen ) {
WMT_WARN_FUNC("buffLen = 0\n");
osal_assert(buffLen);
return 0;
}
#if 0
if (!pDev) {
WMT_WARN_FUNC("gpDevWmt = NULL\n");
osal_assert(pDev);
return -1;
}
#endif
if (!osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state)) {
WMT_WARN_FUNC("state(0x%lx) \n", pDev->state);
osal_assert(osal_test_bit(WMT_STAT_STP_OPEN, &pDev->state));
return -2;
}
/* sanity ok, proceeding rx operation */
/* read_len = mtk_wcn_stp_receive_data(data, size, WMT_TASK_INDX); */
readLen = mtk_wcn_stp_receive_data(pBuff, buffLen, WMT_TASK_INDX);
while (readLen == 0) { // got nothing, wait for STP's signal
WMT_LOUD_FUNC("before wmt_dev_rx_timeout\n");
//iRet = wait_event_interruptible(pdev->rWmtRxWq, osal_test_bit(WMT_STAT_RX, &pdev->state));
//waitRet = wait_event_interruptible_timeout(pDev->rWmtRxWq, osal_test_bit(WMT_STAT_RX, &pdev->state), msecs_to_jiffies(WMT_LIB_RX_TIMEOUT));
pDev->rWmtRxWq.timeoutValue = WMT_LIB_RX_TIMEOUT;
//waitRet = osal_wait_for_event_bit_timeout(&pDev->rWmtRxWq, &pDev->state, WMT_STAT_RX);
waitRet = wmt_dev_rx_timeout(&pDev->rWmtRxWq);
WMT_LOUD_FUNC("wmt_dev_rx_timeout returned\n");
if (0 == waitRet) {
WMT_ERR_FUNC("wmt_dev_rx_timeout: timeout,jiffies(%lu),timeoutvalue(%d) \n",
jiffies,pDev->rWmtRxWq.timeoutValue);
return -1;
}
else if (waitRet < 0) {
WMT_WARN_FUNC("wmt_dev_rx_timeout: interrupted by signal (%ld)\n", waitRet);
return waitRet;
}
WMT_DBG_FUNC("wmt_dev_rx_timeout, iRet(%ld)\n", waitRet);
/* read_len = mtk_wcn_stp_receive_data(data, size, WMT_TASK_INDX); */
readLen = mtk_wcn_stp_receive_data(pBuff, buffLen, WMT_TASK_INDX);
if (0 == readLen) {
WMT_WARN_FUNC("wmt_ctrl_rx be signaled, but no rx data(%ld)\n", waitRet);
}
WMT_DBG_FUNC("readLen(%d) \n", readLen);
}
if (readSize) {
*readSize = readLen ;
}
return 0;
}
// TODO: [ChangeFeature][George] refine this function name for general filesystem read operation, not patch only.
INT32 wmt_dev_patch_get (
UCHAR *pPatchName,
osal_firmware **ppPatch,
INT32 padSzBuf
)
{
INT32 iRet = -1;
osal_firmware *pfw;
uid_t orig_uid;
gid_t orig_gid;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
//struct cred *cred = get_task_cred(current);
struct cred *cred = (struct cred *)get_current_cred();
#endif
mm_segment_t orig_fs = get_fs();
if (*ppPatch) {
WMT_WARN_FUNC("f/w patch already exists \n");
if ((*ppPatch)->data) {
vfree((*ppPatch)->data);
}
kfree(*ppPatch);
*ppPatch = NULL;
}
if (!osal_strlen(pPatchName)) {
WMT_ERR_FUNC("empty f/w name\n");
osal_assert((osal_strlen(pPatchName) > 0));
return -1;
}
pfw = kzalloc(sizeof(osal_firmware), /*GFP_KERNEL*/GFP_ATOMIC);
if (!pfw) {
WMT_ERR_FUNC("kzalloc(%d) fail\n", sizeof(osal_firmware));
return -2;
}
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
orig_uid = cred->fsuid;
orig_gid = cred->fsgid;
cred->fsuid = cred->fsgid = 0;
#else
orig_uid = current->fsuid;
orig_gid = current->fsgid;
current->fsuid = current->fsgid = 0;
#endif
set_fs(get_ds());
/* load patch file from fs */
iRet = wmt_dev_read_file(pPatchName, &pfw->data, 0, padSzBuf);
set_fs(orig_fs);
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
cred->fsuid = orig_uid;
cred->fsgid = orig_gid;
#else
current->fsuid = orig_uid;
current->fsgid = orig_gid;
#endif
if (iRet > 0) {
pfw->size = iRet;
*ppPatch = pfw;
WMT_DBG_FUNC("load (%s) to addr(0x%p) success\n", pPatchName, pfw->data);
return 0;
}
else {
kfree(pfw);
*ppPatch = NULL;
WMT_ERR_FUNC("load file (%s) fail, iRet(%d) \n", pPatchName, iRet);
return -1;
}
}
static INT32 _stp_btm_handler(MTKSTP_BTM_T *stp_btm, P_STP_BTM_OP pStpOp)
{
INT32 ret = -1;
INT32 dump_sink = 1; //core dump target, 0: aee; 1: netlink
static UINT32 counter = 0;
UINT32 full_dump_left = STP_FULL_DUMP_TIME;
UINT32 page_counter = 0;
ENUM_STP_FW_ISSUE_TYPE issue_type;
if (NULL == pStpOp)
{
return -1;
}
switch(pStpOp->opId)
{
case STP_OPID_BTM_EXIT:
// TODO: clean all up?
ret = 0;
break;
/*tx timeout retry*/
case STP_OPID_BTM_RETRY:
stp_do_tx_timeout();
ret = 0;
break;
/*whole chip reset*/
case STP_OPID_BTM_RST:
STP_BTM_INFO_FUNC("whole chip reset start!\n");
STP_BTM_INFO_FUNC("....+\n");
if(stp_btm->wmt_notify)
{
stp_btm->wmt_notify(BTM_RST_OP);
ret = 0;
}
else
{
STP_BTM_ERR_FUNC("stp_btm->wmt_notify is NULL.");
ret = -1;
}
STP_BTM_INFO_FUNC("whole chip reset end!\n");
break;
case STP_OPID_BTM_DBG_DUMP:
/*Notify the wmt to get dump data*/
STP_BTM_DBG_FUNC("wmt dmp notification\n");
dump_sink = ((stp_btm->wmt_notify(BTM_GET_AEE_SUPPORT_FLAG) == MTK_WCN_BOOL_TRUE) ? 0 : 1);
if (dump_sink == 0) {
_stp_btm_put_dump_to_aee();
} else if (dump_sink == 1) {
_stp_btm_put_dump_to_nl();
} else {
STP_BTM_ERR_FUNC("unknown sink %d\n", dump_sink);
}
break;
case STP_OPID_BTM_DUMP_TIMEOUT:
// Flush dump data, and reset compressor
STP_BTM_INFO_FUNC("Flush dump data\n");
wcn_core_dump_flush(0,MTK_WCN_BOOL_TRUE);
break;
case STP_OPID_BTM_POLL_CPUPCR:
do{
UINT32 times;
UINT32 sleep;
times = pStpOp->au4OpData[0];
sleep = pStpOp->au4OpData[1];
ret = stp_dbg_poll_cpupcr(times, sleep,0);
ret += stp_dbg_poll_dmaregs(times, sleep);
}while(0);
break;
case STP_OPID_BTM_PAGED_DUMP:
g_paged_dump_len = 0;
issue_type = STP_FW_ASSERT_ISSUE;
wmt_plat_set_host_dump_state(STP_HOST_DUMP_NOT_START);
page_counter = 0;
do{
UINT32 loop_cnt1 = 0;
UINT32 loop_cnt2 = 0;
ENUM_HOST_DUMP_STATE host_state;
ENUM_CHIP_DUMP_STATE chip_state;
UINT32 dump_phy_addr = 0;
UINT8 *dump_vir_addr = NULL;
UINT32 dump_len = 0;
UINT32 isEnd = 0;
P_CONSYS_EMI_ADDR_INFO p_emi_ctrl_state_info;
p_emi_ctrl_state_info = wmt_plat_get_emi_phy_add();
osal_assert(p_emi_ctrl_state_info);
host_state = (ENUM_HOST_DUMP_STATE)wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_host_sync_state);
if(STP_HOST_DUMP_NOT_START == host_state)
{
counter++;
STP_BTM_INFO_FUNC("counter(%d)\n",counter);
osal_sleep_ms(100);
}
else
{
counter = 0;
}
while(1)
{
chip_state = (ENUM_CHIP_DUMP_STATE)wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_state);
if(STP_CHIP_DUMP_PUT_DONE == chip_state){
STP_BTM_INFO_FUNC("chip put done\n");
break;
}
else
{
STP_BTM_INFO_FUNC("waiting chip put done\n");
STP_BTM_INFO_FUNC("chip_state: %d\n", chip_state);
loop_cnt1 ++;
osal_sleep_ms(5);
}
if(loop_cnt1 > 10)
goto paged_dump_end;
}
wmt_plat_set_host_dump_state(STP_HOST_DUMP_GET);
dump_phy_addr = wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_addr);
if(!dump_phy_addr)
{
STP_BTM_ERR_FUNC("get paged dump phy address fail\n");
ret = -1;
break;
}
dump_vir_addr = wmt_plat_get_emi_virt_add(dump_phy_addr - p_emi_ctrl_state_info->emi_phy_addr);
if(!dump_vir_addr)
{
STP_BTM_ERR_FUNC("get paged dump phy address fail\n");
ret = -2;
break;
}
dump_len = wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_len);
STP_BTM_INFO_FUNC("dump_phy_ddr(%08x),dump_vir_add(0x%p),dump_len(%d)\n",dump_phy_addr,dump_vir_addr,dump_len);
/*move dump info according to dump_addr & dump_len*/
#if 1
osal_memcpy(&g_paged_dump_buffer[0],dump_vir_addr,dump_len);
_stp_dump_emi_dump_buffer(&g_paged_dump_buffer[0],dump_len);
if(0 == page_counter)//do fw assert infor paser in first paged dump
{
if(1 == stp_dbg_get_host_trigger_assert())
{
issue_type = STP_HOST_TRIGGER_FW_ASSERT;
}
ret = stp_dbg_set_fw_info(&g_paged_dump_buffer[0],512,issue_type);
if(ret)
{
STP_BTM_ERR_FUNC("set fw issue infor fail(%d),maybe fw warm reset...\n",ret);
stp_dbg_set_fw_info("Fw Warm reset",osal_strlen("Fw Warm reset"),STP_FW_WARM_RST_ISSUE);
}
}
if(dump_len <= 32*1024){
ret = stp_dbg_aee_send(&g_paged_dump_buffer[0],dump_len, 0);
if(ret == 0){
STP_BTM_INFO_FUNC("aee send ok!\n");
} else if (ret == 1) {
STP_BTM_INFO_FUNC("aee send fisish!\n");
} else {
STP_BTM_ERR_FUNC("aee send error!\n");
}
} else {
STP_BTM_ERR_FUNC("dump len is over than 32K(%d)\n",dump_len);
}
g_paged_dump_len += dump_len;
STP_BTM_INFO_FUNC("dump len update(%d)\n",g_paged_dump_len);
#endif
wmt_plat_update_host_sync_num();
wmt_plat_set_host_dump_state(STP_HOST_DUMP_GET_DONE);
STP_BTM_INFO_FUNC("host sync num(%d),chip sync num(%d)\n",
wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_host_sync_num),
wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_num));
page_counter++;
STP_BTM_INFO_FUNC("\n\n++ paged dump counter(%d) ++\n\n\n",page_counter);
while(1)
{
chip_state = (ENUM_CHIP_DUMP_STATE)wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_state);
if(STP_CHIP_DUMP_END == chip_state)
{
STP_BTM_INFO_FUNC("chip put end\n");
wmt_plat_set_host_dump_state(STP_HOST_DUMP_END);
break;
}
else
{
STP_BTM_INFO_FUNC("waiting chip put end\n");
loop_cnt2++;
osal_sleep_ms(10);
}
if(loop_cnt2 > 10)
goto paged_dump_end;
}
paged_dump_end:
wmt_plat_set_host_dump_state(STP_HOST_DUMP_NOT_START);
if(counter * 100 > STP_PAGED_DUMP_TIME_LIMIT)
{
isEnd = wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_paded_dump_end);
if(isEnd)
{
STP_BTM_INFO_FUNC("paged dump end\n");
STP_BTM_INFO_FUNC("\n\n paged dump print ++ \n\n");
_stp_dump_emi_dump_buffer(&g_paged_dump_buffer[0],g_paged_dump_len);
STP_BTM_INFO_FUNC("\n\n paged dump print -- \n\n");
STP_BTM_INFO_FUNC("\n\n paged dump size = %d, paged dump page number = %d \n\n", g_paged_dump_len, page_counter);
counter = 0;
ret = 0;
break;
}
else
{
STP_BTM_ERR_FUNC("paged dump fail\n");
wmt_plat_set_host_dump_state(STP_HOST_DUMP_NOT_START);
stp_dbg_poll_cpupcr(5,5,0);
stp_dbg_poll_dmaregs(5, 1);
counter = 0;
ret = -1;
break;
}
}
}while(1);
break;
case STP_OPID_BTM_FULL_DUMP:
wmt_plat_set_host_dump_state(STP_HOST_DUMP_NOT_START);
do{
UINT32 loop_cnt1 = 0;
UINT32 loop_cnt2 = 0;
ENUM_CHIP_DUMP_STATE chip_state;
UINT32 dump_phy_addr = 0;
UINT8 *dump_vir_addr = NULL;
UINT32 dump_len = 0;
UINT32 isFail = 0;
P_CONSYS_EMI_ADDR_INFO p_emi_ctrl_state_info;
p_emi_ctrl_state_info = wmt_plat_get_emi_phy_add();
osal_assert(p_emi_ctrl_state_info);
while(1)
{
chip_state = (ENUM_CHIP_DUMP_STATE)wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_state);
if(STP_CHIP_DUMP_PUT_DONE == chip_state)
break;
else
{
loop_cnt1 ++;
osal_sleep_ms(10);
}
if(loop_cnt1 > 10)
{
isFail = 1;
goto full_dump_end;
}
}
wmt_plat_set_host_dump_state(STP_HOST_DUMP_GET);
dump_phy_addr = wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_addr);
if(!dump_phy_addr)
{
STP_BTM_ERR_FUNC("get phy dump address fail\n");
ret = -1;
break;
}
dump_vir_addr = wmt_plat_get_emi_virt_add(dump_phy_addr - p_emi_ctrl_state_info->emi_phy_addr);
if(!dump_vir_addr)
{
STP_BTM_ERR_FUNC("get vir dump address fail\n");
ret = -2;
break;
}
dump_len = wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_len);
/*move dump info according to dump_addr & dump_len*/
wmt_plat_update_host_sync_num();
wmt_plat_set_host_dump_state(STP_HOST_DUMP_GET_DONE);
STP_BTM_INFO_FUNC("host sync num(%d),chip sync num(%d)\n",
wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_host_sync_num),
wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_num));
while(1)
{
chip_state = (ENUM_CHIP_DUMP_STATE)wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_sync_state);
if(STP_CHIP_DUMP_END == chip_state)
{
wmt_plat_set_host_dump_state(STP_HOST_DUMP_END);
break;
}
else
{
loop_cnt2++;
osal_sleep_ms(10);
}
if(loop_cnt2 > 10)
{
isFail = 1;
goto full_dump_end;
}
}
wmt_plat_set_host_dump_state(STP_HOST_DUMP_NOT_START);
full_dump_end:
if(isFail)
{
STP_BTM_ERR_FUNC("full dump fail\n");
wmt_plat_set_host_dump_state(STP_HOST_DUMP_NOT_START);
ret = -1;
break;
}
}while(--full_dump_left > 0);
if(0 == full_dump_left)
{
STP_BTM_INFO_FUNC("full dump end\n");
ret = 0;
}
break;
case STP_OPID_BTM_PAGED_TRACE:
g_paged_trace_len = 0;
do{
UINT32 ctrl_val = 0;
UINT32 loop_cnt1 = 0;
UINT32 buffer_start = 0;
UINT32 buffer_idx = 0;
UINT8 *dump_vir_addr = NULL;
P_CONSYS_EMI_ADDR_INFO p_emi_ctrl_state_info;
p_emi_ctrl_state_info = wmt_plat_get_emi_phy_add();
osal_assert(p_emi_ctrl_state_info);
while(loop_cnt1 < 10)
{
ctrl_val = wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_state);
if(0x8 == ctrl_val)
break;
else
{
osal_sleep_ms(10);
loop_cnt1++;
}
}
if(loop_cnt1 >= 10)
{
STP_BTM_ERR_FUNC("polling CTRL STATE fail\n");
ret = -1;
break;
}
buffer_start = wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_print_buff_start);
buffer_idx = wmt_plat_get_dump_info(p_emi_ctrl_state_info->p_emi_ctrl_state_offset->emi_apmem_ctrl_chip_print_buff_idx);
//buffer_len = buffer_idx - buffer_start;
g_paged_trace_len = buffer_idx;
STP_BTM_INFO_FUNC("paged trace buffer addr(%08x),buffer_len(%d)\n",buffer_start,buffer_idx);
dump_vir_addr = wmt_plat_get_emi_virt_add(buffer_start - p_emi_ctrl_state_info->emi_phy_addr);
if(!dump_vir_addr)
{
STP_BTM_ERR_FUNC("get vir dump address fail\n");
ret = -2;
break;
}
osal_memcpy(&g_paged_trace_buffer[0],dump_vir_addr,buffer_idx < STP_DBG_PAGED_TRACE_SIZE ? buffer_idx : STP_DBG_PAGED_TRACE_SIZE);
/*moving paged trace according to buffer_start & buffer_len*/
do {
int i = 0;
int dump_len = 0;
dump_len = buffer_idx < STP_DBG_PAGED_TRACE_SIZE ? buffer_idx : STP_DBG_PAGED_TRACE_SIZE;
printk("\n\n -- paged trace hex output --\n\n");
for(i = 0;i < dump_len; i++)
{
if(i%16 == 0){
printk("\n");
}
printk("%02x ",g_paged_trace_buffer[i]);
}
printk("\n\n -- paged trace ascii output --\n\n");
for(i = 0;i < dump_len; i++)
{
if(i%64 == 0)
printk("\n");
printk("%c",g_paged_trace_buffer[i]);
}
}while(0);
/*move parser fw assert infor to paged dump in the one paged dump*/
//ret = stp_dbg_set_fw_info(&g_paged_trace_buffer[0],g_paged_trace_len,issue_type);
ret = 0;
}while(0);
mtk_wcn_stp_ctx_restore();
break;
#if CFG_WMT_LTE_COEX_HANDLING
case STP_OPID_BTM_WMT_LTE_COEX:
ret = wmt_idc_msg_to_lte_handing();
break;
#endif
default:
ret = -1;
break;
}
return ret;
}
void vam_init(void)
{
int i;
vam_envar_t *p_vam = &p_cms_envar->vam;
uint8_t zero_pid[RCP_TEMP_ID_LEN] = {0};
p_vam_envar = p_vam;
memset(p_vam, 0, sizeof(vam_envar_t));
memcpy(&p_vam->working_param, &p_cms_param->vam, sizeof(vam_config_t));
if (0 == memcmp(p_cms_param->pid, zero_pid, RCP_TEMP_ID_LEN)){
for (i=0; i<RCP_TEMP_ID_LEN; i++){
p_vam->local.pid[i] = des(RCP_TEMP_ID_LEN-1-i);
}
}
else {
memcpy(p_vam->local.pid, p_cms_param->pid, RCP_TEMP_ID_LEN);
}
OSAL_MODULE_DBGPRT(MODULE_NAME, OSAL_DEBUG_INFO, "PID: %02x %02x %02x %02x\r\n", \
p_vam->local.pid[0], p_vam->local.pid[1], p_vam->local.pid[2], p_vam->local.pid[3]);
INIT_LIST_HEAD(&p_vam->neighbour_list);
INIT_LIST_HEAD(&p_vam->sta_free_list);
for(i = 0;i< VAM_NEIGHBOUR_MAXNUM;i++){
list_add_tail(&p_vam->remote[i].list, &p_vam->sta_free_list);
}
/* os object for vam */
p_vam->queue_vam = osal_queue_create("q-vam", VAM_QUEUE_SIZE);
osal_assert(p_vam->queue_vam != RT_NULL);
p_vam->task_vam = osal_task_create("t-vam",
vam_thread_entry, p_vam,
RT_VAM_THREAD_STACK_SIZE, RT_VAM_THREAD_PRIORITY);
osal_assert(p_vam->task_vam != RT_NULL)
p_vam->timer_send_bsm = osal_timer_create("tm-sb",timer_send_bsm_callback,p_vam,\
BSM_SEND_PERIOD_DEFAULT, RT_TIMER_FLAG_PERIODIC);
osal_assert(p_vam->timer_send_bsm != NULL);
p_vam->timer_bsm_pause = osal_timer_create("tm-bp",timer_bsm_pause_callback,p_vam,\
BSM_PAUSE_HOLDTIME_DEFAULT,RT_TIMER_FLAG_ONE_SHOT);
osal_assert(p_vam->timer_bsm_pause != RT_NULL);
p_vam->timer_send_evam = osal_timer_create("tm-se",timer_send_evam_callback, p_vam,\
EVAM_SEND_PERIOD_DEFAULT,RT_TIMER_FLAG_PERIODIC);
osal_assert(p_vam->timer_send_evam != RT_NULL);
p_vam->timer_gps_life = osal_timer_create("tm-gl",timer_gps_life_callback,p_vam,\
BSM_GPS_LIFE_DEFAULT, RT_TIMER_FLAG_ONE_SHOT);
osal_assert(p_vam->timer_gps_life != RT_NULL);
p_vam->timer_neighbour_life = osal_timer_create("tm-nl",timer_neigh_time_callback,p_vam,\
NEIGHBOUR_LIFE_ACCUR, RT_TIMER_FLAG_PERIODIC);
osal_assert(p_vam->timer_neighbour_life != RT_NULL);
p_vam->sem_sta = osal_sem_create("s-sta", 1);
osal_assert(p_vam->sem_sta != RT_NULL);
OSAL_MODULE_DBGPRT(MODULE_NAME, OSAL_DEBUG_INFO, "module initial\n");
}
