int board_late_init(void) { setup_board_eeprom_env(); u8 val; /* * DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds * This is the POWERHOLD-in-Low behavior. */ palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1); /* * Default FIT boot on HS devices. Non FIT images are not allowed * on HS devices. */ if (get_device_type() == HS_DEVICE) env_set("boot_fit", "1"); /* * Set the GPIO7 Pad to POWERHOLD. This has higher priority * over DEV_CTRL.DEV_ON bit. This can be reset in case of * PMIC Power off. So to be on the safer side set it back * to POWERHOLD mode irrespective of the current state. */ palmas_i2c_read_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2, &val); val = val | TPS65903X_PAD2_POWERHOLD_MASK; palmas_i2c_write_u8(TPS65903X_CHIP_P1, TPS65903X_PRIMARY_SECONDARY_PAD2, val); omap_die_id_serial(); omap_set_fastboot_vars(); am57x_idk_lcd_detect(); #if !defined(CONFIG_SPL_BUILD) board_ti_set_ethaddr(2); #endif return 0; }
int __devinit dwc3_probe(struct platform_device *pdev) { struct dwc3 *dwc; #if !defined(CONFIG_DRA7XX) u8 vali; #endif int ret = -ENOMEM; void __iomem *regs; void *mem; u8 mode; /* Initialize all the clocks (system clocks/ optional clocks etc) */ /* USB_OTG_SS_CLKSTCTRL */ writel(USB_OTG_SS_OPTFCLKEN_REFCLK960M | USB_OTG_SS_MODULEMODE_HW, CM_L3INIT_USB_OTG_SS_CLKCTRL); /* OCP2SCP1 register for PHY register access */ writel(OCP2SCP1_MODULEMODE_HW, CM_L3INIT_OCP2SCP1_CLKCTRL); /* Turn on 32K AON clk */ writel(USB_PHY_CORE_OPTFCLKEN_CLK32K, CM_COREAON_USB_PHY_CORE_CLKCTRL); /* Setting CM_L3INIT_CLKSTCTRL to NO sleep */ writel(L3INIT_CLKSTCTRL_NOSLEEP, CM_L3INIT_CLKSTCTRL); /* Setting USBOTGSS_SYSCONFIG to NO idle */ writel((SYSCONFIG_DMADISABLE | SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLEMODE), USBOTGSS_SYSCONFIG); /* Initialize the wrapper registers */ dwc3_wrapper_init(); mem = kzalloc(sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL); if (!mem) { dev_err(&pdev->dev, "not enough memory\n"); goto err0; } dwc = PTR_ALIGN(mem, DWC3_ALIGN_MASK + 1); dwc->mem = mem; global_dwc3 = dwc; dwc->regs = CONFIG_USB_DWC3_UDC_REGS; dwc->regs_size = DWC3_USB_REGS_SIZE; dwc->dev = &pdev->dev; if (!strncmp("super", maximum_speed, 5)) dwc->maximum_speed = DWC3_DCFG_SUPERSPEED; else if (!strncmp("high", maximum_speed, 4)) dwc->maximum_speed = DWC3_DCFG_HIGHSPEED; else if (!strncmp("full", maximum_speed, 4)) dwc->maximum_speed = DWC3_DCFG_FULLSPEED1; else if (!strncmp("low", maximum_speed, 3)) dwc->maximum_speed = DWC3_DCFG_LOWSPEED; else dwc->maximum_speed = DWC3_DCFG_SUPERSPEED; pm_runtime_enable(&pdev->dev); pm_runtime_get_sync(&pdev->dev); pm_runtime_forbid(&pdev->dev); dwc3_cache_hwparams(dwc); ret = dwc3_alloc_event_buffers(dwc, DWC3_EVENT_BUFFERS_SIZE); if (ret) { dev_err(&pdev->dev, "failed to initialize core\n"); goto err3; } omap_usb2_suspend(0); omap_usb3_suspend(0); ret = dwc3_core_init(dwc); if (ret) { dev_err(dev, "failed to initialize core\n"); goto err0; } mode = DWC3_MODE_DEVICE /*DWC3_MODE(dwc->hwparams.hwparams0)*/; switch (mode) { case DWC3_MODE_DEVICE: dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_DEVICE); ret = dwc3_gadget_init(dwc); if (ret) { dev_err(&pdev->dev, "failed to initialize gadget\n"); goto err4; } break; case DWC3_MODE_HOST: dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_HOST); ret = dwc3_host_init(dwc); if (ret) { dev_err(&pdev->dev, "failed to initialize host\n"); goto err4; } break; case DWC3_MODE_DRD: dwc3_set_mode(dwc, DWC3_GCTL_PRTCAP_OTG); ret = dwc3_host_init(dwc); if (ret) { dev_err(&pdev->dev, "failed to initialize host\n"); goto err4; } ret = dwc3_gadget_init(dwc); if (ret) { dev_err(&pdev->dev, "failed to initialize gadget\n"); goto err4; } break; default: dev_err(&pdev->dev, "Unsupported mode of operation %d\n", mode); goto err4; } dwc->mode = mode; #if !defined(CONFIG_DRA7XX) /* Enable the VBUS comparator in the palmas chip */ palmas_i2c_read_u8(0x49, 0x1C, &vali); palmas_i2c_write_u8(0x49, 0x53, 0x1); /* Wait for the vbus line state interrupt */ do { palmas_i2c_read_u8(0x49, 0x1C, &vali); } while (!(vali & 0x80)); #endif return 0; err4: dwc3_core_exit(dwc); err3: iounmap(regs); kfree(dwc->mem); err0: return ret; }