/* ARGSUSED */
static int
ppb_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
int *rvalp)
{
int instance = PCI_MINOR_NUM_TO_INSTANCE(getminor(dev));
ppb_devstate_t *ppb_p = ddi_get_soft_state(ppb_state, instance);
if (ppb_p == NULL)
return (ENXIO);
/*
* Ioctls will be handled by PCI Express framework for all
* PCIe platforms
*/
if (ppb_p->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV)
return (pcie_ioctl(ppb_p->dip, dev, cmd, arg, mode, credp,
rvalp));
return ((pcihp_get_cb_ops())->cb_ioctl(dev, cmd, arg, mode, credp,
rvalp));
}
/* ARGSUSED */
static int
px_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, int *rvalp)
{
px_t *px_p = PX_DEV_TO_SOFTSTATE(dev);
int minor = getminor(dev);
dev_info_t *dip;
int rv = ENOTTY;
if (px_p == NULL)
return (ENXIO);
dip = px_p->px_dip;
DBG(DBG_IOCTL, dip, "dev=%x: cmd=%x\n", dev, cmd);
#ifdef PX_DMA_TEST
if (IS_DMATEST(cmd)) {
*rvalp = px_dma_test(cmd, dip, px_p, arg);
return (0);
}
#endif /* PX_DMA_TEST */
switch (PCI_MINOR_NUM_TO_PCI_DEVNUM(minor)) {
/*
* PCI tools.
*/
case PCI_TOOL_REG_MINOR_NUM:
switch (cmd) {
case PCITOOL_DEVICE_SET_REG:
case PCITOOL_DEVICE_GET_REG:
/* Require full privileges. */
if (secpolicy_kmdb(credp))
rv = EPERM;
else
rv = pxtool_dev_reg_ops(dip,
(void *)arg, cmd, mode);
break;
case PCITOOL_NEXUS_SET_REG:
case PCITOOL_NEXUS_GET_REG:
/* Require full privileges. */
if (secpolicy_kmdb(credp))
rv = EPERM;
else
rv = pxtool_bus_reg_ops(dip,
(void *)arg, cmd, mode);
break;
default:
rv = ENOTTY;
}
return (rv);
case PCI_TOOL_INTR_MINOR_NUM:
switch (cmd) {
case PCITOOL_DEVICE_SET_INTR:
/* Require full privileges. */
if (secpolicy_kmdb(credp)) {
rv = EPERM;
break;
}
/*FALLTHRU*/
/* These require no special privileges. */
case PCITOOL_DEVICE_GET_INTR:
case PCITOOL_SYSTEM_INTR_INFO:
rv = pxtool_intr(dip, (void *)arg, cmd, mode);
break;
default:
rv = ENOTTY;
}
return (rv);
default:
/* To handle devctl and hotplug related ioctls */
rv = pcie_ioctl(dip, dev, cmd, arg, mode, credp, rvalp);
break;
}
if ((cmd & ~PPMREQ_MASK) == PPMREQ) {
/* Need privileges to use these ioctls. */
if (drv_priv(credp)) {
DBG(DBG_TOOLS, dip,
"px_tools: Insufficient privileges\n");
return (EPERM);
}
return (px_lib_pmctl(cmd, px_p));
}
return (rv);
}
/* ARGSUSED */
static int
ppb_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
int *rvalp)
{
int instance = PCI_MINOR_NUM_TO_INSTANCE(getminor(dev));
ppb_devstate_t *ppb_p = ddi_get_soft_state(ppb_state, instance);
struct devctl_iocdata *dcp;
uint_t bus_state;
dev_info_t *self;
int rv = 0;
if (ppb_p == NULL)
return (ENXIO);
/*
* Ioctls will be handled by SPARC PCI Express framework for all
* PCIe platforms
*/
if (ppb_p->parent_bus == PCIE_PCIECAP_DEV_TYPE_PCIE_DEV)
return (pcie_ioctl(ppb_p->dip, dev, cmd, arg, mode, credp,
rvalp));
else if (ppb_p->hotplug_capable == B_TRUE)
return ((pcihp_get_cb_ops())->cb_ioctl(dev, cmd, arg, mode,
credp, rvalp));
self = ppb_p->dip;
/*
* We can use the generic implementation for these ioctls
*/
switch (cmd) {
case DEVCTL_DEVICE_GETSTATE:
case DEVCTL_DEVICE_ONLINE:
case DEVCTL_DEVICE_OFFLINE:
case DEVCTL_BUS_GETSTATE:
return (ndi_devctl_ioctl(self, cmd, arg, mode, 0));
}
/*
* read devctl ioctl data
*/
if (ndi_dc_allochdl((void *)arg, &dcp) != NDI_SUCCESS)
return (EFAULT);
switch (cmd) {
case DEVCTL_DEVICE_RESET:
rv = ENOTSUP;
break;
case DEVCTL_BUS_QUIESCE:
if (ndi_get_bus_state(self, &bus_state) == NDI_SUCCESS)
if (bus_state == BUS_QUIESCED)
break;
(void) ndi_set_bus_state(self, BUS_QUIESCED);
break;
case DEVCTL_BUS_UNQUIESCE:
if (ndi_get_bus_state(self, &bus_state) == NDI_SUCCESS)
if (bus_state == BUS_ACTIVE)
break;
(void) ndi_set_bus_state(self, BUS_ACTIVE);
break;
case DEVCTL_BUS_RESET:
rv = ENOTSUP;
break;
case DEVCTL_BUS_RESETALL:
rv = ENOTSUP;
break;
default:
rv = ENOTTY;
}
ndi_dc_freehdl(dcp);
return (rv);
}
