/**
* \brief The main function.
*
* It sets up the USART module on EXAMPLE_USART. The terminal settings are 57600
* 8N1.
* Then it sets up the interrupt handler and waits for a USART interrupt to
* trigger.
*/
int main(void)
{
static const gpio_map_t USART_GPIO_MAP =
{
{EXAMPLE_USART_RX_PIN, EXAMPLE_USART_RX_FUNCTION},
{EXAMPLE_USART_TX_PIN, EXAMPLE_USART_TX_FUNCTION}
};
// USART options.
static const usart_options_t USART_OPTIONS =
{
.baudrate = EXAMPLE_USART_BAUDRATE,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
#if BOARD == EVK1100 || BOARD == EVK1101 || BOARD == UC3C_EK \
|| BOARD == EVK1104 || BOARD == EVK1105 || BOARD == STK600_RCUC3L0 \
|| BOARD == STK600_RCUC3D
/*
* Configure Osc0 in crystal mode (i.e. use of an external crystal
* source, with frequency FOSC0) with an appropriate startup time then
* switch the main clock source to Osc0.
*/
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
#elif BOARD == STK1000
pm_reset();
#elif BOARD == UC3L_EK
/*
* Note: on the AT32UC3L-EK board, there is no crystal/external clock
* connected to the OSC0 pinout XIN0/XOUT0. We shall then program the
* DFLL and switch the main clock source to the DFLL.
*/
pcl_configure_clocks(&pcl_dfll_freq_param);
/*
* Note: since it is dynamically computing the appropriate field values
* of the configuration registers from the parameters structure, this
* function is not optimal in terms of code size. For a code size
* optimal solution, it is better to create a new function from
* pcl_configure_clocks_dfll0() and modify it to use preprocessor
* computation from pre-defined target frequencies.
*/
#endif
// Assign GPIO to USART.
gpio_enable_module(USART_GPIO_MAP,
sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
// Initialize USART in RS232 mode.
usart_init_rs232(EXAMPLE_USART, &USART_OPTIONS,
EXAMPLE_TARGET_PBACLK_FREQ_HZ);
print(EXAMPLE_USART, ".: Using interrupts with the USART :.\r\n\r\n");
// Disable all interrupts.
Disable_global_interrupt();
// Initialize interrupt vectors.
INTC_init_interrupts();
/*
* Register the USART interrupt handler to the interrupt controller.
* usart_int_handler is the interrupt handler to register.
* EXAMPLE_USART_IRQ is the IRQ of the interrupt handler to register.
* AVR32_INTC_INT0 is the interrupt priority level to assign to the
* group of this IRQ.
*/
INTC_register_interrupt(&usart_int_handler, EXAMPLE_USART_IRQ,
AVR32_INTC_INT0);
// Enable USART Rx interrupt.
EXAMPLE_USART->ier = AVR32_USART_IER_RXRDY_MASK;
print(EXAMPLE_USART, "Type a character to use the interrupt handler."
"\r\nIt will show up on your screen.\r\n\r\n");
// Enable all interrupts.
Enable_global_interrupt();
/**
* We have nothing left to do in the main, so we may switch to a device
* sleep mode: we just need to be sure that the USART module will be
* still be active in the chosen sleep mode. The sleep mode to use is
* the FROZEN sleep mode: in this mode the PB clocks are still active
* (so the USART module which is on the Peripheral Bus will still be
* active while the CPU and HSB will be stopped).
* --
* Modules communicating with external circuits should normally be
* disabled before entering a sleep mode that will stop the module
* operation: this is not the case for the FROZEN sleep mode.
* --
* When the USART interrupt occurs, this will wake the CPU up which will
* then execute the interrupt handler code then come back to the
* while(1) loop below to execute the sleep instruction again.
*/
while(1)
{
/*
* If there is a chance that any PB write operations are
* incomplete, the CPU should perform a read operation from any
* register on the PB bus before executing the sleep
* instruction.
*/
AVR32_INTC.ipr[0]; // Dummy read
// Go to FROZEN sleep mode.
SLEEP(AVR32_PM_SMODE_FROZEN);
/*
* When the device wakes up due to an interrupt, once the
* interrupt has been serviced, go back into FROZEN sleep mode.
*/
}
}
/*! \brief Sets the SDRAM Controller up, initializes the SDRAM found on the
* board and tests it.
*/
int main(void)
{
unsigned long sdram_size, progress_inc, i, j, tmp, noErrors = 0;
volatile unsigned long *sdram = SDRAM;
// Switch to external oscillator 0.
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
// Initialize the debug USART module.
init_dbg_rs232(FOSC0);
// Calculate SDRAM size in words (32 bits).
sdram_size = SDRAM_SIZE >> 2;
print_dbg("\x0CSDRAM size: ");
print_dbg_ulong(SDRAM_SIZE >> 20);
print_dbg(" MB\r\n");
// Initialize the external SDRAM chip.
sdramc_init(FOSC0);
print_dbg("SDRAM initialized\r\n");
// Determine the increment of SDRAM word address requiring an update of the
// printed progression status.
progress_inc = (sdram_size + 50) / 100;
// Fill the SDRAM with the test pattern.
for (i = 0, j = 0; i < sdram_size; i++)
{
if (i == j * progress_inc)
{
LED_Toggle(LED_SDRAM_WRITE);
print_dbg("\rFilling SDRAM with test pattern: ");
print_dbg_ulong(j++);
print_dbg_char('%');
}
sdram[i] = i;
}
LED_Off(LED_SDRAM_WRITE);
print_dbg("\rSDRAM filled with test pattern \r\n");
// Recover the test pattern from the SDRAM and verify it.
for (i = 0, j = 0; i < sdram_size; i++)
{
if (i == j * progress_inc)
{
LED_Toggle(LED_SDRAM_READ);
print_dbg("\rRecovering test pattern from SDRAM: ");
print_dbg_ulong(j++);
print_dbg_char('%');
}
tmp = sdram[i];
if (tmp != i)
{
noErrors++;
}
}
LED_Off(LED_SDRAM_READ);
print_dbg("\rSDRAM tested: ");
print_dbg_ulong(noErrors);
print_dbg(" corrupted word(s) \r\n");
if (noErrors)
{
LED_Off(LED_SDRAM_ERRORS);
while (1)
{
LED_Toggle(LED_SDRAM_ERRORS);
cpu_delay_ms(200, FOSC0); // Fast blink means errors.
}
}
else
{
LED_Off(LED_SDRAM_OK);
while (1)
{
LED_Toggle(LED_SDRAM_OK);
cpu_delay_ms(1000, FOSC0); // Slow blink means OK.
}
}
}
// main function
int main(void)
{
bool valid_block_found[NF_N_DEVICES];
U32 u32_nf_ids, i_dev, i_block;
U8 maker_id, device_id;
U32 i, j;
// ECCHRS options.
static const ecchrs_options_t ECCHRS_OPTIONS =
{
.typecorrect = ECCHRS_TYPECORRECT_4_BIT,
.pagesize = ECCHRS_PAGESIZE_4_BIT_2112_W
};
// switch to oscillator 0
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
// init debug serial interface
init_dbg_rs232(FOSC0);
nf_init(FOSC0); // init the nand flash driver with the correct HSB frequency
nf_unprotect();
print_dbg("\r\nECCHRS example using Nand Flash.\r\n================================\r\n\r\n");
// - Simple test of the NF communication through the SMC.
// - Find all bad blocks.
// - Find a valid block for the remaining tests.
nf_reset_nands(NF_N_DEVICES);
print_dbg("\tCPU, HSB is at 12000000Mhz.\r\n");
print_dbg("\tPBA, PBB is at 12000000Mhz.\r\n");
print_dbg("\tDetecting Nand Flash device(s).\r\n");
for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ )
{
// Performs some init here...
valid_block_found[i_dev] = false;
// Test Maker and Device ids
u32_nf_ids = nf_read_id( NF_READ_ID_CMD, i_dev );
maker_id = MSB0(u32_nf_ids);
device_id = MSB1(u32_nf_ids);
print_dbg("\t\tNF");
print_dbg_hex(i_dev);
print_dbg(" [Maker=");
print_dbg_hex(maker_id);
print_dbg("] [Device=");
print_dbg_hex(device_id);
print_dbg("]\r\n");
if( maker_id==M_ID_MICRON )
{
print_dbg("\t\t Micron chip");
if( device_id==0xDA ){
print_dbg("- MT29F2G08AACWP device\r\n");
}
else
{
print_dbg("- *** Error: unexpected chip detected. Please check the board settings and hardware.\r\n");
return -1;
}
}
else
{
print_dbg("\t\t *** Error: unexpected chip detected. Please check the board settings and hardware.\r\n");
return -1;
}
}
// Looking for valid blocks for the test.
for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ )
{
nf_select(i_dev);
for( i_block=0 ; i_block<G_N_BLOCKS ; i_block++ )
{
nf_open_page_read( nf_block_2_page(i_block), NF_SPARE_POS + G_OFST_BLK_STATUS );
if( (nf_rd_data()==0xFF) )
{ // The block is valid.
print_dbg("\tValid block found (");
print_dbg_ulong(i_block);
print_dbg(") on NF ");
print_dbg_hex(i_dev);
print_dbg("\r\n");
valid_block_found[i_dev]= true;
valid_block_addr[i_dev] = i_block;
break;
}
}
}
for( i_dev=0 ; i_dev<NF_N_DEVICES ; i_dev++ )
if( !valid_block_found[i_dev] )
{
print_dbg("Error: no valid blocks found.\r\n");
return 0;
}
print_dbg("\tECCHRS IP ver ");
print_dbg_ulong(ecchrs->version);
print_dbg("(");
print_dbg_hex(ecchrs->version);
print_dbg(")");
print_dbg("\r\n");
// Work with NF 0 from now...
nf_select(0);
// Setup the ECCHRS.
ecchrs_init(&AVR32_ECCHRS, &ECCHRS_OPTIONS);
// Ensures that the block is erased for the test.
print_dbg("\tErasing a free block for the test.\r\n");
nf_erase_block(nf_block_2_page(valid_block_addr[0]), false);
// Reset the ECCHRS state machine.
ecchrs_reset(&AVR32_ECCHRS);
// Program a simple patterns in the first page.
print_dbg("\tProgramming the first page with a simple pattern.\r\n");
nf_open_page_write( nf_block_2_page(valid_block_addr[0]), 0);
for ( i = 0; i < 2048/2; i++ )
{
U16 val = i;
nf_wr_data(MSB(val));
nf_wr_data(LSB(val));
}
// Extract the ECCs and store them at the end of the page.
// [2054; 2063]: codeword 0:9
// [2070; 2079]: codeword 10:19
// [2086; 2095]: codeword 20:29
// [2102; 2111]: codeword 30:39
// Since we use the Random Data Output command, we need to freeze
// the ECCHRS in order to keep our ECC codewords unchanged.
print_dbg("\tExtracting the ECCHRS codewords and store them in the page.\r\n");
ecchrs_freeze(&AVR32_ECCHRS); // not needed if ECCHRS reaches the end of page.
for ( i=0 ; i<4 ; i++ )
{
U16 offset = 2048+6+16*i;
nf_wr_cmd(NF_RANDOM_DATA_INPUT_CMD);
nf_wr_addr( LSB(offset) );
nf_wr_addr( MSB(offset) );
for ( j=0 ; j<10 ; j++ )
nf_wr_data( ecchrs_get_cw(&AVR32_ECCHRS, i*10+j) );
}
ecchrs_unfreeze(&AVR32_ECCHRS);
nf_wr_cmd(NF_PAGE_PROGRAM_CMD);
// Now let's test the ECC verification.
print_dbg("\tReading the first page.\r\n");
nf_open_page_read( nf_block_2_page(valid_block_addr[0]), 0);
for( i=0 ; i<2048 ; i++ )
nf_rd_data();
print_dbg("\tChecking if the data are valid thanks to the ECCHRS codewords.\r\n");
for ( i=0 ; i<4 ; i++ )
{
U16 offset = 2048+6+16*i;
ecchrs_freeze(&AVR32_ECCHRS);
nf_wr_cmd(NF_RANDOM_READ_CMD_C1);
nf_wr_addr( LSB(offset) );
nf_wr_addr( MSB(offset) );
nf_wr_cmd(NF_RANDOM_READ_CMD_C2);
ecchrs_unfreeze(&AVR32_ECCHRS);
for ( j=0 ; j<10 ; j++ )
nf_rd_data();
}
// Check if there is any errors after the read of the page.
i = ecchrs_4bit_check_error(&AVR32_ECCHRS);
print_dbg("\tSR1 is ");
print_dbg_ulong(i);
print_dbg("(");
print_dbg_hex(i);
print_dbg(")");
print_dbg("\r\n");
if(i&(15))
{
print_dbg("\tERROR: ECCHRS detects some errors in the sectors 1, 2, 3 or 4\r\n");
}
else
print_dbg("\tNo error detected.\r\n");
// Let the block free.
nf_erase_block(nf_block_2_page(valid_block_addr[0]), false);
return 0;
}
/*! \brief The main function.
*/
int main(void)
{
int32_t result;
#if UC3L /* UC3L series only */
// Note: on the AT32UC3L-EK board, there is no crystal/external clock connected
// to the OSC0 pinout XIN0/XOUT0. We shall then program the DFLL and switch the
// main clock source to the DFLL.
pcl_configure_clocks(&pcl_dfll_freq_param);
// Note: since it is dynamically computing the appropriate field values of the
// configuration registers from the parameters structure, this function is not
// optimal in terms of code size. For a code size optimal solution, it is better
// to create a new function from pcl_configure_clocks_dfll0() and modify it
// to use preprocessor computation from pre-defined target frequencies.
#else // else for all other series
// Configure Osc0 in crystal mode (i.e. use of an external crystal source, with
// frequency FOSC0) with an appropriate startup time then switch the main clock
// source to Osc0.
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
#endif
const gpio_map_t usart_gpio_map =
{
{EXAMPLE_USART_RX_PIN, EXAMPLE_USART_RX_FUNCTION},
{EXAMPLE_USART_TX_PIN, EXAMPLE_USART_TX_FUNCTION}
};
// Assign GPIO to USART.
gpio_enable_module(usart_gpio_map,
sizeof(usart_gpio_map) / sizeof(usart_gpio_map[0]));
static const usart_options_t usart_options =
{
.baudrate = 57600,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = 0
};
// Initialize USART in RS232 mode.
usart_init_rs232(EXAMPLE_USART, &usart_options, FPBA);
usart_write_line(EXAMPLE_USART, "\x1B[2J\x1B[H\r\nATMEL\r\n");
usart_write_line(EXAMPLE_USART, "AVR UC3 - HMATRIX example\r\n\r\n");
// First test with AVR32_HMATRIX_DEFMSTR_TYPE_NO_DEFAULT
print(EXAMPLE_USART, "- Test 1 ----------------------------------------\r\n");
print(EXAMPLE_USART, "------ All Slave Default Master Types are: ------\r\n");
print(EXAMPLE_USART, " - No Default Master\r\n");
print(EXAMPLE_USART, " - leds Toggle: ");
print_ulong(EXAMPLE_USART, NB_TOGGLE);
print(EXAMPLE_USART, " times\r\n");
#if defined(AVR32_HMATRIX)
configure_hmatrix(AVR32_HMATRIX_DEFMSTR_TYPE_NO_DEFAULT);
#elif defined(AVR32_HMATRIXB)
configure_hmatrix(AVR32_HMATRIXB_DEFMSTR_TYPE_NO_DEFAULT);
#endif
result = toggle_led(NB_TOGGLE);
// Second test with AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT
print(EXAMPLE_USART, "- Test 2 ----------------------------------------\r\n");
print(EXAMPLE_USART, "------ All Slave Default Master Types are: ------\r\n");
print(EXAMPLE_USART, " - Last Default Master\r\n");
print(EXAMPLE_USART, " - No Default Master\r\n");
print(EXAMPLE_USART, " - leds Toggle: ");
print_ulong(EXAMPLE_USART, NB_TOGGLE);
print(EXAMPLE_USART, " times\r\n");
#if defined(AVR32_HMATRIX)
configure_hmatrix(AVR32_HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT);
#elif defined(AVR32_HMATRIXB)
configure_hmatrix(AVR32_HMATRIXB_DEFMSTR_TYPE_LAST_DEFAULT);
#endif
result -= toggle_led(NB_TOGGLE);
print(EXAMPLE_USART, "--------------------------------------------------\r\n");
print_ulong(EXAMPLE_USART, result);
print(EXAMPLE_USART, " Cycles saved between test 1 and test 2\r\nDone!");
//*** Sleep mode
// This program won't be doing anything else from now on, so it might as well
// sleep.
// Modules communicating with external circuits should normally be disabled
// before entering a sleep mode that will stop the module operation.
// Make sure the USART dumps the last message completely before turning it off.
while(!usart_tx_empty(EXAMPLE_USART));
pcl_disable_module(EXAMPLE_USART_CLOCK_MASK);
// Since we're going into a sleep mode deeper than IDLE, all HSB masters must
// be stopped before entering the sleep mode: none is acting currently in this
// example so nothing to do for this example.
// If there is a chance that any PB write operations are incomplete, the CPU
// should perform a read operation from any register on the PB bus before
// executing the sleep instruction.
AVR32_INTC.ipr[0]; // Dummy read
// Go to STATIC sleep mode.
SLEEP(AVR32_PM_SMODE_STATIC);
while (true);
}
int main( void )
{
#if UC3L
/*! \name Clock frequencies
*/
//! @{
#define EXAMPLE_TARGET_DFLL_FREQ_HZ 96000000 // DFLL target frequency, in Hz
#define EXAMPLE_TARGET_MCUCLK_FREQ_HZ 12000000 // MCU clock target frequency, in Hz
#define EXAMPLE_TARGET_PBACLK_FREQ_HZ 12000000 // PBA clock target frequency, in Hz
//! @}
/*! \name Parameters to pcl_configure_clocks().
*/
//! @{
static scif_gclk_opt_t gc_dfllif_ref_opt = { SCIF_GCCTRL_SLOWCLOCK, 0, false};
static pcl_freq_param_t pcl_dfll_freq_param = {
.main_clk_src = PCL_MC_DFLL0,
.cpu_f = EXAMPLE_TARGET_MCUCLK_FREQ_HZ,
.pba_f = EXAMPLE_TARGET_PBACLK_FREQ_HZ,
.pbb_f = EXAMPLE_TARGET_PBACLK_FREQ_HZ,
.dfll_f = EXAMPLE_TARGET_DFLL_FREQ_HZ,
.pextra_params = &gc_dfllif_ref_opt
};
//! @}
// Note: on the AT32UC3L-EK and UC3-L0-Xplained board, there are no crystal/external
// clock connected to the OSC0 pinout XIN0/XOUT0. We shall then program the DFLL and
// switch the main clock source to the DFLL.
pcl_configure_clocks(&pcl_dfll_freq_param);
// Note: since it is dynamically computing the appropriate field values of the
// configuration registers from the parameters structure, this function is not
// optimal in terms of code size. For a code size optimal solution, it is better
// to create a new function from pcl_configure_clocks_dfll0() and modify it
// to use preprocessor computation from pre-defined target frequencies.
#else
// Configure Osc0 in crystal mode (i.e. use of an external crystal source, with
// frequency FOSC0) with an appropriate startup time then switch the main clock
// source to Osc0.
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
#endif
portDBG_TRACE("Starting the FreeRTOS AVR32 UC3 Demo...");
/* Setup the LED's for output. */
vParTestInitialise();
/* Start the standard demo tasks. See the WEB documentation for more
information.
Note that the UC3L and UC3B parts do not have enough internal RAM to launch all the tasks of this example.
That's why some of them are commented out using respectively #if (BOARD != UC3L_EK) or #if (BOARD != EVK1101)
compiler directives. */
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
#if (BOARD != UC3L_EK)
vStartIntegerMathTasks( tskIDLE_PRIORITY );
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartDynamicPriorityTasks();
#endif
#if (BOARD != EVK1101) && (BOARD != UC3L_EK)
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vStartMathTasks( tskIDLE_PRIORITY );
#endif
/* Start the demo tasks defined within this file, specifically the check
task as described at the top of this file. */
xTaskCreate(
vErrorChecks
, (const signed portCHAR *)"ErrCheck"
, configMINIMAL_STACK_SIZE
, NULL
, mainCHECK_TASK_PRIORITY
, NULL );
/* Start the scheduler. */
vTaskStartScheduler();
/* Will only get here if there was insufficient memory to create the idle
task. */
return 0;
}
/*! \brief Sets up USART for shell.
*
* \param pba_hz The current module frequency.
*/
static void init_shl_rs232(long pba_hz)
{
// GPIO map for USART.
static const gpio_map_t SHL_USART_GPIO_MAP =
{
{SHL_USART_RX_PIN, SHL_USART_RX_FUNCTION},
{SHL_USART_TX_PIN, SHL_USART_TX_FUNCTION}
};
// Options for USART.
static const usart_options_t SHL_USART_OPTIONS =
{
.baudrate = SHL_USART_BAUDRATE,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
// Set up GPIO for SHL_USART, size of the GPIO map is 2 here.
gpio_enable_module(SHL_USART_GPIO_MAP,
sizeof(SHL_USART_GPIO_MAP) / sizeof(SHL_USART_GPIO_MAP[0]));
// Initialize it in RS232 mode.
usart_init_rs232(SHL_USART, &SHL_USART_OPTIONS, pba_hz);
}
/*! \brief Initializes the dataflash memory AT45DBX resources: GPIO, SPI and AT45DBX.
*/
static void at45dbx_resources_init(void)
{
// GPIO map for SPI.
static const gpio_map_t AT45DBX_SPI_GPIO_MAP =
{
{AT45DBX_SPI_SCK_PIN, AT45DBX_SPI_SCK_FUNCTION }, // SPI Clock.
{AT45DBX_SPI_MISO_PIN, AT45DBX_SPI_MISO_FUNCTION }, // MISO.
{AT45DBX_SPI_MOSI_PIN, AT45DBX_SPI_MOSI_FUNCTION }, // MOSI.
#define AT45DBX_ENABLE_NPCS_PIN(NPCS, unused) \
{AT45DBX_SPI_NPCS##NPCS##_PIN, AT45DBX_SPI_NPCS##NPCS##_FUNCTION}, // Chip Select NPCS.
MREPEAT(AT45DBX_MEM_CNT, AT45DBX_ENABLE_NPCS_PIN, ~)
#undef AT45DBX_ENABLE_NPCS_PIN
};
// Options for SPI.
spi_options_t spiOptions =
{
.reg = AT45DBX_SPI_FIRST_NPCS, // Defined in conf_at45dbx.h.
.baudrate = AT45DBX_SPI_MASTER_SPEED, // Defined in conf_at45dbx.h.
.bits = AT45DBX_SPI_BITS, // Defined in conf_at45dbx.h.
.spck_delay = 0,
.trans_delay = 0,
.stay_act = 1,
.spi_mode = 0,
.modfdis = 1
};
// Assign I/Os to SPI.
gpio_enable_module(AT45DBX_SPI_GPIO_MAP,
sizeof(AT45DBX_SPI_GPIO_MAP) / sizeof(AT45DBX_SPI_GPIO_MAP[0]));
// Initialize as master.
spi_initMaster(AT45DBX_SPI, &spiOptions);
// Set selection mode: variable_ps, pcs_decode, delay.
spi_selectionMode(AT45DBX_SPI, 0, 0, 0);
// Enable SPI.
spi_enable(AT45DBX_SPI);
// Initialize data flash with SPI clock Osc0.
at45dbx_init(spiOptions, FOSC0);
}
/*! \brief Main function. Execution starts here.
*/
int main(void)
{
U8 i, j;
U16 file_size;
Fs_index sav_index;
static Fs_index mark_index;
const char *part_type;
U32 VarTemp;
// Switch to external oscillator 0.
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
// Initialize RS232 shell text output.
init_shl_rs232(FOSC0);
// Initialize AT45DBX resources: GPIO, SPI and AT45DBX.
at45dbx_resources_init();
// Display memory status
print(SHL_USART, MSG_WELCOME "\nMemory ");
// Test if the memory is ready - using the control access memory abstraction layer (/SERVICES/MEMORY/CTRL_ACCESS/)
if (mem_test_unit_ready(LUN_ID_AT45DBX_MEM) == CTRL_GOOD)
{
// Get and display the capacity
mem_read_capacity(LUN_ID_AT45DBX_MEM, &VarTemp);
print(SHL_USART, "OK:\t");
print_ulong(SHL_USART, (VarTemp + 1) >> (20 - FS_SHIFT_B_TO_SECTOR));
print(SHL_USART, " MB\n");
}
/*!
* \brief main function : do init and loop (poll if configured so)
*/
int main(void)
{
char temp[20];
char *ptemp;
static const gpio_map_t USART_GPIO_MAP = {
{EXAMPLE_USART_RX_PIN, EXAMPLE_USART_RX_FUNCTION},
{EXAMPLE_USART_TX_PIN, EXAMPLE_USART_TX_FUNCTION}
};
/* USART options */
static const usart_options_t USART_OPTIONS = {
.baudrate = 57600,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = 0
};
#if BOARD == UC3L_EK
scif_osc32_opt_t opt = {
/*
* 2-pin Crystal connected to XIN32/XOUT32 and high current
* mode.
*/
SCIF_OSC_MODE_2PIN_CRYSTAL_HICUR,
/* oscillator startup time */
AVR32_SCIF_OSCCTRL32_STARTUP_0_RCOSC,
/*
* select alternate xin32_2 and xout32_2 for 32kHz crystal
* oscillator
*/
true,
/* disable the 1kHz output */
false,
/* enable the 32kHz output */
true
};
#else
scif_osc32_opt_t opt;
opt.mode = SCIF_OSC_MODE_2PIN_CRYSTAL;
opt.startup = AVR32_SCIF_OSCCTRL32_STARTUP_0_RCOSC;
#endif
#if BOARD == UC3L_EK
/*
* Note: on the AT32UC3L-EK board, there is no crystal/external clock
* connected to the OSC0 pinout XIN0/XOUT0. We shall then program the
* DFLL and switch the main clock source to the DFLL.
*/
pcl_configure_clocks(&pcl_dfll_freq_param);
/*
* Note: since it is dynamically computing the appropriate field values
* of the configuration registers from the parameters structure, this
* function is not optimal in terms of code size. For a code size
* optimal solution, it is better to create a new function from
* pcl_configure_clocks_dfll0() and modify it to use preprocessor
* computation from pre-defined target frequencies.
*/
#else
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
#endif
/* Start OSC_32KHZ */
scif_start_osc32(&opt, true);
/* Assign GPIO pins to USART0. */
gpio_enable_module(USART_GPIO_MAP,
sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
/* Initialize USART in RS232 mode */
usart_init_rs232(EXAMPLE_USART, &USART_OPTIONS, FPBA);
/* Welcome message */
usart_write_line(EXAMPLE_USART, "\x1B[2J\x1B[H\r\nATMEL\r\n");
usart_write_line(EXAMPLE_USART, "AVR32 UC3 - AST example\r\n");
usart_write_line(EXAMPLE_USART,
"AST 32 KHz oscillator program test.\r\n");
ast_calendar_t ast_calendar;
ast_calendar.FIELD.sec = 0;
ast_calendar.FIELD.min = 15;
ast_calendar.FIELD.hour = 12;
ast_calendar.FIELD.day = 5;
ast_calendar.FIELD.month = 6;
ast_calendar.FIELD.year = 9;
/* Initialize the AST */
if (!ast_init_calendar(&AVR32_AST,
AST_OSC_32KHZ, AST_PSEL_32KHZ_1HZ, ast_calendar)) {
usart_write_line(EXAMPLE_USART,
"Error initializing the AST\r\n");
while (1) {
}
}
/* Enable the AST */
ast_enable(&AVR32_AST);
volatile int i;
while (1) {
/* slow down operations */
for (i = 0; i < 10000; i++) {
}
gpio_tgl_gpio_pin(LED0_GPIO);
/* Set cursor to the position (1; 5) */
usart_write_line(EXAMPLE_USART, "\x1B[5;1H");
ast_calendar = ast_get_calendar_value(&AVR32_AST);
usart_write_line(EXAMPLE_USART, "Timer: ");
ptemp = print_i(temp, ast_calendar.FIELD.sec);
usart_write_line(EXAMPLE_USART, ptemp);
usart_write_line(EXAMPLE_USART, " sec ");
}
}
/*!
* \brief main function : do init and loop (poll if configured so)
*/
int main(void)
{
char temp[20];
char *ptemp;
uint32_t ast_alarm;
static const gpio_map_t USART_GPIO_MAP = {
{EXAMPLE_USART_RX_PIN, EXAMPLE_USART_RX_FUNCTION},
{EXAMPLE_USART_TX_PIN, EXAMPLE_USART_TX_FUNCTION}
};
/* USART options */
static const usart_options_t USART_OPTIONS = {
.baudrate = 57600,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = 0
};
#if BOARD == UC3L_EK
scif_osc32_opt_t opt = {
/* 2-pin Crystal connected to XIN32/XOUT32 and high current
* mode. */
SCIF_OSC_MODE_2PIN_CRYSTAL_HICUR,
/* oscillator startup time */
AVR32_SCIF_OSCCTRL32_STARTUP_0_RCOSC,
/* select alternate xin32_2 and xout32_2 for 32kHz crystal
* oscillator */
true,
/* disable the 1kHz output */
false,
/* enable the 32kHz output */
true
};
#else
scif_osc32_opt_t opt;
opt.mode = SCIF_OSC_MODE_2PIN_CRYSTAL;
opt.startup = AVR32_SCIF_OSCCTRL32_STARTUP_0_RCOSC;
#endif
#if BOARD == UC3L_EK
/*
* Note: on the AT32UC3L-EK board, there is no crystal/external clock
* connected to the OSC0 pinout XIN0/XOUT0. We shall then program the
* DFLL and switch the main clock source to the DFLL.
*/
pcl_configure_clocks(&pcl_dfll_freq_param);
/*
* Note: since it is dynamically computing the appropriate field values
* of the configuration registers from the parameters structure, this
* function is not optimal in terms of code size. For a code size
* optimal solution, it is better to create a new function from
* pcl_configure_clocks_dfll0() and modify it to use preprocessor
* computation from pre-defined target frequencies.
*/
#else
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
#endif
/* Start OSC_32KHZ */
scif_start_osc32(&opt, true);
/* Assign GPIO pins to USART0. */
gpio_enable_module(USART_GPIO_MAP,
sizeof(USART_GPIO_MAP) / sizeof(USART_GPIO_MAP[0]));
/* Initialize USART in RS232 mode */
usart_init_rs232(EXAMPLE_USART, &USART_OPTIONS, FPBA);
/* Welcome sentence // 2-pin Crystal and high current mode. */
/* Crystal is connected to XIN32/XOUT32. */
usart_write_line(EXAMPLE_USART, "\x1B[2J\x1B[H\r\nATMEL\r\n");
usart_write_line(EXAMPLE_USART, "AVR32 UC3 - AST example 2\r\n");
usart_write_line(EXAMPLE_USART,
"AST 32 KHz oscillator counter example.\r\n");
usart_write_line(EXAMPLE_USART,
"Alarm0 wakeup from static sleep mode every second.\r\n");
/* Using counter mode and set it to 0 */
unsigned long ast_counter = 0;
/* Initialize the AST */
if (!ast_init_counter(&AVR32_AST,
AST_OSC_32KHZ, AST_PSEL_32KHZ_1HZ, ast_counter)) {
usart_write_line(EXAMPLE_USART,
"Error initializing the AST\r\n");
while (1) {
}
}
/* Alarm 0 sends a wakeup signal to the Power manager */
ast_enable_alarm_async_wakeup(&AVR32_AST, 0);
/* Enable the AST */
ast_enable(&AVR32_AST);
while (1) {
/* disable alarm 0 */
ast_disable_alarm0(&AVR32_AST);
/* ast_init_counter Set Alarm to current time+30 seconds */
ast_alarm = ast_counter + 1;
ast_set_alarm0_value(&AVR32_AST, ast_alarm);
/* Enable alarm 0 */
ast_enable_alarm0(&AVR32_AST);
/*
* Precautions when entering a sleep mode
* Modules communicating with external circuits should normally
* be disabled before entering a sleep mode that will stop the
* module operation.
* Make sure the USART dumps the last message completely before
* turning it off.
*/
while (!usart_tx_empty(EXAMPLE_USART)) {
}
pcl_disable_module(EXAMPLE_USART_CLOCK_MASK);
/*
* Since we're going into a sleep mode deeper than IDLE, all HSB
* masters must be stopped before entering the sleep mode.
* Note: since we're not using the PDCA, we don't have to stop
*it.
*/
/*
* If there is a chance that any PB write operations are
*incomplete,
* the CPU should perform a read operation from any register on
*the
* PB bus before executing the sleep instruction.
*/
AVR32_INTC.ipr[0]; /* Dummy read */
/* Go into static sleep mode */
SLEEP(AVR32_PM_SMODE_STATIC);
/* We're out of the static sleep mode now => re-enable the USART
* module */
pcl_enable_module(EXAMPLE_USART_CLOCK_MASK);
/* After wake up, clear the Alarm0 */
ast_clear_alarm_status_flag(&AVR32_AST, 0);
/* Toggle Led0 */
gpio_tgl_gpio_pin(LED0_GPIO);
/* Set cursor to the position (1; 6) */
usart_write_line(EXAMPLE_USART, "\x1B[6;1H");
ast_counter = ast_get_counter_value(&AVR32_AST);
usart_write_line(EXAMPLE_USART, "Timer: ");
ptemp = print_i(temp, ast_counter);
usart_write_line(EXAMPLE_USART, ptemp);
usart_write_line(EXAMPLE_USART, " sec ");
}
}
int main(void)
{
U32 i;
volatile avr32_tc_t *tc = EXAMPLE_TC;
// Configuration du peripherique TC
static const tc_waveform_opt_t WAVEFORM_OPT =
{
.channel = TC_CHANNEL, // Channel selection.
.bswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOB.
.beevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOB.
.bcpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOB.
.bcpb = TC_EVT_EFFECT_NOOP, // RB compare effect on TIOB.
.aswtrg = TC_EVT_EFFECT_NOOP, // Software trigger effect on TIOA.
.aeevt = TC_EVT_EFFECT_NOOP, // External event effect on TIOA.
.acpc = TC_EVT_EFFECT_NOOP, // RC compare effect on TIOA: toggle.
.acpa = TC_EVT_EFFECT_NOOP, // RA compare effect on TIOA: toggle
.wavsel = TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER,// Waveform selection: Up mode with automatic trigger(reset) on RC compare.
.enetrg = FALSE, // External event trigger enable.
.eevt = 0, // External event selection.
.eevtedg = TC_SEL_NO_EDGE, // External event edge selection.
.cpcdis = FALSE, // Counter disable when RC compare.
.cpcstop = FALSE, // Counter clock stopped with RC compare.
.burst = FALSE, // Burst signal selection.
.clki = FALSE, // Clock inversion.
.tcclks = TC_CLOCK_SOURCE_TC4 // Internal source clock 3, connected to fPBA / 8.
};
static const tc_interrupt_t TC_INTERRUPT =
{
.etrgs = 0,
.ldrbs = 0,
.ldras = 0,
.cpcs = 1,
.cpbs = 0,
.cpas = 0,
.lovrs = 0,
.covfs = 0
};
/*! \brief Main function:
* - Configure the CPU to run at 12MHz
* - Register the TC interrupt (GCC only)
* - Configure, enable the CPCS (RC compare match) interrupt, and start a TC channel in waveform mode
* - In an infinite loop, do nothing
*/
/* Au reset, le microcontroleur opere sur un crystal interne a 115200Hz. */
/* Nous allons le configurer pour utiliser un crystal externe, FOSC0, a 12Mhz. */
pcl_switch_to_osc(PCL_OSC0, FOSC0, OSC0_STARTUP);
Disable_global_interrupt(); // Desactive les interrupts le temps de la config
INTC_init_interrupts(); // Initialise les vecteurs d'interrupt
// Enregistrement de la nouvelle IRQ du TIMER au Interrupt Controller .
INTC_register_interrupt(&tc_irq, EXAMPLE_TC_IRQ, AVR32_INTC_INT0);
Enable_global_interrupt(); // Active les interrupts
tc_init_waveform(tc, &WAVEFORM_OPT); // Initialize the timer/counter waveform.
// Placons le niveau RC a atteindre pour declencher de l'IRQ.
// Attention, RC est un 16-bits, valeur max 65535
// We want: (1/(fPBA/32)) * RC = 0.100 s, donc RC = (fPBA/32) / 10 to get an interrupt every 100 ms.
tc_write_rc(tc, TC_CHANNEL, (FPBA / 32) / 10); // Set RC value.
tc_configure_interrupts(tc, TC_CHANNEL, &TC_INTERRUPT);
// Start the timer/counter.
tc_start(tc, TC_CHANNEL); // And start the timer/counter.
while(1) // Boucle inifinie a vide !
{
i++;
}
}
void USART_Int_Test (void)
{
int i;
static const gpio_map_t USART_GPIO_MAP = {
{EXAMPLE_INT_USART_RX_PIN, EXAMPLE_INT_USART_RX_FUNCTION},
{EXAMPLE_INT_USART_TX_PIN, EXAMPLE_INT_USART_TX_FUNCTION}
};
// USART options.
static const usart_options_t USART_OPTIONS = {
.baudrate = EXAMPLE_INT_USART_BAUDRATE,
.charlength = 8,
.paritytype = USART_NO_PARITY,
.stopbits = USART_1_STOPBIT,
.channelmode = USART_NORMAL_CHMODE
};
pcl_switch_to_osc (PCL_OSC0, FOSC0, OSC0_STARTUP);
// Assign GPIO to USART.
gpio_enable_module (USART_GPIO_MAP, sizeof (USART_GPIO_MAP) / sizeof (USART_GPIO_MAP[0]));
// Initialize USART in RS232 mode.
usart_init_rs232 (EXAMPLE_INT_USART, &USART_OPTIONS, FOSC0); // EXAMPLE_TARGET_PBACLK_FREQ_HZ);
// Disable all interrupts.
Disable_global_interrupt ();
// Initialize interrupt vectors.
INTC_init_interrupts ();
// Register the USART interrupt handler to the interrupt controller.
// usart_int_handler is the interrupt handler to register.
// EXAMPLE_USART_IRQ is the IRQ of the interrupt handler to register.
// AVR32_INTC_INT0 is the interrupt priority level to assign to the group of
// this IRQ.
// void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level);
INTC_register_interrupt (&ISO7816_Usart_ISR, EXAMPLE_INT_USART_IRQ, AVR32_INTC_INT0);
// Enable USART Rx interrupt.
// EXAMPLE_INT_USART->ier = AVR32_USART_IER_RXRDY_MASK;
EXAMPLE_INT_USART->IER.rxrdy = 1;
// EXAMPLE_INT_USART->IER.txempty = 1;
//
// Enable all interrupts.
Enable_global_interrupt ();
// We have nothing left to do in the main, so we may switch to a device sleep
// mode: we just need to be sure that the USART module will be still be active
// in the chosen sleep mode. The sleep mode to use is the FROZEN sleep mode:
// in this mode the PB clocks are still active (so the USART module which is
// on the Peripheral Bus will still be active while the CPU and HSB will be
// stopped).
// --
// Modules communicating with external circuits should normally be disabled
// before entering a sleep mode that will stop the module operation: this is not
// the case for the FROZEN sleep mode.
// --
// When the USART interrupt occurs, this will wake the CPU up which will then
// execute the interrupt handler code then come back to the while(1) loop below
// to execute the sleep instruction again.
while (1)
{
for (i = 0; i < 100000; i++);
usart_write_char (EXAMPLE_INT_USART, '*');
EXAMPLE_INT_USART->IER.txempty = 1;
/**/
// If there is a chance that any PB write operations are incomplete, the CPU
// should perform a read operation from any register on the PB bus before
// executing the sleep instruction.
// AVR32_INTC.ipr[0]; // Dummy read
// Go to FROZEN sleep mode.
// SLEEP(AVR32_PM_SMODE_FROZEN);
// When the device wakes up due to an interrupt, once the interrupt is serviced,
// go back into FROZEN sleep mode.
}
}
