void imu_init(void)
{
printf("imu init\r\n");
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
pin_set_output(GPIOE, PORTE_CS, 1);
pin_set_alternate_function(GPIOA, PORTA_SCLK, 5);
pin_set_alternate_function(GPIOA, PORTA_MISO, 5);
pin_set_alternate_function(GPIOB, PORTB_MOSI, 5);
pin_set_output_speed(GPIOA, PORTA_SCLK, 3);
pin_set_output_speed(GPIOB, PORTB_MOSI, 3);
pin_set_output_speed(GPIOE, PORTE_CS , 3);
SPI1->CR1 = SPI_CR1_SSM | // software slave select management
SPI_CR1_SSI | // assert software select state
SPI_CR1_CPHA | // clock phase: cpha = 1, cpol = 1
SPI_CR1_CPOL | // ditto
SPI_CR1_MSTR | // master mode
SPI_CR1_BR_0 | // baud rate sel. need to calculate.
SPI_CR1_BR_1 | // ditto
SPI_CR1_SPE ; // enable SPI
delay_us(100);
accel_write_reg(0x20, 0x87); // set max beef (1600 Hz)
delay_us(100); // wake up plz
#ifdef PRINT_REGISTER_TABLE
uint8_t info1 = accel_read_reg(0x0d);
printf("info1 = 0x%02x\r\n", (unsigned)info1);
#endif
float test_accel[3] = {0};
for (int i = 0; i < 10; i++)
{
delay_ms(10);
imu_poll_accels(test_accel);
}
}
void enet_mac_init_pins()
{
printf("enet_mac_init_pins()\r\n");
pin_set_alternate_function(GPIOA, PORTA_ETH_REFCLK, AF_ENET);
pin_set_alternate_function(GPIOA, PORTA_ETH_MDIO , AF_ENET);
pin_set_alternate_function(GPIOC, PORTC_ETH_MDC , AF_ENET);
pin_set_alternate_function(GPIOB, PORTB_ETH_TXEN , AF_ENET);
pin_set_alternate_function(GPIOB, PORTB_ETH_TXD0 , AF_ENET);
pin_set_alternate_function(GPIOB, PORTB_ETH_TXD1 , AF_ENET);
pin_set_alternate_function(GPIOA, PORTA_ETH_CRSDV , AF_ENET);
pin_set_alternate_function(GPIOC, PORTC_ETH_RXD0 , AF_ENET);
pin_set_alternate_function(GPIOC, PORTC_ETH_RXD1 , AF_ENET);
pin_set_output_speed(GPIOB, PORTB_ETH_TXEN, 3); // max beef
pin_set_output_speed(GPIOB, PORTB_ETH_TXD0, 3); // max beef
pin_set_output_speed(GPIOB, PORTB_ETH_TXD1, 3); // max beef
pin_set_output(GPIOE, PORTE_PHY_RESET, 1);
delay_ms(100);
pin_set_output_state(GPIOE, PORTE_PHY_RESET, 0);
delay_ms(100);
pin_set_output_state(GPIOE, PORTE_PHY_RESET, 1);
delay_ms(100);
}
void console_init(void)
{
RCC->APB2ENR |= RCC_APB2ENR_USART6EN;
pin_set_alternate_function(GPIOC, PORTC_RX_PIN, 8);
pin_set_alternate_function(GPIOC, PORTC_TX_PIN, 8);
g_console_usart->CR1 &= ~USART_CR1_UE;
g_console_usart->CR1 |= USART_CR1_TE | USART_CR1_RE;
// we want 1 megabit. do this with mantissa=5 and fraction (sixteenths)=4
g_console_usart->BRR = (((uint16_t)5) << 4) | 4;
g_console_usart->CR1 |= USART_CR1_UE;
g_console_init_complete = true;
}
void usb_fs_init_pins(void){
pin_set_alternate_function(GPIOA, PORTA_USB_FS_DP, AF_USB_FS);
pin_set_alternate_function(GPIOA, PORTA_USB_FS_DM, AF_USB_FS);
pin_set_alternate_function(GPIOA, PORTA_USB_FS_ID, AF_USB_FS);
// Output type ? Push Pull ok?
// pin_set_output_type(GPIOD, PORTD_USB_FS_OVERCURRENT, PIN_OUTPUT_TYPE_OPEN_DRAIN);
// pin_set_output_type(GPIOC, PORTC_USB_FS_PWR_SWITCH_ON, PIN_OUTPUT_TYPE_OPEN_DRAIN);
// pin_set_output_type(GPIOA, PORTA_USB_FS_VBUS, PIN_OUTPUT_TYPE_OPEN_DRAIN);
pin_set_output_speed(GPIOA, PORTA_USB_FS_DM, 3);
pin_set_output_speed(GPIOA, PORTA_USB_FS_DP, 3);
}
void xsens_init()
{
printf("xsens init\r\n");
RCC->APB1ENR |= RCC_APB1ENR_UART7EN;
pin_set_alternate_function(GPIOF, PORTF_UART_TX_PIN, 8);
pin_set_alternate_function(GPIOF, PORTF_UART_RX_PIN, 8);
pin_set_output(GPIOF, PORTF_UART_TXEN_PIN, 1);
pin_set_output(GPIOF, PORTF_UART_DUPLEX_PIN, 0); // full-duplex mode
UART7->CR1 &= ~USART_CR1_UE;
UART7->CR1 |= USART_CR1_TE | USART_CR1_RE;
UART7->CR1 |= USART_CR1_UE | USART_CR1_RXNEIE;
NVIC_SetPriority(UART7_IRQn, 1);
NVIC_EnableIRQ(UART7_IRQn);
/*
xsens_set_baudrate(115200);
//uart_set_baudrate(XSENS_UART_IDX, 115200); // default baud rate at power-up
uint8_t baudrate = 0; // xsens codeword for 460800 baud
xsens_tx_pkt(0x18, 1, &baudrate);
delay_ms(1);
*/
xsens_set_baudrate(460800); // go faster yo
//xsens_reset();
/*
delay_ms(10);
xsens_set_config_mode();
delay_ms(10);
uint8_t mode_bits[2];
mode_bits[0] = 0x00; // none of the high-order stuff
mode_bits[1] = 0x06; // send calibrated sensors and orientation
xsens_tx_pkt(0xd0, 2, mode_bits);
uint8_t period_bits[2];
// 115200 / 400 = 288
period_bits[0] = 288 / 256;
period_bits[1] = (uint16_t)288 & 0xff;
xsens_tx_pkt(0x04, 2, period_bits);
delay_ms(10);
xsens_set_measurement_mode();
*/
//uart_set_rx_callback(XSENS_UART_IDX, xsens_rx_byte);
}
void enc_init()
{
printf("enc_init()\r\n");
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
/*
RCC->APB2ENR |= RCC_APB2ENR_TIM1EN;
pin_set_alternate_function(GPIOA, PORTA_ENC_A, 1); // TIM1 = AF1
//pin_set_alternate_function(GPIOA, PORTA_ENC_B, 1); // TIM1 = AF1
TIM1->PSC = 9; // divide inbound clock by 10
TIM1->CCMR1 |= TIM_CCMR1_CC1S_0 | // select capture mode on TI1
(3 << 4); // set filter=3, meaning, N=8
TIM1->CCER = TIM_CCER_CC1P; // falling edge capture
TIM1->CCER |= TIM_CCER_CC1E; // enable capture
TIM1->SMCR |= (5 << 4) | // filtered timer input 1 as sync trigger
4; // reset mode: trigger input resets counter
TIM1->CR1 |= TIM_CR1_CEN; // turn on counter
*/
pin_set_output(GPIOA, PORTA_ENC_CS, 1);
pin_set_alternate_function(GPIOA, PORTA_ENC_SCLK, 5);
pin_set_alternate_function(GPIOA, PORTA_ENC_MISO, 5);
pin_set_alternate_function(GPIOA, PORTA_ENC_MOSI, 5);
pin_set_output_speed(GPIOA, PORTA_ENC_CS , 3); // max beef
pin_set_output_speed(GPIOA, PORTA_ENC_SCLK, 3); // max beef
pin_set_output_speed(GPIOA, PORTA_ENC_MISO, 3); // max beef
pin_set_output_speed(GPIOA, PORTA_ENC_MOSI, 3); // max beef
SPI1->CR1 = SPI_CR1_SSM | // software slave select management
SPI_CR1_SSI | // assert software select state
SPI_CR1_CPHA | // clock phase: cpol=0, cpha=1
SPI_CR1_MSTR | // master mode
SPI_CR1_BR_1 | // baud rate = pclk / 8 = 48/8 = 6 mhz
SPI_CR1_DFF | // set to 16-bit data frames
SPI_CR1_SPE ; // spi enable
// todo: if we want to be fancy, set up a RX interrupt...
/*
enc_txrx(0x0019); // write reg 0x19 (settings2);
enc_txrx(5 << 5); // set A/B/I res to 200
*/
}
void console_init()
{
s_console_init_complete = true;
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
pin_set_alternate_function(GPIOA, PORTA_TX_PIN, true, PIN_PULL_NONE);
s_console_usart->CR1 &= ~USART_CR1_UE;
s_console_usart->CR1 |= USART_CR1_TE | USART_CR1_RE;
s_console_usart->BRR = (((uint16_t)2) << 4) | 4;
s_console_usart->CR1 |= USART_CR1_UE;
}
void serial_init()
{
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
RCC->APB2ENR |= RCC_APB2ENR_USART6EN;
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
RCC->APB1ENR |= RCC_APB1ENR_UART8EN;
for (int i = 0; i < NUM_PORTS; i++)
{
serial_port_t *p = &g_ports[i];
pin_set_alternate_function(p->tx_gpio, p->tx_pin, p->af);
pin_set_alternate_function(p->rx_gpio, p->rx_pin, p->af);
pin_set_output(p->txe_gpio, p->txe_pin, 0);
int duplex = (i == 4 ? 0 : 1); // last port is full-duplex, others half
pin_set_output(p->duplex_gpio, p->duplex_pin, duplex);
USART_TypeDef *u = p->uart;
if (u == USART6 || u == USART1)
u->BRR = (((uint16_t)5) << 4) | 4; // divisor of 5.25 for 1M baud
else
u->BRR = (((uint16_t)2) << 4) | 10; // divisor of 2.625 for 1M baud
u->CR1 |= USART_CR1_UE; // enable the uart
}
}
void dmxl_init()
{
printf("dmxl_init()\r\n");
//serial_init();
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
pin_set_output(GPIOB, DMXL_PORTB_TXE_PIN, 0);
AFIO->MAPR |= AFIO_MAPR_USART1_REMAP;
pin_set_alternate_function(GPIOB, DMXL_PORTB_TX_PIN, true, PIN_PULL_NONE);
pin_set_alternate_function(GPIOB, DMXL_PORTB_RX_PIN, false, PIN_PULL_NONE);
USART1->CR1 &= ~USART_CR1_UE;
USART1->CR1 |= USART_CR1_TE | USART_CR1_RE;
USART1->BRR = (((uint16_t)4) << 4) | 8; // apb2 is 72 mhz; we want 1M baud
USART1->CR1 |= USART_CR1_UE | USART_CR1_RXNEIE;
NVIC_SetPriority(USART1_IRQn, 4);
NVIC_EnableIRQ(USART1_IRQn);
/*
uint8_t status_return_level = 1;
for (int i = 0; i < DMXL_NUM_CHAINS; i++)
for (int j = 0; j < g_dmxl_chains[i].num_nodes; j++)
dmxl_set_regs(i, j+1, 16, 1, &status_return_level);
*/
}
void enet_mac_init_pins(void)
{
printf("enet_init_pins()\r\n");
pin_set_alternate_function(GPIOA, PORTA_ETH_REFCLK, AF_ENET);
pin_set_alternate_function(GPIOA, PORTA_ETH_MDIO , AF_ENET);
pin_set_alternate_function(GPIOC, PORTC_ETH_MDC , AF_ENET);
pin_set_alternate_function(GPIOG, PORTG_ETH_TXEN , AF_ENET);
pin_set_alternate_function(GPIOC, PORTC_ETH_TXCLK , AF_ENET);
pin_set_alternate_function(GPIOG, PORTG_ETH_TXD0 , AF_ENET);
pin_set_alternate_function(GPIOG, PORTG_ETH_TXD1 , AF_ENET);
pin_set_alternate_function(GPIOC, PORTC_ETH_TXD2 , AF_ENET);
pin_set_alternate_function(GPIOB, PORTB_ETH_TXD3 , AF_ENET);
pin_set_alternate_function(GPIOA, PORTA_ETH_CRSDV , AF_ENET);
pin_set_alternate_function(GPIOC, PORTC_ETH_RXD0 , AF_ENET);
pin_set_alternate_function(GPIOC, PORTC_ETH_RXD1 , AF_ENET);
pin_set_alternate_function(GPIOH, PORTH_ETH_RXD2 , AF_ENET);
pin_set_alternate_function(GPIOH, PORTH_ETH_RXD3 , AF_ENET);
pin_set_output_speed(GPIOG, PORTG_ETH_TXEN , 3); // max beef
pin_set_output_speed(GPIOC, PORTC_ETH_TXCLK, 3); // max beef
pin_set_output_speed(GPIOG, PORTG_ETH_TXD0 , 3); // max beef
pin_set_output_speed(GPIOG, PORTG_ETH_TXD1 , 3); // max beef
pin_set_output_speed(GPIOC, PORTC_ETH_TXD2 , 3); // max beef
pin_set_output_speed(GPIOB, PORTB_ETH_TXD3 , 3); // max beef
}
void portsInit()
{
// to do: automatically find ports of each finger/encoder
// for (int i = 0; i < NUM_FINGERS; ++i)
// {
// handPorts.takktile[i] = ...
// }
handPorts.takktile[0] = (uint32_t*) I2C1_BASE;
handPorts.takktile[1] = (uint32_t*) SPI1_BASE;
handPorts.takktile[2] = (uint32_t*) I2C3_BASE;
handPorts.encoder[0] = (uint32_t*) I2C1_BASE;
handPorts.encoder[1] = (uint32_t*) SPI1_BASE;
handPorts.encoder[2] = (uint32_t*) I2C3_BASE;
// CORRECT, for now all IMUs connected to I2C bus 3
handPorts.imu[0] = (uint32_t*) I2C3_BASE;
handPorts.imu[1] = (uint32_t*) I2C3_BASE;
handPorts.imu[2] = (uint32_t*) I2C3_BASE;
handPorts.imu[3] = (uint32_t*) I2C3_BASE;
handPorts.encoderI2CAddress[0] = AS5048_7BIT_ADDRESS;
handPorts.encoderI2CAddress[1] = AS5048_7BIT_ADDRESS_SPI;
handPorts.encoderI2CAddress[2] = AS5048_7BIT_ADDRESS;
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN |
RCC_AHB1ENR_GPIOBEN |
RCC_AHB1ENR_GPIOCEN |
RCC_AHB1ENR_GPIODEN;
RCC->APB1ENR |= RCC_APB1ENR_I2C1EN |
RCC_APB1ENR_I2C3EN |
RCC_APB1ENR_SPI2EN;
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
pin_set_alternate_function(GPIOB, PORTB_I2C1_SCL, 4);
pin_set_alternate_function(GPIOB, PORTB_I2C1_SDA, 4);
pin_set_output_type(GPIOB, PORTB_I2C1_SCL, PIN_OUTPUT_TYPE_OPEN_DRAIN);
pin_set_output_type(GPIOB, PORTB_I2C1_SDA, PIN_OUTPUT_TYPE_OPEN_DRAIN);
pin_set_alternate_function(GPIOA, PORTA_I2C3_SCL, 4);
pin_set_alternate_function(GPIOC, PORTC_I2C3_SDA, 4);
pin_set_output_type(GPIOA, PORTA_I2C3_SCL, PIN_OUTPUT_TYPE_OPEN_DRAIN);
pin_set_output_type(GPIOC, PORTC_I2C3_SDA, PIN_OUTPUT_TYPE_OPEN_DRAIN);
//I2C1->CCR |= I2C_CCR_FS | // set fast mode
// 35; // 42 MHz / (3 * 400 kHz) == 35
//I2C1->TRISE = 42 * 300 / 1000 + 1; // not sure here.
I2C1->CR2 |= APB_MHZ; // 42MHz -> 101010
I2C1->CCR |= I2C_CCR; // I2C_CCR = 210
I2C1->TRISE &= ~0x3f; // 0x3f = 0b00111111 -> 0b11000000, clearing register
I2C1->TRISE |= I2C_TRISE; // = I2C_TRISE = (APB_MHZ * 200 / 1000 + 1), maximum rise time
I2C1->CR1 |= I2C_CR1_PE; // peripheral enable
I2C3->CR2 |= APB_MHZ;
I2C3->CCR |= I2C_CCR;
I2C3->TRISE &= ~0x3f;
I2C3->TRISE |= I2C_TRISE;
I2C3->CR1 |= I2C_CR1_PE;
// now, set up the spi-to-i2c bridges
pin_set_output(GPIOC, PORTC_I2C_BRIDGE_RESET);
pin_set_output(GPIOA, PORTA_BRIDGE0_CS);
pin_set_output(GPIOB, PORTB_BRIDGE1_CS);
pin_set_output_level(GPIOA, PORTA_BRIDGE0_CS, 1);
pin_set_output_level(GPIOA, PORTB_BRIDGE1_CS, 1);
pin_set_alternate_function(GPIOA, PORTA_BRIDGE0_MISO, 5);
pin_set_alternate_function(GPIOB, PORTB_BRIDGE0_MOSI, 5);
pin_set_alternate_function(GPIOA, PORTA_BRIDGE0_SCLK, 5);
pin_set_alternate_function(GPIOC, PORTC_BRIDGE1_MISO, 5);
pin_set_alternate_function(GPIOC, PORTC_BRIDGE1_MOSI, 5);
pin_set_alternate_function(GPIOD, PORTD_BRIDGE1_SCLK, 5);
// SPI1
// running from a 84 MHz pclk. set it up with
// sclk = pclk/64 to stay within datasheet limits.
SPI1->CR1 = SPI_CR1_BR_2 | // sclk = pclk/64
SPI_CR1_BR_0 | // sclk = pclk/64
SPI_CR1_MSTR | // master mode
SPI_CR1_CPOL | // clock to 1 when idle
SPI_CR1_CPHA | // the second clock transition is the first data capture edge
SPI_CR1_SSM | // software slave-select mode
SPI_CR1_SSI | // the value of this bit is forced onto the NSS pin and the IO value of the NSS pin is ignored.
SPI_CR1_SPE; // SPI enable
// bit rate = 42 mhz / 32 = 1.313 MHz
SPI2->CR1 = SPI_CR1_BR_2 | // sclk = pclk/32
SPI_CR1_MSTR | // master mode
SPI_CR1_CPOL | // clock to 1 when idle
SPI_CR1_CPHA | // the second clock transition is the first data capture edge
SPI_CR1_SSM | // software slave-select mode
SPI_CR1_SSI | // the value of this bit is forced onto the NSS pin and the IO value of the NSS pin is ignored.
SPI_CR1_SPE; // SPI enable
}
