示例#1
0
int main(void)
{
	// Configure pin 7 on EXT1 as output
	ioport_configure_pin(EXT1_PIN_7,IOPORT_DIR_OUTPUT);
	
	sysclk_init();
	board_init();

	// Start TC and configure pin to get PWM output to LED on IO1 Xplained Pro extension board
	tc_init();

	while (1) {
		struct pll_config pcfg;

		/*
		 * Initial state: Running from RC32M prescalers with 16x
		 * prescaling of CLKsys, 2x prescaling for CLKper2 and 2x
		 * prescaling for CLKper.
		 */
		wait_for_btn_press();

		/*
		 * Prescale CLKsys by 128x, prescale all peripheral clocks by 1.
		 */
		sysclk_set_prescalers(SYSCLK_PSADIV_128, SYSCLK_PSBCDIV_1_1);
		wait_for_btn_press();

		/*
		 * Switch to RC2M with 4x prescaling of CLKsys, 4x prescaling
		 * for CLKper2 and 1x prescaling for CLKper.
		 */
		osc_enable(OSC_ID_RC2MHZ);
		do {} while (!osc_is_ready(OSC_ID_RC2MHZ));
		sysclk_set_source(SYSCLK_SRC_RC2MHZ);
		sysclk_set_prescalers(SYSCLK_PSADIV_4, SYSCLK_PSBCDIV_4_1);
		osc_disable(OSC_ID_RC32MHZ);
		wait_for_btn_press();

		/*
		 * Switch to PLL with RC2M as reference and 4x multiplier.
		 * Prescale CLKsys by 128x, and all peripheral clocks by 1x.
		 */
		pll_config_init(&pcfg, PLL_SRC_RC2MHZ, 1, 4);
		pll_enable(&pcfg, 0);
		do {} while (!pll_is_locked(0));
		sysclk_set_prescalers(SYSCLK_PSADIV_128, SYSCLK_PSBCDIV_1_1);
		sysclk_set_source(SYSCLK_SRC_PLL);
		wait_for_btn_press();

		/*
		 * Go back to the initial state and start over.
		 */
		osc_enable(OSC_ID_RC32MHZ);
		do {} while(!osc_is_ready(OSC_ID_RC32MHZ));
		sysclk_set_source(SYSCLK_SRC_RC32MHZ);
		sysclk_set_prescalers(SYSCLK_PSADIV_16, SYSCLK_PSBCDIV_2_2);
		pll_disable(0);
		osc_disable(OSC_ID_RC2MHZ);
	}
}
示例#2
0
/**
 * \brief cleanup pll/dfll test
 *
 * \param test Current test case.
 */
static void cleanup_pll_dfll_test(const struct test_case *test)
{

#ifdef CONFIG_PLL0_SOURCE
    pll_disable(PLL0);
#endif

#ifdef CONFIG_PLL1_SOURCE
    pll_disable(PLL1);
#endif

#ifdef CONFIG_DFLL0_SOURCE
    dfll_disable_closed_loop(0);
    osc_disable(OSC_ID_RCSYS);
#endif

}
示例#3
0
文件: sysclk.c 项目: Bidski/TAJ3850
/**
 * \brief Disable the USB clock.
 *
 * \note This implementation does not switch off the PLL, it just turns off the
 *       USB clock.
 */
void sysclk_disable_usb(void)
{
	if (CONFIG_SYSCLK_SOURCE != SYSCLK_SRC_UPLLCK) {
		pll_disable(1);
	}
}
示例#4
0
/**
 * \brief Disable full speed USB clock.
 *
 * \note This implementation does not switch off the PLL, it just turns off the USB clock.
 */
void sysclk_disable_usb(void)
{
	pll_disable(1);
}