void vPortTickISR( void ) { /* Re-enabled interrupts. */ __asm volatile( "SETPSW I" ); /* Increment the tick, and perform any processing the new tick value necessitates. Ensure IPL is at the max syscall value first. */ portDISABLE_INTERRUPTS_FROM_KERNEL_ISR(); { if( xTaskIncrementTick() != pdFALSE ) { taskYIELD(); } } portENABLE_INTERRUPTS_FROM_KERNEL_ISR(); #if configUSE_TICKLESS_IDLE == 1 { /* The CPU woke because of a tick. */ ulTickFlag = pdTRUE; /* If this is the first tick since exiting tickless mode then the CMT compare match value needs resetting. */ CMT0.CMCOR = ( uint16_t ) ulMatchValueForOneTick; } #endif }
void vTickISR( void ) { /* Re-enabled interrupts. */ __asm volatile( "SETPSW I" ); /* Increment the tick, and perform any processing the new tick value necessitates. Ensure IPL is at the max syscall value first. */ portDISABLE_INTERRUPTS_FROM_KERNEL_ISR(); { if( xTaskIncrementTick() != pdFALSE ) { taskYIELD(); } } portENABLE_INTERRUPTS_FROM_KERNEL_ISR(); }
void vTickISR( void ) { /* Re-enabled interrupts. */ __asm volatile( "SETPSW I" ); /* Increment the tick, and perform any processing the new tick value necessitates. Ensure IPL is at the max syscall value first. */ portDISABLE_INTERRUPTS_FROM_KERNEL_ISR(); { vTaskIncrementTick(); } portENABLE_INTERRUPTS_FROM_KERNEL_ISR(); /* Only select a new task if the preemptive scheduler is being used. */ #if( configUSE_PREEMPTION == 1 ) taskYIELD(); #endif }