/* stall other cpu that this cpu is pending to access dport register end */ void IRAM_ATTR esp_dport_access_stall_other_cpu_end(void) { #ifndef CONFIG_FREERTOS_UNICORE int cpu_id = xPortGetCoreID(); if (dport_core_state[0] == DPORT_CORE_STATE_IDLE || dport_core_state[1] == DPORT_CORE_STATE_IDLE) { return; } if (dport_access_ref[cpu_id] == 0) { assert(0); } dport_access_ref[cpu_id]--; if (dport_access_ref[cpu_id] == 0) { dport_access_end[cpu_id] = 1; portEXIT_CRITICAL_ISR(&g_dport_mux); } portEXIT_CRITICAL_NESTED(oldInterruptLevel[cpu_id]); #ifdef DPORT_ACCESS_BENCHMARK ccount_end[cpu_id] = XTHAL_GET_CCOUNT(); ccount_margin[cpu_id][ccount_margin_cnt] = ccount_end[cpu_id] - ccount_start[cpu_id]; ccount_margin_cnt = (ccount_margin_cnt + 1)&(DPORT_ACCESS_BENCHMARK_STORE_NUM - 1); #endif #endif /* CONFIG_FREERTOS_UNICORE */ }
static void IRAM_ATTR wifi_int_restore_wrapper(void *wifi_int_mux, uint32_t tmp) { if (xPortInIsrContext()) { portEXIT_CRITICAL_ISR(wifi_int_mux); } else { portEXIT_CRITICAL(wifi_int_mux); } }
void esp_dport_access_int_deinit(void) { portENTER_CRITICAL_ISR(&g_dport_mux); dport_core_state[0] = DPORT_CORE_STATE_IDLE; #ifndef CONFIG_FREERTOS_UNICORE dport_core_state[1] = DPORT_CORE_STATE_IDLE; #endif portEXIT_CRITICAL_ISR(&g_dport_mux); }