void interface_alloc(DmaManager* dma) { for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) { portalDCacheFlushInval(srcAllocs[i], walloc_sz, srcBuffers[i]); portalDCacheFlushInval(dstAllocs[i], ralloc_sz, dstBuffers[i]); ref_srcAllocs[i] = dma->reference(srcAllocs[i]); ref_dstAllocs[i] = dma->reference(dstAllocs[i]); } for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) { for ( int j = 0; j < WRITE_BUFFER_WAYS; j++ ) { int idx = i*WRITE_BUFFER_WAYS+j; int offset = j*1024*16; // device->addWriteHostBuffer(ref_srcAllocs[i], offset, idx); writeBuffers[idx] = srcBuffers[i] + (offset/sizeof(unsigned int)); } } for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) { for ( int j = 0; j < READ_BUFFER_WAYS; j++ ) { int idx = i*READ_BUFFER_WAYS+j; int offset = j*1024*16; // device->addReadHostBuffer(ref_dstAllocs[i], offset, idx); readBuffers[idx] = dstBuffers[i] + (offset/sizeof(unsigned int)); } } }
int main(int argc, const char **argv) { unsigned int srcGen = 0; unsigned repeatCount = 0; fprintf(stderr, "%s %s\n", __DATE__, __TIME__); device = new PerfRequestProxy(IfcNames_PerfRequest); DmaDebugRequestProxy *hostDmaDebugRequest = new DmaDebugRequestProxy(IfcNames_HostDmaDebugRequest); dmap = new MMUConfigRequestProxy(IfcNames_HostMMUConfigRequest); DmaManager *dma = new DmaManager(hostDmaDebugRequest, dmap); DmaDebugIndication *hostDmaDebugIndication = new DmaDebugIndication(dma, IfcNames_HostDmaDebugIndication); MMUConfigIndication *hostMMUConfigIndication = new MMUConfigIndication(dma, IfcNames_HostMMUConfigIndication); deviceIndication = new PerfIndication(IfcNames_PerfIndication); fprintf(stderr, "Main::allocating memory...\n"); srcAlloc = portalAlloc(alloc_sz); dstAlloc = portalAlloc(alloc_sz); srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz); dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz); portalExec_start(); portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer); portalDCacheFlushInval(dstAlloc, alloc_sz, dstBuffer); fprintf(stderr, "Main::flush and invalidate complete\n"); ref_srcAlloc = dma->reference(srcAlloc); ref_dstAlloc = dma->reference(dstAlloc); fprintf(stderr, "ref_srcAlloc %d\n", ref_srcAlloc); fprintf(stderr, "ref_dstAlloc %d\n", ref_dstAlloc); //fprintf(stderr, "Main::starting mempcy numWords:%d\n", 0); //dotest(0); for (repeatCount = 1; repeatCount <= 16; repeatCount <<= 1) { fprintf(stderr, "Main::starting mempcy repeatCount:%d\n", repeatCount); for (numWords = 16; numWords < (1 << 16); numWords <<= 1){ //fprintf(stderr, "Main::starting mempcy numWords:%d\n", numWords); dotest(numWords, repeatCount); } } device->getStateDbg(); fprintf(stderr, "Main::exiting\n"); }
static void fill_pixels(int offset) { int *ptr = dataptr[frame_index]; for (int line = 0; line < nlines; line++) for (int pixel = 0; pixel < npixels; pixel++) { int v = ((((MAX_PIXEL * line) / nlines)+offset) % MAX_PIXEL) << 16 | ((((MAX_PIXEL * pixel) / npixels)+offset) % MAX_PIXEL); if (!v) v = 1; if (line < 20 && pixel < 20) v = corner[(corner_index+0) % 4]; if (line < 30 && pixel > npixels - 40) v = corner[(corner_index+1) % 4]; if (line > nlines - 20 && pixel < 20) v = corner[(corner_index+2) % 4]; if (line > nlines - 30 && pixel > npixels - 40) v = corner[(corner_index+3) % 4]; if (line < 20 && pixel % 20 < 2) v = corner[(corner_index+0) % 4]; if (line % 30 < 2 && pixel > npixels - 40) v = corner[(corner_index+1) % 4]; ptr[line * npixels + pixel] = v; } corner_index = offset/16; portalDCacheFlushInval(allocFrame[frame_index], fbsize, dataptr[frame_index]); device->startFrameBuffer(ref_srcAlloc[frame_index], fbsize); hdmiInternal->setTestPattern(0); hdmiInternal->waitForVsync(0); frame_index = 1 - frame_index; }
int main(int argc, const char **argv) { int srcAlloc; unsigned int *srcBuffer = 0; MemreadRequestProxy *device = 0; DmaConfigProxy *dmap = 0; MemreadIndication *deviceIndication = 0; DmaIndication *dmaIndication = 0; fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__); device = new MemreadRequestProxy(IfcNames_MemreadRequest); dmap = new DmaConfigProxy(IfcNames_DmaConfig); DmaManager *dma = new DmaManager(dmap); deviceIndication = new MemreadIndication(IfcNames_MemreadIndication); dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication); fprintf(stderr, "Main::allocating memory...\n"); srcAlloc = portalAlloc(alloc_sz); srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz); portalExec_start(); for (int i = 0; i < numWords; i++){ srcBuffer[i] = i; } portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer); fprintf(stderr, "Main::flush and invalidate complete\n"); unsigned int ref_srcAlloc = dma->reference(srcAlloc); fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc); fprintf(stderr, "Main::starting read %08x\n", numWords); portalTimerStart(0); int burstLen = 16; #ifndef BSIM int iterCnt = 64; #else int iterCnt = 2; #endif device->startRead(ref_srcAlloc, numWords, burstLen, iterCnt); sem_wait(&test_sem); uint64_t cycles = portalTimerLap(0); uint64_t beats = dma->show_mem_stats(ChannelType_Read); float read_util = (float)beats/(float)cycles; fprintf(stderr, "memory read utilization (beats/cycle): %f\n", read_util); MonkitFile("perf.monkit") .setHwCycles(cycles) .setReadBwUtil(read_util) .writeFile(); exit(mismatchCount ? 1 : 0); }
int main(int argc, const char **argv) { unsigned int srcGen = 0; NandSimRequestProxy *device = 0; DmaConfigProxy *dmap = 0; NandSimIndication *deviceIndication = 0; DmaIndication *dmaIndication = 0; fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__); device = new NandSimRequestProxy(IfcNames_NandSimRequest); dmap = new DmaConfigProxy(IfcNames_DmaConfig); DmaManager *dma = new DmaManager(dmap); deviceIndication = new NandSimIndication(IfcNames_NandSimIndication); dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication); fprintf(stderr, "Main::allocating memory...\n"); srcAlloc = portalAlloc(numBytes); srcBuffer = (unsigned int *)portalMmap(srcAlloc, numBytes); fprintf(stderr, "fd=%d, srcBuffer=%p\n", srcAlloc, srcBuffer); portalExec_start(); for (int i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) srcBuffer[i] = srcGen++; portalDCacheFlushInval(srcAlloc, numBytes, srcBuffer); fprintf(stderr, "Main::flush and invalidate complete\n"); sleep(1); unsigned int ref_srcAlloc = dma->reference(srcAlloc); nandAlloc = portalAlloc(nandBytes); int ref_nandAlloc = dma->reference(nandAlloc); fprintf(stderr, "NAND alloc fd=%d ref=%d\n", nandAlloc, ref_nandAlloc); device->configureNand(ref_nandAlloc, nandBytes); deviceIndication->wait(); fprintf(stderr, "Main::starting write ref=%d, len=%08zx\n", ref_srcAlloc, numBytes); device->startWrite(ref_srcAlloc, 0, 0, numBytes, 16); deviceIndication->wait(); fprintf(stderr, "Main::starting read %08zx\n", numBytes); device->startRead(ref_srcAlloc, 0, 0, numBytes, 16); deviceIndication->wait(); fprintf(stderr, "Main::starting erase %08zx\n", numBytes); device->startErase(0, numBytes); deviceIndication->wait(); fprintf(stderr, "Main::starting read %08zx\n", numBytes); device->startRead(ref_srcAlloc, 0, 0, numBytes, 16); deviceIndication->wait(); return 0; }
int main(int argc, const char **argv) { unsigned int srcGen = 0; Memread2RequestProxy *device = 0; Memread2Indication *deviceIndication = 0; fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__); device = new Memread2RequestProxy(IfcNames_Memread2Request); DmaDebugRequestProxy *hostDmaDebugRequest = new DmaDebugRequestProxy(IfcNames_HostDmaDebugRequest); MMUConfigRequestProxy *dmap = new MMUConfigRequestProxy(IfcNames_HostMMUConfigRequest); DmaManager *dma = new DmaManager(hostDmaDebugRequest, dmap); DmaDebugIndication *hostDmaDebugIndication = new DmaDebugIndication(dma, IfcNames_HostDmaDebugIndication); MMUConfigIndication *hostMMUConfigIndication = new MMUConfigIndication(dma, IfcNames_HostMMUConfigIndication); deviceIndication = new Memread2Indication(IfcNames_Memread2Indication); fprintf(stderr, "Main::allocating memory...\n"); srcAlloc = portalAlloc(alloc_sz); srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz); srcAlloc2 = portalAlloc(alloc_sz); srcBuffer2 = (unsigned int *)portalMmap(srcAlloc2, alloc_sz); portalExec_start(); for (int i = 0; i < numWords; i++){ int v = srcGen++; srcBuffer[i] = v; srcBuffer2[i] = v*3; } portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer); fprintf(stderr, "Main::flush and invalidate complete\n"); unsigned int ref_srcAlloc = dma->reference(srcAlloc); fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc); unsigned int ref_srcAlloc2 = dma->reference(srcAlloc2); fprintf(stderr, "ref_srcAlloc2=%d\n", ref_srcAlloc2); fprintf(stderr, "Main::starting read %08x\n", numWords); device->startRead(ref_srcAlloc, ref_srcAlloc2, 32, 16); fprintf(stderr, "Main::sleeping\n"); while(true){ sleep(3); device->getStateDbg(); uint64_t beats = dma->show_mem_stats(ChannelType_Read); fprintf(stderr, " beats: %"PRIx64"\n", beats); hostDmaDebugRequest->getStateDbg(ChannelType_Read); } }
int main(int argc, char **argv) { DtpTestRequestProxy *device = new DtpTestRequestProxy(IfcNames_DtpTestRequest); DtpTestIndication *deviceIndication = new DtpTestIndication(IfcNames_DtpTestIndication); MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest); MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest); DmaManager *dma = new DmaManager(dmap); MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication); MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication); const std::string path="../data/encoded.data2"; std::ifstream traceinfo(path.c_str()); std::string line; int srcAlloc; srcAlloc = portalAlloc(alloc_sz); unsigned long int *srcBuffer = (unsigned long int *)portalMmap(srcAlloc, alloc_sz); portalExec_start(); for (int i = 0; i < numWords; /*NONE*/ ) { std::getline(traceinfo, line); std::istringstream iss(line); std::string ignored_first_64; iss >> ignored_first_64; std::string first_64; iss >> first_64; std::string ignored_second_64; iss >> ignored_second_64; std::string second_64; iss >> second_64; srcBuffer[i++] = strtoul(second_64.c_str(), NULL, 16); /*second_64 is LSB*/ srcBuffer[i++] = strtoul(first_64.c_str(), NULL, 16); //std::cout << first_64 << second_64 << std::endl; } portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer); unsigned int ref_srcAlloc = dma->reference(srcAlloc); printf( "Main::starting read %08x\n", numWords); device->startDtp(ref_srcAlloc, numWords, burstLen, 1); sem_wait(&test_sem); return 0; }
int main(int argc, const char **argv) { unsigned int srcGen = 0; NandSimRequestProxy *device = 0; NandSimIndication *deviceIndication = 0; fprintf(stderr, "chamdoo-test\n"); fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__); device = new NandSimRequestProxy(IfcNames_NandSimRequest); deviceIndication = new NandSimIndication(IfcNames_NandSimIndication); DmaDebugRequestProxy *hostDmaDebugRequest = new DmaDebugRequestProxy(IfcNames_HostDmaDebugRequest); MMUConfigRequestProxy *dmap = new MMUConfigRequestProxy(IfcNames_HostMMUConfigRequest); DmaManager *dma = new DmaManager(hostDmaDebugRequest, dmap); DmaDebugIndication *hostDmaDebugIndication = new DmaDebugIndication(dma, IfcNames_HostDmaDebugIndication); MMUConfigIndication *hostMMUConfigIndication = new MMUConfigIndication(dma, IfcNames_HostMMUConfigIndication); fprintf(stderr, "Main::allocating memory...\n"); srcAlloc = portalAlloc(numBytes); srcBuffer = (unsigned int *)portalMmap(srcAlloc, numBytes); fprintf(stderr, "fd=%d, srcBuffer=%p\n", srcAlloc, srcBuffer); portalExec_start(); for (int i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) srcBuffer[i] = srcGen++; portalDCacheFlushInval(srcAlloc, numBytes, srcBuffer); fprintf(stderr, "Main::flush and invalidate complete\n"); sleep(1); unsigned int ref_srcAlloc = dma->reference(srcAlloc); nandAlloc = portalAlloc(nandBytes); int ref_nandAlloc = dma->reference(nandAlloc); fprintf(stderr, "NAND alloc fd=%d ref=%d\n", nandAlloc, ref_nandAlloc); device->configureNand(ref_nandAlloc, nandBytes); deviceIndication->wait(); /* do tests */ unsigned long loop = 0; unsigned long match = 0, mismatch = 0; while (loop < nandBytes) { int i; for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) { srcBuffer[i] = loop+i; } fprintf(stderr, "Main::starting write ref=%d, len=%08zx (%lu)\n", ref_srcAlloc, numBytes, loop); device->startWrite(ref_srcAlloc, 0, loop, numBytes, 16); deviceIndication->wait(); loop+=numBytes; } loop = 0; while (loop < nandBytes) { int i; fprintf(stderr, "Main::starting read %08zx (%lu)\n", numBytes, loop); device->startRead(ref_srcAlloc, 0, loop, numBytes, 16); deviceIndication->wait(); for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) { if (srcBuffer[i] != loop+i) { fprintf(stderr, "Main::mismatch [%08zx] != [%08zx]\n", loop+i, srcBuffer[i]); mismatch++; } else { match++; } } loop+=numBytes; } /* end */ fprintf(stderr, "Main::Summary: match=%lu mismatch:%lu (%lu) (%f percent)\n", match, mismatch, match+mismatch, (float)mismatch/(float)(match+mismatch)*100.0); return (mismatch > 0); }
int main(int argc, const char **argv) { MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest); MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest); DmaManager *dma = new DmaManager(dmap); MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication); MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication); fprintf(stderr, "Main::allocating memory...\n"); device = new FlashRequestProxy(IfcNames_FlashRequest); FlashIndication *deviceIndication = new FlashIndication(IfcNames_FlashIndication); srcAlloc = portalAlloc(srcAlloc_sz); dstAlloc = portalAlloc(dstAlloc_sz); srcBuffer = (unsigned int *)portalMmap(srcAlloc, srcAlloc_sz); dstBuffer = (unsigned int *)portalMmap(dstAlloc, dstAlloc_sz); fprintf(stderr, "dstAlloc = %x\n", dstAlloc); fprintf(stderr, "srcAlloc = %x\n", srcAlloc); pthread_mutex_init(&flashReqMutex, NULL); pthread_cond_init(&flashFreeTagCond, NULL); printf( "Done initializing hw interfaces\n" ); fflush(stdout); portalExec_start(); printf( "Done portalExec_start\n" ); fflush(stdout); portalDCacheFlushInval(dstAlloc, dstAlloc_sz, dstBuffer); portalDCacheFlushInval(srcAlloc, srcAlloc_sz, srcBuffer); ref_dstAlloc = dma->reference(dstAlloc); ref_srcAlloc = dma->reference(srcAlloc); for (int t = 0; t < NUM_TAGS; t++) { readTagTable[t].busy = false; writeTagTable[t].busy = false; int byteOffset = t * PAGE_SIZE; device->addDmaWriteRefs(ref_dstAlloc, byteOffset, t); device->addDmaReadRefs(ref_srcAlloc, byteOffset, t); readBuffers[t] = dstBuffer + byteOffset/sizeof(unsigned int); writeBuffers[t] = srcBuffer + byteOffset/sizeof(unsigned int); } for (int blk=0; blk<BLOCKS_PER_CHIP; blk++) { for (int c=0; c<CHIPS_PER_BUS; c++) { for (int bus=0; bus< CHIPS_PER_BUS; bus++) { flashStatus[bus][c][blk] = UNINIT; } } } for (int t = 0; t < NUM_TAGS; t++) { for ( int i = 0; i < PAGE_SIZE/sizeof(unsigned int); i++ ) { readBuffers[t][i] = 0; writeBuffers[t][i] = 0; } } device->start(0); device->setDebugVals(0,0); //flag, delay device->debugDumpReq(0); sleep(1); device->debugDumpReq(0); sleep(1); //TODO: test writes and erases //test erases for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){ for (int chip = 0; chip < CHIPS_PER_BUS; chip++){ for (int bus = 0; bus < NUM_BUSES; bus++){ eraseBlock(bus, chip, blk, waitIdleEraseTag()); } } } while (true) { usleep(100); if ( getNumErasesInFlight() == 0 ) break; } //read back erased pages for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){ for (int chip = 0; chip < CHIPS_PER_BUS; chip++){ for (int bus = 0; bus < NUM_BUSES; bus++){ int page = 0; readPage(bus, chip, blk, page, waitIdleReadBuffer()); } } } while (true) { usleep(100); if ( getNumReadsInFlight() == 0 ) break; } //write pages //FIXME: in old xbsv, simulatneous DMA reads using multiple readers cause kernel panic //Issue each bus separately for now for (int bus = 0; bus < NUM_BUSES; bus++){ for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){ for (int chip = 0; chip < CHIPS_PER_BUS; chip++){ int page = 0; //get free tag int freeTag = waitIdleWriteBuffer(); //fill write memory for (int w=0; w<PAGE_SIZE/sizeof(unsigned int); w++) { writeBuffers[freeTag][w] = hashAddrToData(bus, chip, blk, w); } //send request writePage(bus, chip, blk, page, freeTag); } while (true) { usleep(100); if ( getNumWritesInFlight() == 0 ) break; } } } //each bus timespec start, now; clock_gettime(CLOCK_REALTIME, & start); for (int repeat = 0; repeat < 1; repeat++){ for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){ for (int chip = 0; chip < CHIPS_PER_BUS; chip++){ for (int bus = 0; bus < NUM_BUSES; bus++){ //int blk = rand() % 1024; //int chip = rand() % 8; //int bus = rand() % 8; int page = 0; readPage(bus, chip, blk, page, waitIdleReadBuffer()); } } } } int elapsed = 0; while (true) { usleep(100); if (elapsed == 0) { elapsed=10000; device->debugDumpReq(0); } else { elapsed--; } if ( getNumReadsInFlight() == 0 ) break; } device->debugDumpReq(0); clock_gettime(CLOCK_REALTIME, & now); fprintf(stderr, "LOG: finished reading from page! %f\n", timespec_diff_sec(start, now) ); for ( int t = 0; t < NUM_TAGS; t++ ) { for ( int i = 0; i < PAGE_SIZE/sizeof(unsigned int); i++ ) { fprintf(stderr, "%x %x %x\n", t, i, readBuffers[t][i] ); } } if (testPass==1) { fprintf(stderr, "LOG: TEST PASSED!\n"); } else { fprintf(stderr, "LOG: **ERROR: TEST FAILED!\n"); } }
int runtest(int argc, const char ** argv) { int test_result = 0; int srcAlloc; unsigned int *srcBuffer = 0; MemreadRequestProxy *device = 0; MemreadIndication *deviceIndication = 0; fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__); device = new MemreadRequestProxy(IfcNames_MemreadRequest); deviceIndication = new MemreadIndication(IfcNames_MemreadIndication); MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest); MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest); DmaManager *dma = new DmaManager(dmap); MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication); MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication); fprintf(stderr, "Main::allocating memory...\n"); srcAlloc = portalAlloc(alloc_sz); srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz); portalExec_start(); #ifdef FPGA0_CLOCK_FREQ long req_freq = FPGA0_CLOCK_FREQ; long freq = 0; setClockFrequency(0, req_freq, &freq); fprintf(stderr, "Requested FCLK[0]=%ld actually %ld\n", req_freq, freq); #endif for (int i = 0; i < numWords; i++){ srcBuffer[i] = i; } portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer); fprintf(stderr, "Main::flush and invalidate complete\n"); unsigned int ref_srcAlloc = dma->reference(srcAlloc); fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc); if(true) { fprintf(stderr, "Main::test read %08x\n", numWords); // first attempt should get the right answer device->startRead(ref_srcAlloc, 0, numWords, burstLen); sem_wait(&test_sem); if (mismatchCount) { fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount); test_result++; // failed } } int err = 5; switch (err){ case 0: { fprintf(stderr, "Main: attempt to use a de-referenced sglist\n"); dma->dereference(ref_srcAlloc); device->startRead(ref_srcAlloc, 0, numWords, burstLen); break; } case 1: { fprintf(stderr, "Main: attempt to use an out-of-range sglist\n"); device->startRead(ref_srcAlloc+32, 0, numWords, burstLen); break; } case 2: { fprintf(stderr, "Main: attempt to use an invalid sglist\n"); device->startRead(ref_srcAlloc+1, 0, numWords, burstLen); break; } case 3: { fprintf(stderr, "Main: attempt to use an invalid mmusel\n"); device->startRead(ref_srcAlloc | (1<<16), 0, numWords, burstLen); break; } case 4: { fprintf(stderr, "Main: attempt to read off the end of the region\n"); device->startRead(ref_srcAlloc, numWords<<2, burstLen, burstLen); break; } default: { device->startRead(ref_srcAlloc, 0, numWords, burstLen); } } sem_wait(&test_sem); if (mismatchCount) { fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount); test_result++; // failed } return test_result; }
int main(int argc, const char **argv) { MaxcommonsubseqRequestProxy *device = 0; MaxcommonsubseqIndication *deviceIndication = 0; fprintf(stderr, "%s %s\n", __DATE__, __TIME__); device = new MaxcommonsubseqRequestProxy(IfcNames_MaxcommonsubseqRequest); MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest); MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest); DmaManager *dma = new DmaManager(dmap); MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication); MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication); deviceIndication = new MaxcommonsubseqIndication(IfcNames_MaxcommonsubseqIndication); if(sem_init(&test_sem, 1, 0)){ fprintf(stderr, "failed to init test_sem\n"); return -1; } portalExec_start(); fprintf(stderr, "simple tests\n"); int strAAlloc; int strBAlloc; int fetchAlloc; unsigned int alloc_len = 128; unsigned int fetch_len = alloc_len * alloc_len; int rcA, rcB, rcFetch; struct stat statAbuf, statBbuf, statFetchbuf; fetchAlloc = portalAlloc(fetch_len*sizeof(uint16_t)); rcFetch = fstat(fetchAlloc, &statFetchbuf); if (rcA < 0) perror("fstatFetch"); int *fetch = (int *)portalMmap(fetchAlloc, fetch_len * sizeof(uint16_t)); if (fetch == MAP_FAILED) perror("fetch mmap failed"); assert(fetch != MAP_FAILED); strAAlloc = portalAlloc(alloc_len); rcA = fstat(strAAlloc, &statAbuf); if (rcA < 0) perror("fstatA"); char *strA = (char *)portalMmap(strAAlloc, alloc_len); if (strA == MAP_FAILED) perror("strA mmap failed"); assert(strA != MAP_FAILED); strBAlloc = portalAlloc(alloc_len); rcB = fstat(strBAlloc, &statBbuf); if (rcA < 0) perror("fstatB"); char *strB = (char *)portalMmap(strBAlloc, alloc_len); if (strB == MAP_FAILED) perror("strB mmap failed"); assert(strB != MAP_FAILED); /* const char *strA_text = "___a_____b______c____"; const char *strB_text = "..a........b.c...."; */ const char *strA_text = "012a45678b012345c7890"; const char *strB_text = "ABaDEFGHIJKbMcOPQR"; assert(strlen(strA_text) < alloc_len); assert(strlen(strB_text) < alloc_len); strncpy(strA, strA_text, alloc_len); strncpy(strB, strB_text, alloc_len); int strA_len = strlen(strA); int strB_len = strlen(strB); uint16_t swFetch[fetch_len]; portalTimerInit(); portalTimerStart(0); fprintf(stderr, "elapsed time (hw cycles): %lld\n", (long long)portalTimerLap(0)); portalDCacheFlushInval(strAAlloc, alloc_len, strA); portalDCacheFlushInval(strBAlloc, alloc_len, strB); portalDCacheFlushInval(fetchAlloc, fetch_len*sizeof(uint16_t), fetch); unsigned int ref_strAAlloc = dma->reference(strAAlloc); unsigned int ref_strBAlloc = dma->reference(strBAlloc); unsigned int ref_fetchAlloc = dma->reference(fetchAlloc); device->setupA(ref_strAAlloc, 0, strA_len); sem_wait(&test_sem); device->setupB(ref_strBAlloc, 0, strB_len); sem_wait(&test_sem); uint64_t cycles; uint64_t beats; fprintf(stderr, "starting algorithm A\n"); portalTimerInit(); portalTimerStart(0); device->start(0); sem_wait(&test_sem); cycles = portalTimerLap(0); beats = hostMemServerIndication->getMemoryTraffic(ChannelType_Read); fprintf(stderr, "hw cycles: %f\n", (float)cycles); device->fetch(ref_fetchAlloc, 0, 0, fetch_len / 2); sem_wait(&test_sem); printf("fetch 1 finished \n"); device->fetch(ref_fetchAlloc, fetch_len, fetch_len / 2, fetch_len / 2); sem_wait(&test_sem); printf("fetch 2 finished \n"); memcpy(swFetch, fetch, fetch_len * sizeof(uint16_t)); printf(" "); for (int j = 0; j <= strB_len; j += 1) { printf("%4d", j); } printf("\n"); printf(" "); for (int j = 0; j <= strB_len; j += 1) { printf("%4c", strB[j-1]); } printf("\n"); for (int i = 0; i <= strA_len; i += 1) { printf("%4c%4d", strA[i-1], i); for (int j = 0; j <= strB_len; j += 1) { printf("%4d", swFetch[(i << 7) + j] & 0xff); } printf("\n"); } fprintf(stderr, "starting algorithm B, forward\n"); portalTimerInit(); portalTimerStart(0); device->start(1); sem_wait(&test_sem); cycles = portalTimerLap(0); fprintf(stderr, "hw cycles: %f\n", (float)cycles); device->fetch(ref_fetchAlloc, 0, 0, fetch_len / 2); sem_wait(&test_sem); memcpy(swFetch, fetch, fetch_len * sizeof(uint16_t)); printf(" "); for (int j = 0; j <= strB_len; j += 1) { printf("%4d", j); } printf("\n"); printf(" "); for (int j = 0; j <= strB_len; j += 1) { printf("%4c", strB[j-1]); } printf("\n"); for (int i = 0; i < 1; i += 1) { printf("%4c%4d", strA[i-1], i); for (int j = 0; j <= strB_len; j += 1) { printf("%4d", swFetch[(i << 7) + j] & 0xff); } printf("\n"); } /* reverse argument strings */ for (int i = 0; i < strA_len; i += 1) { strA[i] = strA_text[strA_len - i - 1]; } for (int i = 0; i < strB_len; i += 1) { strB[i] = strB_text[strB_len - i - 1]; } device->setupA(ref_strAAlloc, 0, strA_len); sem_wait(&test_sem); device->setupB(ref_strBAlloc, 0, strB_len); sem_wait(&test_sem); fprintf(stderr, "starting algorithm B, backward\n"); portalTimerInit(); portalTimerStart(0); device->start(2); sem_wait(&test_sem); cycles = portalTimerLap(0); fprintf(stderr, "hw cycles: %f\n", (float)cycles); device->fetch(ref_fetchAlloc, 0, 0, fetch_len / 2); sem_wait(&test_sem); memcpy(swFetch, fetch, fetch_len * sizeof(uint16_t)); printf(" "); for (int j = 0; j <= strB_len; j += 1) { printf("%4d", j); } printf("\n"); printf(" "); for (int j = 0; j <= strB_len; j += 1) { printf("%4c", strB[j-1]); } printf("\n"); for (int i = 0; i < 1; i += 1) { printf("%4c%4d", strA[i-1], i); for (int j = 0; j <= strB_len; j += 1) { printf("%4d", swFetch[(i << 7) + j] & 0xff); } printf("\n"); } /* forward argument strings */ for (int i = 0; i < strA_len; i += 1) { strA[i] = strA_text[i]; } for (int i = 0; i < strB_len; i += 1) { strB[i] = strB_text[i]; } device->setupA(ref_strAAlloc, 0, strA_len); sem_wait(&test_sem); device->setupB(ref_strBAlloc, 0, strB_len); sem_wait(&test_sem); fprintf(stderr, "starting algorithm C\n"); portalTimerInit(); portalTimerStart(0); device->start(3); sem_wait(&test_sem); cycles = portalTimerLap(0); fprintf(stderr, "hw cycles: %f\n", (float)cycles); device->fetch(ref_fetchAlloc, 0, 0, fetch_len / 2); sem_wait(&test_sem); memcpy(swFetch, fetch, fetch_len * sizeof(uint16_t)); if (result_length > strB_len) result_length = strB_len; printf("Algorithm C results\n"); for (int j = 0; j < result_length; j += 1) { char c = swFetch[j] & 0xff; printf(" %02x (%c)", 0xff & c, (isalnum(c) ? c: '_')); } printf("\n"); close(strAAlloc); close(strBAlloc); close(fetchAlloc); }
int main(int argc, const char **argv) { int myid = 0; fprintf(stderr, "Main: myid=%d\n", myid); MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest); MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest); DmaManager *dma = new DmaManager(dmap); MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication); MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication); fprintf(stderr, "Main::allocating memory...\n"); device = new FlashRequestProxy(IfcNames_FlashRequest); FlashIndication *deviceIndication = new FlashIndication(IfcNames_FlashIndication); srcAlloc = portalAlloc(srcAlloc_sz); dstAlloc = portalAlloc(dstAlloc_sz); srcBuffer = (unsigned int *)portalMmap(srcAlloc, srcAlloc_sz); dstBuffer = (unsigned int *)portalMmap(dstAlloc, dstAlloc_sz); fprintf(stderr, "dstAlloc = %x\n", dstAlloc); fprintf(stderr, "srcAlloc = %x\n", srcAlloc); pthread_mutex_init(&flashReqMutex, NULL); pthread_cond_init(&flashFreeTagCond, NULL); printf( "Done initializing hw interfaces\n" ); fflush(stdout); portalExec_start(); printf( "Done portalExec_start\n" ); fflush(stdout); portalDCacheFlushInval(dstAlloc, dstAlloc_sz, dstBuffer); portalDCacheFlushInval(srcAlloc, srcAlloc_sz, srcBuffer); ref_dstAlloc = dma->reference(dstAlloc); ref_srcAlloc = dma->reference(srcAlloc); device->setDmaWriteRef(ref_dstAlloc); device->setDmaReadRef(ref_srcAlloc); for (int t = 0; t < NUM_TAGS; t++) { readTagTable[t].busy = false; writeTagTable[t].busy = false; int byteOffset = t * PAGE_SIZE; printf("byteOffset=%x\n", byteOffset); fflush(stdout); readBuffers[t] = dstBuffer + byteOffset/sizeof(unsigned int); writeBuffers[t] = srcBuffer + byteOffset/sizeof(unsigned int); } for (int node=0; node<NUM_NODES; node++) { for (int blk=0; blk<BLOCKS_PER_CHIP; blk++) { for (int c=0; c<CHIPS_PER_BUS; c++) { for (int bus=0; bus< CHIPS_PER_BUS; bus++) { flashStatus[node][bus][c][blk] = UNINIT; } } } } for (int t = 0; t < NUM_TAGS; t++) { for ( int i = 0; i < PAGE_SIZE/sizeof(unsigned int); i++ ) { readBuffers[t][i] = 0; writeBuffers[t][i] = 0; } } //Start ext aurora auroraifc_start(myid); device->start(0); device->setDebugVals(0,0); //flag, delay device->debugDumpReq(0); sleep(1); device->debugDumpReq(0); sleep(1); if (myid==0) { timespec start, now; double timeElapsed = 0; int node = myid; if (doerasewrites) { //test erases //for (int node=NUM_NODES-1; node >= 1; node--) //for (int node=DST_NODE; node == DST_NODE; node++) for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){ for (int chip = 0; chip < CHIPS_PER_BUS; chip++){ for (int bus = 0; bus < NUM_BUSES; bus++){ eraseBlock(node, bus, chip, blk, waitIdleEraseTag()); } } } while (true) { usleep(100); if ( getNumErasesInFlight() == 0 ) break; } //read back erased pages //for (int node=NUM_NODES-1; node >= 1; node--) //for (int node=DST_NODE; node == DST_NODE; node++) for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){ for (int chip = 0; chip < CHIPS_PER_BUS; chip++){ for (int bus = 0; bus < NUM_BUSES; bus++){ int page = 0; readPage(node, bus, chip, blk, page, waitIdleReadBuffer()); } } } while (true) { usleep(100); if ( getNumReadsInFlight() == 0 ) break; } //write pages //FIXME: in old xbsv, simulatneous DMA reads using multiple readers cause kernel panic //Issue each bus separately for now int pagesWritten = 0; clock_gettime(CLOCK_REALTIME, & start); //for (int node=NUM_NODES-1; node >= 1; node--) //for (int node=DST_NODE; node == DST_NODE; node++) for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){ for (int chip = 0; chip < CHIPS_PER_BUS; chip++){ for (int bus = 0; bus < NUM_BUSES; bus++){ int page = 0; //get free tag int freeTag = waitIdleWriteBuffer(); //fill write memory; REMOVE THIS FOR PERFORMANCE TESTING! for (int w=0; w<PAGE_SIZE/sizeof(unsigned int); w++) { writeBuffers[freeTag][w] = hashAddrToData(node, bus, chip, blk, w); } //send request writePage(node, bus, chip, blk, page, freeTag); pagesWritten++; } } } while (true) { usleep(100); if ( getNumWritesInFlight() == 0 ) break; } clock_gettime(CLOCK_REALTIME, & now); timeElapsed = timespec_diff_sec(start, now); fprintf(stderr, "LOG: finished writing! time=%f, numPages=%d, bandwidth=%f MB/s\n", timeElapsed, pagesWritten, (pagesWritten*8)/timeElapsed/1024 ); } //doerasewrites sleep(1); int pagesRead = 0; clock_gettime(CLOCK_REALTIME, & start); //for (int node=NUM_NODES-1; node >= 1; node--) { //for (int node=DST_NODE; node == DST_NODE; node++) { for (int repeat = 0; repeat < 10; repeat++){ for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){ for (int chip = 0; chip < CHIPS_PER_BUS; chip++){ for (int bus = 0; bus < NUM_BUSES; bus++){ pagesRead++; int page = 0; readPage(node, bus, chip, blk, page, waitIdleReadBuffer()); } } } } //} while (true) { if ( getNumReadsInFlight() == 0 ) break; usleep(100); } clock_gettime(CLOCK_REALTIME, & now); timeElapsed = timespec_diff_sec(start, now); fprintf(stderr, "LOG: finished SEQUENTIAL reads! time=%f, numPages=%d, bandwidth=%f MB/s\n", timeElapsed, pagesRead, (pagesRead*8)/timeElapsed/1024 ); sleep(1); pagesRead=0; clock_gettime(CLOCK_REALTIME, & start); for (int repeat = 0; repeat < 100000; repeat++){ int bus = rand()%NUM_BUSES; int chip = rand()%CHIPS_PER_BUS; int blk = rand()%BLOCKS_PER_CHIP; int page = rand()%PAGES_PER_BLOCK; readPage(node, bus, chip, blk, page, waitIdleReadBuffer()); pagesRead++; } while (true) { if ( getNumReadsInFlight() == 0 ) break; usleep(100); } clock_gettime(CLOCK_REALTIME, & now); timeElapsed = timespec_diff_sec(start, now); fprintf(stderr, "LOG: finished RANDOM reads! time=%f, numPages=%d, bandwidth=%f MB/s\n", timeElapsed, pagesRead, (pagesRead*8)/timeElapsed/1024 ); device->debugDumpReq(0); sleep(1); for ( int t = 0; t < NUM_TAGS; t++ ) { for ( int i = 0; i < PAGE_SIZE/sizeof(unsigned int); i++ ) { fprintf(stderr, "%x %x %x\n", t, i, readBuffers[t][i] ); } } if (!verbose) { fprintf(stderr, "LOG: DONE! data check skipped\n"); } else if (testPass==1) { fprintf(stderr, "LOG: TEST PASSED!\n"); } else { fprintf(stderr, "LOG: **ERROR: TEST FAILED!\n"); } } else { fprintf(stderr, "Sleeping infinitely...\n"); while (true) { device->debugDumpReq(0); sleep(1); } sleep(1000000); } }
int main(int argc, const char **argv) { FlashRequestProxy *device = 0; DmaConfigProxy *dmap = 0; FlashIndication *deviceIndication = 0; DmaIndication *dmaIndication = 0; if(sem_init(&done_sem, 1, 0)){ fprintf(stderr, "failed to init done_sem\n"); exit(1); } fprintf(stderr, "%s %s\n", __DATE__, __TIME__); device = new FlashRequestProxy(IfcNames_FlashRequest); dmap = new DmaConfigProxy(IfcNames_DmaConfig); DmaManager *dma = new DmaManager(dmap); deviceIndication = new FlashIndication(IfcNames_FlashIndication); dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication); fprintf(stderr, "Main::allocating memory...\n"); for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) { srcAllocs[i] = portalAlloc(walloc_sz); dstAllocs[i] = portalAlloc(ralloc_sz); srcBuffers[i] = (unsigned int *)portalMmap(srcAllocs[i], walloc_sz); dstBuffers[i] = (unsigned int *)portalMmap(dstAllocs[i], ralloc_sz); } portalExec_start(); for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) { portalDCacheFlushInval(srcAllocs[i], walloc_sz, srcBuffers[i]); portalDCacheFlushInval(dstAllocs[i], ralloc_sz, dstBuffers[i]); ref_srcAllocs[i] = dma->reference(srcAllocs[i]); ref_dstAllocs[i] = dma->reference(dstAllocs[i]); } // Storage system init ///////////////////////////////// curWritesInFlight = 0; curCmdCountBudget = 0; pthread_mutex_init(&freeListMutex, NULL); pthread_cond_init(&freeListCond, NULL); pthread_mutex_init(&flashReqMutex, NULL); pthread_mutex_init(&cmdReqMutex, NULL); pthread_cond_init(&flashReqCond, NULL); pthread_cond_init(&cmdReqCond, NULL); for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) { for ( int j = 0; j < WRITE_BUFFER_WAYS; j++ ) { int idx = i*WRITE_BUFFER_WAYS+j; srcBufferBusy[idx] = false; int offset = j*1024*16; device->addWriteHostBuffer(ref_srcAllocs[i], offset, idx); writeBuffers[idx] = srcBuffers[i] + (offset/sizeof(unsigned int)); } } for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) { for ( int j = 0; j < READ_BUFFER_WAYS; j++ ) { int idx = i*READ_BUFFER_WAYS+j; int offset = j*1024*16; device->addReadHostBuffer(ref_dstAllocs[i], offset, idx); readBuffers[idx] = dstBuffers[i] + (offset/sizeof(unsigned int)); } } for ( int i = 0; i > TAG_COUNT; i++ ) { readTagBusy[i] = false; } pthread_t ftid; pthread_create(&ftid, NULL, return_finished_readbuffer, (void*)device); ///////////////////////////////////////////////////////// fprintf(stderr, "Main::flush and invalidate complete\n"); clock_gettime(CLOCK_REALTIME, & deviceIndication->aurorastart); device->sendTest(LARGE_NUMBER*1024); for ( int j = 0; j < WRITE_BUFFER_COUNT; j++ ) { for ( int i = 0; i < (8192+64)/4; i++ ) { writeBuffers[j][i] = i; } } for ( int j = 0; j < READ_BUFFER_COUNT; j++ ) { for ( int i = 0; i < (8192+64)/4; i++ ) { readBuffers[j][i] = 8192/4-i; } } device->start(0); timespec start, now; printf( "writing pages to flash!\n" ); clock_gettime(CLOCK_REALTIME, & start); for ( int i = 0; i < LARGE_NUMBER/4; i++ ) { for ( int j = 0; j < 4; j++ ) { if ( i % 1024 == 0 ) printf( "writing page %d\n", i ); writePage(device, j,0,0,i,waitIdleWriteBuffer()); } } printf( "waiting for writing pages to flash!\n" ); while ( getNumWritesInFlight() > 0 ) usleep(1000); clock_gettime(CLOCK_REALTIME, & now); printf( "finished writing to page! %f\n", timespec_diff_sec(start, now) ); printf( "wrote pages to flash!\n" ); clock_gettime(CLOCK_REALTIME, & start); for ( int i = 0; i < LARGE_NUMBER/4; i++ ) { for ( int j = 0; j < 4; j++ ) { readPage(device, j,0,0,i); if ( i % 1024 == 0 ) printf( "reading page %d\n", i ); } } printf( "trying reading from page!\n" ); while (true) { /* pthread_mutex_lock(&freeListMutex); bufferId bid = popReadyReadBuffer(); int rrb = bid.bufidx; while (rrb >= 0 ) { setFinishedReadBuffer(rrb); rrb = popReadyReadBuffer().bufidx; } flushFinishedReadBuffers(device); pthread_cond_wait(&freeListCond, &freeListMutex); pthread_mutex_unlock(&freeListMutex); */ usleep(100); if ( getNumReadsInFlight() == 0 ) break; } clock_gettime(CLOCK_REALTIME, & now); printf( "finished reading from page! %f\n", timespec_diff_sec(start, now) ); for ( int i = 0; i < (8192+64)/4; i++ ) { for ( int j = 0; j < READ_BUFFER_COUNT; j++ ) { if ( i > (8192+64)/4 - 2 ) printf( "%d %d %d\n", j, i, readBuffers[j][i] ); } } for ( int i = 0; i < 2048; i++ ) { printf( "%d: %f\n", i, timecheck[i] ); } printf( "Command buget was gone:%d \nTag was busy:%d\n", noCmdBudgetCount, noTagCount ); exit(0); }
int main(int argc, const char **argv) { fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__); MMURequestProxy *hostMMURequest = new MMURequestProxy(IfcNames_AlgoMMURequest); DmaManager *hostDma = new DmaManager(hostMMURequest); MMUIndication *hostMMUIndication = new MMUIndication(hostDma, IfcNames_AlgoMMUIndication); MMURequestProxy *nandsimMMURequest = new MMURequestProxy(IfcNames_NandsimMMU0Request); DmaManager *nandsimDma = new DmaManager(nandsimMMURequest); MMUIndication *nandsimMMUIndication = new MMUIndication(nandsimDma,IfcNames_NandsimMMU0Indication); RegexpRequestProxy *device = new RegexpRequestProxy(IfcNames_AlgoRequest); RegexpIndication *deviceIndication = new RegexpIndication(IfcNames_AlgoIndication); MemServerIndication *hostMemServerIndication = new MemServerIndication(IfcNames_HostMemServerIndication); MemServerIndication *nandsimMemServerIndication = new MemServerIndication(IfcNames_NandsimMemServer0Indication); haystack_dma = hostDma; haystack_mmu = hostMMURequest; regexp = device; portalExec_start(); fprintf(stderr, "Main::allocating memory...\n"); // this is hard-coded into the REParser.java assert(32 == MAX_NUM_STATES); assert(32 == MAX_NUM_CHARS); //////////////////////////////////////////////////////////////////// // fprintf(stderr, "Main::waiting to connect to nandsim_exe\n"); wait_for_connect_nandsim_exe(); fprintf(stderr, "Main::connected to nandsim_exe\n"); // base of haystack in "flash" memory // this is read from nandsim_exe, but could also come from kernel driver int haystack_base = read_from_nandsim_exe(); int haystack_len = read_from_nandsim_exe(); // request the next sglist identifier from the sglistMMU hardware module // which is used by the mem server accessing flash memory. int id = 0; MMURequest_idRequest(nandsimDma->priv.sglDevice, 0); sem_wait(&nandsimDma->priv.sglIdSem); id = nandsimDma->priv.sglId; // pairs of ('offset','size') pointing to space in nandsim memory // this is unsafe. To do it properly, we should get this list from // nandsim_exe or from the kernel driver. This code here might overrun // the backing store allocated by nandsim_exe. RegionRef region[] = {{0, 0x100000}, {0x100000, 0x100000}}; printf("[%s:%d]\n", __FUNCTION__, __LINE__); int ref_haystackInNandMemory = send_reference_to_portal(nandsimDma->priv.sglDevice, sizeof(region)/sizeof(region[0]), region, id); sem_wait(&(nandsimDma->priv.confSem)); fprintf(stderr, "%08x\n", ref_haystackInNandMemory); // //////////////////////////////////////////////////////////////////// if(1){ P charMapP; P stateMapP; P stateTransitionsP; readfile("jregexp.charMap", &charMapP); readfile("jregexp.stateMap", &stateMapP); readfile("jregexp.stateTransitions", &stateTransitionsP); portalDCacheFlushInval(charMapP.alloc, charMapP.length, charMapP.mem); portalDCacheFlushInval(stateMapP.alloc, stateMapP.length, stateMapP.mem); portalDCacheFlushInval(stateTransitionsP.alloc, stateTransitionsP.length, stateTransitionsP.mem); for(int i = 0; i < num_tests; i++){ device->setup(charMapP.ref, charMapP.length); device->setup(stateMapP.ref, stateMapP.length); device->setup(stateTransitionsP.ref, stateTransitionsP.length); // for this test, we are just re-usng the same haystack which // has been written to the nandsim backing store by nandsim_exe if(i==0){ readfile("test.bin", &haystackP[0]); sw_match_cnt = num_tests*sw_ref(&haystackP[0], &charMapP, &stateMapP, &stateTransitionsP); } sem_wait(&test_sem); int token = deviceIndication->token; assert(token < max_num_tokens); token_map[token] = i; fprintf(stderr, "Main::about to invoke search %08x %08x\n", ref_haystackInNandMemory, haystack_len); // Regexp uses a data-bus width of 8 bytes. length must be a multiple of this dimension device->search(token, ref_haystackInNandMemory, haystack_len & ~((1<<3)-1)); } sem_wait(&test_sem); close(charMapP.alloc); close(stateMapP.alloc); close(stateTransitionsP.alloc); } portalExec_stop(); fprintf(stderr, "hw_match_cnt=%d, sw_match_cnt=%d\n", hw_match_cnt, sw_match_cnt); return (hw_match_cnt == sw_match_cnt ? 0 : -1); }
int main(int argc, const char **argv) { fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__); MMURequestProxy *hostMMURequest = new MMURequestProxy(IfcNames_AlgoMMURequest); DmaManager *hostDma = new DmaManager(hostMMURequest); MMUIndication *hostMMUIndication = new MMUIndication(hostDma, IfcNames_AlgoMMUIndication); MMURequestProxy *nandsimMMURequest = new MMURequestProxy(IfcNames_NandMMURequest); DmaManager *nandsimDma = new DmaManager(nandsimMMURequest); MMUIndication *nandsimMMUIndication = new MMUIndication(nandsimDma,IfcNames_NandMMUIndication); StrstrRequestProxy *strstrRequest = new StrstrRequestProxy(IfcNames_AlgoRequest); StrstrIndication *strstrIndication = new StrstrIndication(IfcNames_AlgoIndication); MemServerIndication *hostMemServerIndication = new MemServerIndication(IfcNames_HostMemServerIndication); //MemServerIndication *nandsimMemServerIndication = new MemServerIndication(IfcNames_NandMemServerIndication); portalExec_start(); fprintf(stderr, "Main::allocating memory...\n"); // allocate memory for strstr data int needleAlloc = portalAlloc(numBytes); int mpNextAlloc = portalAlloc(numBytes); int ref_needleAlloc = hostDma->reference(needleAlloc); int ref_mpNextAlloc = hostDma->reference(mpNextAlloc); fprintf(stderr, "%08x %08x\n", ref_needleAlloc, ref_mpNextAlloc); char *needle = (char *)portalMmap(needleAlloc, numBytes); int *mpNext = (int *)portalMmap(mpNextAlloc, numBytes); //const char *needle_text = "ababab"; // int* target = (int*) malloc(sizeof(int)); // *target = 0x11ff; //fprintf(stderr, "Searching for int target=%x\n", *target); // char *needle_text = (char*) target; //int needle_len = sizeof(int); /* const char *needle_text = "abab"; int needle_len = strlen(needle_text); strncpy(needle, needle_text, needle_len); */ int needle_text = 0x02; //int needle_text = 0x0000001f; //int needle_text = 0x62616261; int* test = &needle_text; //int* test = (int *) needle_text; fprintf(stderr, "searching %x\n", *test); //int needle_len = strlen(needle_text); //strncpy(needle, needle_text, needle_len); int needle_len = sizeof(int); memcpy(needle, test, sizeof(int)); compute_MP_next(needle, mpNext, needle_len); // fprintf(stderr, "mpNext=["); // for(int i= 0; i <= needle_len; i++) // fprintf(stderr, "%d ", mpNext[i]); // fprintf(stderr, "]\nneedle=["); // for(int i= 0; i < needle_len; i++) // fprintf(stderr, "%d ", needle[i]); // fprintf(stderr, "]\n"); portalDCacheFlushInval(needleAlloc, numBytes, needle); portalDCacheFlushInval(mpNextAlloc, numBytes, mpNext); fprintf(stderr, "Main::flush and invalidate complete\n"); // fprintf(stderr, "Main::waiting to connect to nandsim_exe\n"); // wait_for_connect_nandsim_exe(); // fprintf(stderr, "Main::connected to nandsim_exe\n"); // base of haystack in "flash" memory // this is read from nandsim_exe, but could also come from kernel driver //int haystack_base = read_from_nandsim_exe(); //int haystack_len = read_from_nandsim_exe(); int haystack_len = 1<<31; // request the next sglist identifier from the sglistMMU hardware module // which is used by the mem server accessing flash memory. int id = 0; MMURequest_idRequest(nandsimDma->priv.sglDevice, 0); sem_wait(&nandsimDma->priv.sglIdSem); id = nandsimDma->priv.sglId; // pairs of ('offset','size') pointing to space in nandsim memory // this is unsafe. To do it properly, we should get this list from // nandsim_exe or from the kernel driver. This code here might overrun // the backing store allocated by nandsim_exe. // RegionRef region[] = {{0, 0x100000}, {0x100000, 0x100000}}; RegionRef region[] = {{0x100000, 0x100000}}; printf("[%s:%d]\n", __FUNCTION__, __LINE__); int ref_haystackInNandMemory = send_reference_to_portal(nandsimDma->priv.sglDevice, sizeof(region)/sizeof(region[0]), region, id); sem_wait(&(nandsimDma->priv.confSem)); fprintf(stderr, "%08x\n", ref_haystackInNandMemory); // at this point, ref_needleAlloc and ref_mpNextAlloc are valid sgListIds for use by // the host memory dma hardware, and ref_haystackInNandMemory is a valid sgListId for // use by the nandsim dma hardware fprintf(stderr, "about to setup device %d %d\n", ref_needleAlloc, ref_mpNextAlloc); strstrRequest->setup(ref_needleAlloc, ref_mpNextAlloc, needle_len); fprintf(stderr, "about to invoke search %d\n", ref_haystackInNandMemory); timespec start, now; clock_gettime(CLOCK_REALTIME, & start); strstrRequest->search(ref_haystackInNandMemory, haystack_len); strstrIndication->wait(); clock_gettime(CLOCK_REALTIME, & now); fprintf(stderr, "LOG: finished search! %f\n", timespec_diff_sec(start, now) ); //exit(!(strstrIndication->match_cnt==3)); fprintf(stderr, "Number of results found = %d\n", strstrIndication->match_cnt); return 0; }