void AIController::shoot() {
if (fabs(preemption().getX()) < SHOOTING_EPS - fabs(shipCoord().getZ()) * SHOOTING_MULT &&
fabs(preemption().getY()) < SHOOTING_EPS - fabs(shipCoord().getZ()) * SHOOTING_MULT &&
// fabs(preemption().getX()) < SHOOTING_EPS && fabs(preemption().getY()) < SHOOTING_EPS &&
shipCoord().getZ() >= 0) {
// std::cout << "FIRE ";
fire();
}
}
void
trap(Ureg *ureg)
{
int rem, itype, t;
if(up != nil)
rem = ((char*)ureg)-up->kstack;
else rem = ((char*)ureg)-(char*)m->stack;
if(ureg->type != PsrMfiq && rem < 256) {
dumpregs(ureg);
panic("trap %d stack bytes remaining (%s), "
"up=#%8.8lux ureg=#%8.8lux pc=#%8.8ux"
,rem, up?up->text:"", up, ureg, ureg->pc);
for(;;);
}
itype = ureg->type;
/* All interrupts/exceptions should be resumed at ureg->pc-4,
except for Data Abort which resumes at ureg->pc-8. */
if(itype == PsrMabt+1)
ureg->pc -= 8;
else ureg->pc -= 4;
if(up){
up->pc = ureg->pc;
up->dbgreg = ureg;
}
switch(itype) {
case PsrMirq:
t = m->ticks; /* CPU time per proc */
up = nil; /* no process at interrupt level */
irq(ureg);
up = m->proc;
preemption(m->ticks - t);
m->intr++;
break;
case PsrMund:
if(*(ulong*)ureg->pc == BREAK && breakhandler) {
int s;
Proc *p;
p = up;
s = breakhandler(ureg, p);
if(s == BrkSched) {
p->preempted = 0;
sched();
} else if(s == BrkNoSched) {
/* stop it being preempted until next instruction */
p->preempted = 1;
if(up)
up->dbgreg = 0;
return;
}
break;
}
if(up == nil) goto faultpanic;
spllo();
if(waserror()) {
if(waslo(ureg->psr) && up->type == Interp)
disfault(ureg, up->env->errstr);
setpanic();
dumpregs(ureg);
panic("%s", up->env->errstr);
}
if(!fpiarm(ureg)) {
dumpregs(ureg);
sys_trap_error(ureg->type);
}
poperror();
break;
case PsrMsvc: /* Jump through 0 or SWI */
if(waslo(ureg->psr) && up && up->type == Interp) {
spllo();
dumpregs(ureg);
sys_trap_error(ureg->type);
}
setpanic();
dumpregs(ureg);
panic("SVC/SWI exception");
break;
case PsrMabt: /* Prefetch abort */
if(catchdbg && catchdbg(ureg, 0))
break;
/* FALL THROUGH */
case PsrMabt+1: /* Data abort */
if(waslo(ureg->psr) && up && up->type == Interp) {
spllo();
faultarm(ureg);
}
print("Data Abort\n");
/* FALL THROUGH */
default:
faultpanic:
setpanic();
dumpregs(ureg);
panic("exception %uX %s\n", ureg->type, trapname(ureg->type));
break;
}
splhi();
if(up)
up->dbgreg = 0; /* becomes invalid after return from trap */
}