static void __init
lopec_setup_arch(void)
{
TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
ioremap(0xffe80000, 0x8000), 8);
loops_per_jiffy = 100000000/HZ;
lopec_find_bridges();
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#elif defined(CONFIG_ROOT_NFS)
ROOT_DEV = Root_NFS;
#elif defined(CONFIG_BLK_DEV_IDEDISK)
ROOT_DEV = Root_HDA1;
#else
ROOT_DEV = Root_SDA1;
#endif
#ifdef CONFIG_PPCBUG_NVRAM
/* Read in NVRAM data */
init_prep_nvram();
/* if no bootargs, look in NVRAM */
if ( cmd_line[0] == '\0' ) {
char *bootargs;
bootargs = prep_nvram_get_var("bootargs");
if (bootargs != NULL) {
strcpy(cmd_line, bootargs);
/* again.. */
strcpy(saved_command_line, cmd_line);
}
}
#endif
}
static void __init
pplus_setup_arch(void)
{
unsigned char reg;
if ( ppc_md.progress )
ppc_md.progress("pplus_setup_arch: enter\n", 0);
/* init to some ~sane value until calibrate_delay() runs */
loops_per_jiffy = 50000000;
if ( ppc_md.progress )
ppc_md.progress("pplus_setup_arch: find_bridges\n", 0);
/* Setup PCI host bridge */
pplus_setup_hose();
/* Set up floppy in PS/2 mode */
outb(0x09, SIO_CONFIG_RA);
reg = inb(SIO_CONFIG_RD);
reg = (reg & 0x3F) | 0x40;
outb(reg, SIO_CONFIG_RD);
outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
/* Enable L2. Assume we don't need to flush -- Cort*/
*(unsigned char *)(0x8000081c) |= 3;
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_SDA2;
#endif
printk(KERN_INFO "Motorola PowerPlus Platform\n");
printk(KERN_INFO "Port by MontaVista Software, Inc. ([email protected])\n");
if ( ppc_md.progress )
ppc_md.progress("pplus_setup_arch: raven_init\n", 0);
raven_init();
#ifdef CONFIG_VGA_CONSOLE
/* remap the VGA memory */
vgacon_remap_base = 0xf0000000;
conswitchp = &vga_con;
#elif defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
#endif
#ifdef CONFIG_PPCBUG_NVRAM
/* Read in NVRAM data */
init_prep_nvram();
/* if no bootargs, look in NVRAM */
if ( cmd_line[0] == '\0' ) {
char *bootargs;
bootargs = prep_nvram_get_var("bootargs");
if (bootargs != NULL) {
strcpy(cmd_line, bootargs);
/* again.. */
strcpy(saved_command_line, cmd_line);
}
}
#endif
if ( ppc_md.progress )
ppc_md.progress("pplus_setup_arch: exit\n", 0);
}
static void __init pplus_setup_arch(void)
{
struct pci_controller *hose;
if (ppc_md.progress)
ppc_md.progress("pplus_setup_arch: enter", 0);
/* init to some ~sane value until calibrate_delay() runs */
loops_per_jiffy = 50000000;
if (ppc_md.progress)
ppc_md.progress("pplus_setup_arch: find_bridges", 0);
/* Setup PCI host bridge */
pplus_find_bridges();
hose = pci_bus_to_hose(0);
isa_io_base = (ulong) hose->io_base_virt;
if (ppc_md.progress)
ppc_md.progress("pplus_setup_arch: set_board_type", 0);
pplus_set_board_type();
/* Enable L2. Assume we don't need to flush -- Cort */
*(unsigned char *)(PPLUS_L2_CONTROL_REG) |= 3;
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
else
#endif
#ifdef CONFIG_ROOT_NFS
ROOT_DEV = Root_NFS;
#else
ROOT_DEV = Root_SDA2;
#endif
printk(KERN_INFO "Motorola PowerPlus Platform\n");
printk(KERN_INFO
"Port by MontaVista Software, Inc. ([email protected])\n");
#ifdef CONFIG_VGA_CONSOLE
/* remap the VGA memory */
vgacon_remap_base = (unsigned long)ioremap(PPLUS_ISA_MEM_BASE,
0x08000000);
conswitchp = &vga_con;
#endif
#ifdef CONFIG_PPCBUG_NVRAM
/* Read in NVRAM data */
init_prep_nvram();
/* if no bootargs, look in NVRAM */
if (cmd_line[0] == '\0') {
char *bootargs;
bootargs = prep_nvram_get_var("bootargs");
if (bootargs != NULL) {
strcpy(cmd_line, bootargs);
/* again.. */
strcpy(saved_command_line, cmd_line);
}
}
#endif
if (ppc_md.progress)
ppc_md.progress("pplus_setup_arch: exit", 0);
}
