void arm_tf_run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr) { struct prog bl31 = PROG_INIT(PROG_BL31, CONFIG_CBFS_PREFIX"/bl31"); void (*bl31_entry)(bl31_params_t *params, void *plat_params) = NULL; if (prog_locate(&bl31)) die("BL31 not found"); bl31_entry = selfload(&bl31, false); if (!bl31_entry) die("BL31 load failed"); SET_PARAM_HEAD(&bl31_params, PARAM_BL31, VERSION_1, 0); if (IS_ENABLED(CONFIG_ARM64_USE_SECURE_OS)) { struct prog bl32 = PROG_INIT(PROG_BL32, CONFIG_CBFS_PREFIX"/secure_os"); if (prog_locate(&bl32)) die("BL32 not found"); if (cbfs_prog_stage_load(&bl32)) die("BL32 load failed"); SET_PARAM_HEAD(&bl32_ep_info, PARAM_EP, VERSION_1, PARAM_EP_SECURE); bl32_ep_info.pc = (uintptr_t)prog_entry(&bl32); bl32_ep_info.spsr = SPSR_EXCEPTION_MASK | get_eret_el(EL1, SPSR_USE_L); bl31_params.bl32_ep_info = &bl32_ep_info; } bl31_params.bl33_ep_info = &bl33_ep_info; SET_PARAM_HEAD(&bl33_ep_info, PARAM_EP, VERSION_1, PARAM_EP_NON_SECURE); bl33_ep_info.pc = payload_entry; bl33_ep_info.spsr = payload_spsr; bl33_ep_info.args.arg0 = payload_arg0; /* May update bl31_params if necessary. Must flush all added structs. */ void *bl31_plat_params = soc_get_bl31_plat_params(&bl31_params); dcache_clean_by_mva(&bl31_params, sizeof(bl31_params)); dcache_clean_by_mva(&bl33_ep_info, sizeof(bl33_ep_info)); raw_write_daif(SPSR_EXCEPTION_MASK); mmu_disable(); bl31_entry(&bl31_params, bl31_plat_params); die("BL31 returned!"); }
void run_ramstage(void) { struct prog ramstage = PROG_INIT(ASSET_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage"); /* Only x86 systems currently take the same firmware path on resume. */ if (IS_ENABLED(CONFIG_ARCH_X86) && IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) run_ramstage_from_resume(romstage_handoff_find_or_add(), &ramstage); if (prog_locate(&ramstage)) goto fail; timestamp_add_now(TS_START_COPYRAM); if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) { if (load_relocatable_ramstage(&ramstage)) goto fail; } else if (cbfs_prog_stage_load(&ramstage)) goto fail; stage_cache_add(STAGE_RAMSTAGE, &ramstage); timestamp_add_now(TS_END_COPYRAM); prog_run(&ramstage); fail: die("Ramstage was not loaded!\n"); }
static pei_wrapper_entry_t load_reference_code(void) { struct prog prog = PROG_INIT(ASSET_REFCODE, CONFIG_CBFS_PREFIX "/refcode"); struct rmod_stage_load refcode = { .cbmem_id = CBMEM_ID_REFCODE, .prog = &prog, }; if (acpi_is_wakeup_s3()) { return load_refcode_from_cache(); } if (prog_locate(&prog)) { printk(BIOS_DEBUG, "Couldn't locate reference code.\n"); return NULL; } if (rmodule_stage_load(&refcode)) { printk(BIOS_DEBUG, "Error loading reference code.\n"); return NULL; } /* Cache loaded reference code. */ stage_cache_add(STAGE_REFCODE, &prog); return (pei_wrapper_entry_t)prog_entry(&prog); }
void payload_load(void) { struct prog *payload = &global_payload; timestamp_add_now(TS_LOAD_PAYLOAD); if (prog_locate(payload)) goto out; mirror_payload(payload); /* Pass cbtables to payload if architecture desires it. */ prog_set_entry(payload, selfload(payload), cbmem_find(CBMEM_ID_CBTABLE)); out: if (prog_entry(payload) == NULL) die("Payload not loaded.\n"); }
void run_romstage(void) { struct prog romstage = PROG_INIT(ASSET_ROMSTAGE, CONFIG_CBFS_PREFIX "/romstage"); if (prog_locate(&romstage)) goto fail; timestamp_add_now(TS_START_COPYROM); if (cbfs_prog_stage_load(&romstage)) goto fail; timestamp_add_now(TS_END_COPYROM); prog_run(&romstage); fail: if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) die("Couldn't load romstage.\n"); halt(); }
/* Entry point taken when romstage is called after a separate verstage. */ asmlinkage void *romstage_after_verstage(void) { /* Need to locate the current FSP_INFO_HEADER. The cache-as-ram * is still enabled. We can directly access work buffer here. */ FSP_INFO_HEADER *fih; struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin"); console_init(); if (prog_locate(&fsp)) { fih = NULL; printk(BIOS_ERR, "Unable to locate %s\n", prog_name(&fsp)); } else /* This leaks a mapping which this code assumes is benign as * the flash is memory mapped CPU's address space. */ fih = find_fsp((uintptr_t)rdev_mmap_full(prog_rdev(&fsp))); set_fih_car(fih); /* Return new stack value in ram back to assembly stub. */ return cache_as_ram_stage_main(fih); }