struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
if (sscreen == NULL) {
return NULL;
}
/* Set functions first. */
sscreen->b.b.context_create = si_create_context;
sscreen->b.b.destroy = si_destroy_screen;
sscreen->b.b.get_param = si_get_param;
sscreen->b.b.get_shader_param = si_get_shader_param;
sscreen->b.b.is_format_supported = si_is_format_supported;
sscreen->b.b.resource_create = r600_resource_create_common;
if (!r600_common_screen_init(&sscreen->b, ws) ||
!si_initialize_pipe_config(sscreen)) {
FREE(sscreen);
return NULL;
}
sscreen->b.has_cp_dma = true;
sscreen->b.has_streamout = true;
if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE))
sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
/* Create the auxiliary context. This must be done last. */
sscreen->b.aux_context = sscreen->b.b.context_create(&sscreen->b.b, NULL);
return &sscreen->b.b;
}
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
struct r600_screen *rscreen = CALLOC_STRUCT(r600_screen);
if (rscreen == NULL) {
return NULL;
}
ws->query_info(ws, &rscreen->b.info);
/* Set functions first. */
rscreen->b.b.context_create = r600_create_context;
rscreen->b.b.destroy = r600_destroy_screen;
rscreen->b.b.get_name = r600_get_name;
rscreen->b.b.get_vendor = r600_get_vendor;
rscreen->b.b.get_param = r600_get_param;
rscreen->b.b.get_shader_param = r600_get_shader_param;
rscreen->b.b.get_paramf = r600_get_paramf;
rscreen->b.b.get_compute_param = r600_get_compute_param;
rscreen->b.b.get_timestamp = r600_get_timestamp;
rscreen->b.b.is_format_supported = si_is_format_supported;
if (rscreen->b.info.has_uvd) {
rscreen->b.b.get_video_param = ruvd_get_video_param;
rscreen->b.b.is_video_format_supported = ruvd_is_format_supported;
} else {
rscreen->b.b.get_video_param = r600_get_video_param;
rscreen->b.b.is_video_format_supported = vl_video_buffer_is_format_supported;
}
r600_init_screen_resource_functions(&rscreen->b.b);
if (!r600_common_screen_init(&rscreen->b, ws)) {
FREE(rscreen);
return NULL;
}
if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE))
rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
#if R600_TRACE_CS
rscreen->cs_count = 0;
if (rscreen->info.drm_minor >= 28) {
rscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&rscreen->screen,
PIPE_BIND_CUSTOM,
PIPE_USAGE_STAGING,
4096);
if (rscreen->trace_bo) {
rscreen->trace_ptr = rscreen->ws->buffer_map(rscreen->trace_bo->cs_buf, NULL,
PIPE_TRANSFER_UNSYNCHRONIZED);
}
}
#endif
/* Create the auxiliary context. This must be done last. */
rscreen->b.aux_context = rscreen->b.b.context_create(&rscreen->b.b, NULL);
return &rscreen->b.b;
}
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
if (!sscreen) {
return NULL;
}
/* Set functions first. */
sscreen->b.b.context_create = si_create_context;
sscreen->b.b.destroy = si_destroy_screen;
sscreen->b.b.get_param = si_get_param;
sscreen->b.b.get_shader_param = si_get_shader_param;
sscreen->b.b.is_format_supported = si_is_format_supported;
sscreen->b.b.resource_create = r600_resource_create_common;
si_init_screen_state_functions(sscreen);
if (!r600_common_screen_init(&sscreen->b, ws) ||
!si_init_gs_info(sscreen) ||
!si_init_shader_cache(sscreen)) {
FREE(sscreen);
return NULL;
}
if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", FALSE))
si_init_perfcounters(sscreen);
sscreen->b.has_cp_dma = true;
sscreen->b.has_streamout = true;
pipe_mutex_init(sscreen->shader_parts_mutex);
sscreen->use_monolithic_shaders =
HAVE_LLVM < 0x0308 ||
(sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0;
if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE))
sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
/* Create the auxiliary context. This must be done last. */
sscreen->b.aux_context = sscreen->b.b.context_create(&sscreen->b.b, NULL, 0);
if (sscreen->b.debug_flags & DBG_TEST_DMA)
r600_test_dma(&sscreen->b);
return &sscreen->b.b;
}
struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
{
struct r600_screen *rscreen = CALLOC_STRUCT(r600_screen);
if (rscreen == NULL) {
return NULL;
}
/* Set functions first. */
rscreen->b.b.context_create = r600_create_context;
rscreen->b.b.destroy = r600_destroy_screen;
rscreen->b.b.get_param = r600_get_param;
rscreen->b.b.get_shader_param = r600_get_shader_param;
rscreen->b.b.resource_create = r600_resource_create;
if (!r600_common_screen_init(&rscreen->b, ws)) {
FREE(rscreen);
return NULL;
}
if (rscreen->b.info.chip_class >= EVERGREEN) {
rscreen->b.b.is_format_supported = evergreen_is_format_supported;
} else {
rscreen->b.b.is_format_supported = r600_is_format_supported;
}
rscreen->b.debug_flags |= debug_get_flags_option("R600_DEBUG", r600_debug_options, 0);
if (debug_get_bool_option("R600_DEBUG_COMPUTE", FALSE))
rscreen->b.debug_flags |= DBG_COMPUTE;
if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE))
rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
if (debug_get_bool_option("R600_HYPERZ", FALSE))
rscreen->b.debug_flags |= DBG_HYPERZ;
if (debug_get_bool_option("R600_LLVM", FALSE))
rscreen->b.debug_flags |= DBG_LLVM;
if (rscreen->b.family == CHIP_UNKNOWN) {
fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->b.info.pci_id);
FREE(rscreen);
return NULL;
}
/* Figure out streamout kernel support. */
switch (rscreen->b.chip_class) {
case R600:
if (rscreen->b.family < CHIP_RS780) {
rscreen->b.has_streamout = rscreen->b.info.drm_minor >= 14;
} else {
rscreen->b.has_streamout = rscreen->b.info.drm_minor >= 23;
}
break;
case R700:
rscreen->b.has_streamout = rscreen->b.info.drm_minor >= 17;
break;
case EVERGREEN:
case CAYMAN:
rscreen->b.has_streamout = rscreen->b.info.drm_minor >= 14;
break;
default:
rscreen->b.has_streamout = FALSE;
break;
}
/* MSAA support. */
switch (rscreen->b.chip_class) {
case R600:
case R700:
rscreen->has_msaa = rscreen->b.info.drm_minor >= 22;
rscreen->has_compressed_msaa_texturing = false;
break;
case EVERGREEN:
rscreen->has_msaa = rscreen->b.info.drm_minor >= 19;
rscreen->has_compressed_msaa_texturing = rscreen->b.info.drm_minor >= 24;
break;
case CAYMAN:
rscreen->has_msaa = rscreen->b.info.drm_minor >= 19;
rscreen->has_compressed_msaa_texturing = true;
break;
default:
rscreen->has_msaa = FALSE;
rscreen->has_compressed_msaa_texturing = false;
}
rscreen->b.has_cp_dma = rscreen->b.info.drm_minor >= 27 &&
!(rscreen->b.debug_flags & DBG_NO_CP_DMA);
rscreen->global_pool = compute_memory_pool_new(rscreen);
/* Create the auxiliary context. This must be done last. */
rscreen->b.aux_context = rscreen->b.b.context_create(&rscreen->b.b, NULL);
#if 0 /* This is for testing whether aux_context and buffer clearing work correctly. */
struct pipe_resource templ = {};
templ.width0 = 4;
templ.height0 = 2048;
templ.depth0 = 1;
templ.array_size = 1;
templ.target = PIPE_TEXTURE_2D;
templ.format = PIPE_FORMAT_R8G8B8A8_UNORM;
templ.usage = PIPE_USAGE_DEFAULT;
struct r600_resource *res = r600_resource(rscreen->screen.resource_create(&rscreen->screen, &templ));
unsigned char *map = ws->buffer_map(res->cs_buf, NULL, PIPE_TRANSFER_WRITE);
memset(map, 0, 256);
r600_screen_clear_buffer(rscreen, &res->b.b, 4, 4, 0xCC);
r600_screen_clear_buffer(rscreen, &res->b.b, 8, 4, 0xDD);
r600_screen_clear_buffer(rscreen, &res->b.b, 12, 4, 0xEE);
r600_screen_clear_buffer(rscreen, &res->b.b, 20, 4, 0xFF);
r600_screen_clear_buffer(rscreen, &res->b.b, 32, 20, 0x87);
ws->buffer_wait(res->buf, RADEON_USAGE_WRITE);
int i;
for (i = 0; i < 256; i++) {
printf("%02X", map[i]);
if (i % 16 == 15)
printf("\n");
}
#endif
return &rscreen->b.b;
}
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
unsigned num_cpus, num_compiler_threads, i;
if (!sscreen) {
return NULL;
}
/* Set functions first. */
sscreen->b.b.context_create = si_create_context;
sscreen->b.b.destroy = si_destroy_screen;
sscreen->b.b.get_param = si_get_param;
sscreen->b.b.get_shader_param = si_get_shader_param;
sscreen->b.b.resource_create = r600_resource_create_common;
si_init_screen_state_functions(sscreen);
if (!r600_common_screen_init(&sscreen->b, ws) ||
!si_init_gs_info(sscreen) ||
!si_init_shader_cache(sscreen)) {
FREE(sscreen);
return NULL;
}
if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", false))
si_init_perfcounters(sscreen);
/* Hawaii has a bug with offchip buffers > 256 that can be worked
* around by setting 4K granularity.
*/
sscreen->tess_offchip_block_dw_size =
sscreen->b.family == CHIP_HAWAII ? 4096 : 8192;
sscreen->has_distributed_tess =
sscreen->b.chip_class >= VI &&
sscreen->b.info.max_se >= 2;
sscreen->b.has_cp_dma = true;
sscreen->b.has_streamout = true;
pipe_mutex_init(sscreen->shader_parts_mutex);
sscreen->use_monolithic_shaders =
HAVE_LLVM < 0x0308 ||
(sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0;
if (debug_get_bool_option("RADEON_DUMP_SHADERS", false))
sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
/* Only enable as many threads as we have target machines and CPUs. */
num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
num_compiler_threads = MIN2(num_cpus, ARRAY_SIZE(sscreen->tm));
for (i = 0; i < num_compiler_threads; i++)
sscreen->tm[i] = si_create_llvm_target_machine(sscreen);
util_queue_init(&sscreen->shader_compiler_queue, "si_shader",
32, num_compiler_threads);
/* Create the auxiliary context. This must be done last. */
sscreen->b.aux_context = sscreen->b.b.context_create(&sscreen->b.b, NULL, 0);
if (sscreen->b.debug_flags & DBG_TEST_DMA)
r600_test_dma(&sscreen->b);
return &sscreen->b.b;
}
