void __init r8a7778_init_irq_extpin(int irlm) { r8a7778_init_irq_extpin_dt(irlm); if (irlm) platform_device_register_resndata( &platform_bus, "renesas_intc_irqpin", -1, irqpin_resources, ARRAY_SIZE(irqpin_resources), &irqpin_platform_data, sizeof(irqpin_platform_data)); }
static void __init bockw_init(void) { void __iomem *fpga; void __iomem *pfc; #ifndef CONFIG_COMMON_CLK r8a7778_clock_init(); #endif r8a7778_init_irq_extpin_dt(1); r8a7778_add_dt_devices(); fpga = ioremap_nocache(FPGA, SZ_1M); if (fpga) { /* * CAUTION * * IRQ0/1 is cascaded interrupt from FPGA. * it should be cared in the future * Now, it is assuming IRQ0 was used only from SMSC. */ u16 val = ioread16(fpga + IRQ0MR); val &= ~(1 << 4); /* enable SMSC911x */ iowrite16(val, fpga + IRQ0MR); iounmap(fpga); } pfc = ioremap_nocache(PFC, 0x200); if (pfc) { /* * FIXME * * SDHI CD/WP pin needs pull-up */ iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4); iounmap(pfc); } of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); }