static void pwm_timer_init(unsigned timer) { /* enable the timer clock before we try to talk to it */ modifyreg32(pwm_timers[timer].clock_register, 0, pwm_timers[timer].clock_bit); /* disable and configure the timer */ rCR1(timer) = 0; rCR2(timer) = 0; rSMCR(timer) = 0; rDIER(timer) = 0; rCCER(timer) = 0; rCCMR1(timer) = 0; rCCMR2(timer) = 0; rCCER(timer) = 0; rDCR(timer) = 0; if ((pwm_timers[timer].base == STM32_TIM1_BASE) || (pwm_timers[timer].base == STM32_TIM8_BASE)) { /* master output enable = on */ rBDTR(timer) = ATIM_BDTR_MOE; } /* configure the timer to free-run at 1MHz */ rPSC(timer) = (pwm_timers[timer].clock_freq / 1000000) - 1; /* default to updating at 50Hz */ pwm_timer_set_rate(timer, 50); /* note that the timer is left disabled - arming is performed separately */ }
static void led_pwm_timer_init_timer(unsigned timer) { irqstate_t flags = px4_enter_critical_section(); /* enable the timer clock before we try to talk to it */ modifyreg32(led_pwm_timers[timer].clock_register, 0, led_pwm_timers[timer].clock_bit); /* disable and configure the timer */ rCR1(timer) = 0; rCR2(timer) = 0; rSMCR(timer) = 0; rDIER(timer) = 0; rCCER(timer) = 0; rCCMR1(timer) = 0; rCCMR2(timer) = 0; rCCR1(timer) = 0; rCCR2(timer) = 0; rCCR3(timer) = 0; rCCR4(timer) = 0; rCCER(timer) = 0; rDCR(timer) = 0; if ((led_pwm_timers[timer].base == STM32_TIM1_BASE) || (led_pwm_timers[timer].base == STM32_TIM8_BASE)) { /* master output enable = on */ rBDTR(timer) = ATIM_BDTR_MOE; } /* If the timer clock source provided as clock_freq is the STM32_APBx_TIMx_CLKIN * then configure the timer to free-run at 1MHz. * Otherwise, other frequencies are attainable by adjusting .clock_freq accordingly. */ rPSC(timer) = (led_pwm_timers[timer].clock_freq / 1000000) - 1; /* configure the timer to update at the desired rate */ rARR(timer) = (1000000 / LED_PWM_RATE) - 1; /* generate an update event; reloads the counter and all registers */ rEGR(timer) = GTIM_EGR_UG; px4_leave_critical_section(flags); }