static GLboolean radeon_run_render( struct gl_context *ctx, struct tnl_pipeline_stage *stage ) { r100ContextPtr rmesa = R100_CONTEXT(ctx); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; tnl_render_func *tab = TAG(render_tab_verts); GLuint i; if (rmesa->radeon.swtcl.RenderIndex != 0 || !radeon_dma_validate_render( ctx, VB )) return GL_TRUE; radeon_prepare_render(&rmesa->radeon); if (rmesa->radeon.NewGLState) radeonValidateState( ctx ); tnl->Driver.Render.Start( ctx ); for (i = 0 ; i < VB->PrimitiveCount ; i++) { GLuint prim = VB->Primitive[i].mode; GLuint start = VB->Primitive[i].start; GLuint length = VB->Primitive[i].count; if (!length) continue; radeon_print(RADEON_SWRENDER, RADEON_NORMAL, "radeon_render.c: prim %s %d..%d\n", _mesa_enum_to_string(prim & PRIM_MODE_MASK), start, start+length); if (length) tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim ); } tnl->Driver.Render.Finish( ctx ); return GL_FALSE; /* finished the pipe */ }
static GLboolean radeon_run_render( GLcontext *ctx, struct tnl_pipeline_stage *stage ) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; tnl_render_func *tab = TAG(render_tab_verts); GLuint i; if (rmesa->swtcl.indexed_verts.buf) RELEASE_ELT_VERTS(); if (rmesa->swtcl.RenderIndex != 0 || !radeon_dma_validate_render( ctx, VB )) return GL_TRUE; tnl->Driver.Render.Start( ctx ); for (i = 0 ; i < VB->PrimitiveCount ; i++) { GLuint prim = VB->Primitive[i].mode; GLuint start = VB->Primitive[i].start; GLuint length = VB->Primitive[i].count; if (!length) continue; if (RADEON_DEBUG & DEBUG_PRIMS) fprintf(stderr, "radeon_render.c: prim %s %d..%d\n", _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), start, start+length); if (length) tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim ); } tnl->Driver.Render.Finish( ctx ); return GL_FALSE; /* finished the pipe */ }