void USB_OTG_BSP_DeInit(USB_OTG_CORE_HANDLE *pdev)
{
// ala42
#define GPIO_AF0 ((uint8_t)0) /* OTG_FS Alternate Function mapping */
gpio_set_mode(GPIOA,11, GPIO_MODE_INPUT);
gpio_set_mode(GPIOA,12, GPIO_MODE_INPUT);
gpio_set_af_mode(GPIOA,11,GPIO_AF0) ; // OTG_FS_DM
gpio_set_af_mode(GPIOA,12,GPIO_AF0) ; // OTG_FS_DP
#ifdef USB_OTG_FS_SOF_OUTPUT_ENABLED
gpio_set_mode(GPIOA, 8,GPIO_MODE_INPUT);
gpio_set_af_mode(GPIOA, 8,GPIO_AF0) ; // OTG_FS_SOF
#endif
#ifdef VBUS_SENSING_ENABLED
gpio_set_mode(GPIOA, 9,GPIO_MODE_INPUT);
gpio_set_af_mode(GPIOA, 9,GPIO_AF0) ; // OTG_FS_VBUS
#endif
#ifdef ID_SENSING_ENABLED
gpio_set_mode(GPIOA,10,GPIO_MODE_INPUT);
gpio_set_af_mode(GPIOA,10,GPIO_AF0) ; // OTG_FS_ID
#endif
rcc_clk_enable(RCC_SYSCFG);
rcc_clk_disable(RCC_USBFS);
}
void
usart_init(usart_num num)
{
if(!usart_available(num))
return;
usart_driver *driver = &usart_drivers[num];
const usart_dev *dev = usart_get_dev(num);
rcc_clk_enable(dev->clk_id);
nvic_irq_enable(dev->irq);
/* initial driver */
driver->p_dev = dev;
/* enable receive and transmit mode */
usart_t *usart = (usart_t *)dev->reg;
usart->CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_UE | USART_CR1_IDLEIE;
/* Parity: none, stop bit: 0, flow control: none */
usart->CR2 = 0;
/* Enable TX/RX DMA */
usart->CR3 = 0;
(void)usart->SR;
(void)usart->DR;
/* Initial DMA */
usart_dma_init(num);
usart_set_used(num);
}
void TIM2_init() {
uint32_t SystemCoreClock = 72000000;
uint16_t prescalerValue = (uint16_t) (SystemCoreClock / 24000000) - 1;
rcc_clk_enable(RCC_TIMER2);
/* Time base configuration */
timer_pause(TIMER2);
timer_set_prescaler(TIMER2, prescalerValue);
timer_set_reload(TIMER2, 29); // 800kHz
/* Timing Mode configuration: Channel 1 */
timer_set_mode(TIMER2, 1, TIMER_OUTPUT_COMPARE);
timer_set_compare(TIMER2, 1, 8);
timer_oc_set_mode(TIMER2, 1, TIMER_OC_MODE_FROZEN, ~TIMER_OC_PE);
/* Timing Mode configuration: Channel 2 */
timer_set_mode(TIMER2, 2, TIMER_OUTPUT_COMPARE);
timer_set_compare(TIMER2, 2, 17);
timer_oc_set_mode(TIMER2, 2, TIMER_OC_MODE_PWM_1, ~TIMER_OC_PE);
//timer_resume(TIMER2);
timer_attach_interrupt(TIMER2, TIMER_UPDATE_INTERRUPT, TIM2_IRQHandler);
/* configure TIM2 interrupt */
nvic_irq_set_priority(NVIC_TIMER2, 2);
nvic_irq_enable(NVIC_TIMER2);
}
void adc_init(void) {
rcc_set_prescaler(RCC_PRESCALER_ADC, RCC_ADCPRE_PCLK_DIV_6);
rcc_clk_enable(RCC_ADC1);
rcc_reset_dev(RCC_ADC1);
ADC_CR1 = 0;
ADC_CR2 = CR2_EXTSEL_SWSTART | CR2_EXTTRIG; // Software triggers conversions
ADC_SQR1 = 0;
/* Up the sample conversion time to 55.5 cycles/sec, see note above */
/* TODO: fix magic numbers */
ADC_SMPR1 = 0xB6DB6D;
ADC_SMPR2 = 0x2DB6DB6D;
/* Enable the ADC */
CR2_ADON_BIT = 1;
/* Reset the calibration registers and then perform a reset */
CR2_RSTCAL_BIT = 1;
while(CR2_RSTCAL_BIT)
;
CR2_CAL_BIT = 1;
while(CR2_CAL_BIT)
;
}
void GPIO_init(void)
{
// GPIOA Periph clock enable
rcc_clk_enable(RCC_GPIOA);
// GPIOA pins WS2812 data outputs
gpio_set_mode(GPIOA, 0, GPIO_OUTPUT_PP);
}
/**
* @brief Initialize an ADC peripheral.
*
* Initializes the RCC clock line for the given peripheral. Resets
* ADC device registers.
*
* @param dev ADC peripheral to initialize
*/
void adc_init(const adc_dev *dev) {
rcc_clk_enable(dev->clk_id);
#ifdef STM32F2
if(dev->clk_id == RCC_ADC1) {
rcc_reset_dev(dev->clk_id);
}
#else
rcc_reset_dev(dev->clk_id);
#endif
}
void initSRAMChip(void) {
fsmc_nor_psram_reg_map *regs = FSMC_NOR_PSRAM1_BASE;
fsmc_sram_init_gpios();
rcc_clk_enable(RCC_FSMC);
regs->BCR = FSMC_BCR_WREN | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN;
fsmc_nor_psram_set_addset(regs, 0);
fsmc_nor_psram_set_datast(regs, 3);
}
/**
* @brief Initialize the digital to analog converter
* @param dev DAC device
* @param flags Flags:
* DAC_CH1: Enable channel 1
* DAC_CH2: Enable channel 2
* @sideeffect May set PA4 or PA5 to INPUT_ANALOG
*/
void dac_init(const dac_dev *dev, uint32 flags) {
/* First turn on the clock */
rcc_clk_enable(RCC_DAC);
rcc_reset_dev(RCC_DAC);
if (flags & DAC_CH1) {
dac_enable_channel(dev, 1);
}
if (flags & DAC_CH2) {
dac_enable_channel(dev, 2);
}
}
void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev)
{
// ala42
#define GPIO_AF_OTG1_FS ((uint8_t)0xA) /* OTG_FS Alternate Function mapping */
gpio_set_mode(GPIOA,11,GPIO_MODE_AF | GPIO_OTYPE_PP | GPIO_OSPEED_100MHZ);
gpio_set_mode(GPIOA,12,GPIO_MODE_AF | GPIO_OTYPE_PP | GPIO_OSPEED_100MHZ);
gpio_set_af_mode(GPIOA,11,GPIO_AF_OTG1_FS) ; // OTG_FS_DM
gpio_set_af_mode(GPIOA,12,GPIO_AF_OTG1_FS) ; // OTG_FS_DP
#ifdef USB_OTG_FS_SOF_OUTPUT_ENABLED
gpio_set_mode(GPIOA, 8,GPIO_MODE_AF | GPIO_OTYPE_PP | GPIO_OSPEED_100MHZ);
gpio_set_af_mode(GPIOA, 8,GPIO_AF_OTG1_FS) ; // OTG_FS_SOF
#endif
#ifdef VBUS_SENSING_ENABLED
gpio_set_mode(GPIOA, 9,GPIO_MODE_AF | GPIO_OTYPE_PP | GPIO_OSPEED_100MHZ);
gpio_set_af_mode(GPIOA, 9,GPIO_AF_OTG1_FS) ; // OTG_FS_VBUS
#endif
#ifdef ID_SENSING_ENABLED
gpio_set_mode(GPIOA,10,GPIO_MODE_OUTPUT | GPIO_OTYPE_OD | GPIO_PUPD_INPUT_PU | GPIO_OSPEED_100MHZ);
gpio_set_af_mode(GPIOA,10,GPIO_AF_OTG1_FS) ; // OTG_FS_ID
#endif
rcc_clk_enable(RCC_SYSCFG);
rcc_clk_enable(RCC_USBFS);
}
void usb_init_usblib(usblib_dev *dev,
void (**ep_int_in)(void),
void (**ep_int_out)(void)) {
rcc_clk_enable(dev->clk_id);
dev->ep_int_in = ep_int_in;
dev->ep_int_out = ep_int_out;
/* usb_lib/ declares both and then assumes that pFoo points to Foo
* (even though the names don't always match), which is stupid for
* all of the obvious reasons, but whatever. Here we are. */
pInformation = &Device_Info;
pProperty = &Device_Property;
pUser_Standard_Requests = &User_Standard_Requests;
pInformation->ControlState = 2; /* FIXME [0.0.12] use
CONTROL_STATE enumerator */
pProperty->Init();
}
/**
* @brief Initialize an I2C device and reset its registers to their
* default values.
* @param dev Device to initialize.
*/
void i2c_init(i2c_dev *dev) {
rcc_reset_dev(dev->clk_id);
rcc_clk_enable(dev->clk_id);
_i2c_irq_priority_fixup(dev);
}
void
syscfg_init(void)
{
rcc_clk_enable(RCC_SYSCFG);
}
/**
* @brief Initialize and reset the SDIO device.
*/
void sdio_init(void)
{
rcc_clk_enable(RCC_SDIO);
rcc_reset_dev(RCC_SDIO);
}
/**
* @brief Initialize and reset a SPI device.
* @param dev Device to initialize and reset.
*/
void spi_init(spi_dev *dev) {
rcc_clk_enable(dev->clk_id);
rcc_reset_dev(dev->clk_id);
}
/**
* @brief Initialize an I2C device and reset its registers to their
* default values.
* @param dev Device to initialize.
*/
void i2c_init(i2c_dev *dev) {
rcc_reset_dev(dev->clk_id);
rcc_clk_enable(dev->clk_id);
}
void bkp_init(void) {
/* Don't call pwr_init(), or you'll reset the device. We just
* need the clock. */
rcc_clk_enable(RCC_PWR);
}
/**
* @brief Initialize an ADC peripheral.
*
* Initializes the RCC clock line for the given peripheral. Resets
* ADC device registers.
*
* @param dev ADC peripheral to initialize
*/
void adc_init(const adc_dev *dev) {
rcc_clk_enable(dev->clk_id);
rcc_reset_dev(dev->clk_id);
}
void LCD_IO_Init(uint8_t cs, uint8_t rs) {
uint32_t controllerAddress;
if (fsmcInit) return;
fsmcInit = 1;
switch (cs) {
case FSMC_CS_NE1: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION1; break;
#ifdef STM32_XL_DENSITY
case FSMC_CS_NE2: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION2; break;
case FSMC_CS_NE3: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION3; break;
case FSMC_CS_NE4: controllerAddress = (uint32_t)FSMC_NOR_PSRAM_REGION4; break;
#endif
default: return;
}
#define _ORADDR(N) controllerAddress |= (_BV32(N) - 2)
switch (rs) {
#ifdef STM32_XL_DENSITY
case FSMC_RS_A0: _ORADDR( 1); break;
case FSMC_RS_A1: _ORADDR( 2); break;
case FSMC_RS_A2: _ORADDR( 3); break;
case FSMC_RS_A3: _ORADDR( 4); break;
case FSMC_RS_A4: _ORADDR( 5); break;
case FSMC_RS_A5: _ORADDR( 6); break;
case FSMC_RS_A6: _ORADDR( 7); break;
case FSMC_RS_A7: _ORADDR( 8); break;
case FSMC_RS_A8: _ORADDR( 9); break;
case FSMC_RS_A9: _ORADDR(10); break;
case FSMC_RS_A10: _ORADDR(11); break;
case FSMC_RS_A11: _ORADDR(12); break;
case FSMC_RS_A12: _ORADDR(13); break;
case FSMC_RS_A13: _ORADDR(14); break;
case FSMC_RS_A14: _ORADDR(15); break;
case FSMC_RS_A15: _ORADDR(16); break;
#endif
case FSMC_RS_A16: _ORADDR(17); break;
case FSMC_RS_A17: _ORADDR(18); break;
case FSMC_RS_A18: _ORADDR(19); break;
case FSMC_RS_A19: _ORADDR(20); break;
case FSMC_RS_A20: _ORADDR(21); break;
case FSMC_RS_A21: _ORADDR(22); break;
case FSMC_RS_A22: _ORADDR(23); break;
case FSMC_RS_A23: _ORADDR(24); break;
#ifdef STM32_XL_DENSITY
case FSMC_RS_A24: _ORADDR(25); break;
case FSMC_RS_A25: _ORADDR(26); break;
#endif
default: return;
}
rcc_clk_enable(RCC_FSMC);
gpio_set_mode(GPIOD, 14, GPIO_AF_OUTPUT_PP); // FSMC_D00
gpio_set_mode(GPIOD, 15, GPIO_AF_OUTPUT_PP); // FSMC_D01
gpio_set_mode(GPIOD, 0, GPIO_AF_OUTPUT_PP); // FSMC_D02
gpio_set_mode(GPIOD, 1, GPIO_AF_OUTPUT_PP); // FSMC_D03
gpio_set_mode(GPIOE, 7, GPIO_AF_OUTPUT_PP); // FSMC_D04
gpio_set_mode(GPIOE, 8, GPIO_AF_OUTPUT_PP); // FSMC_D05
gpio_set_mode(GPIOE, 9, GPIO_AF_OUTPUT_PP); // FSMC_D06
gpio_set_mode(GPIOE, 10, GPIO_AF_OUTPUT_PP); // FSMC_D07
gpio_set_mode(GPIOE, 11, GPIO_AF_OUTPUT_PP); // FSMC_D08
gpio_set_mode(GPIOE, 12, GPIO_AF_OUTPUT_PP); // FSMC_D09
gpio_set_mode(GPIOE, 13, GPIO_AF_OUTPUT_PP); // FSMC_D10
gpio_set_mode(GPIOE, 14, GPIO_AF_OUTPUT_PP); // FSMC_D11
gpio_set_mode(GPIOE, 15, GPIO_AF_OUTPUT_PP); // FSMC_D12
gpio_set_mode(GPIOD, 8, GPIO_AF_OUTPUT_PP); // FSMC_D13
gpio_set_mode(GPIOD, 9, GPIO_AF_OUTPUT_PP); // FSMC_D14
gpio_set_mode(GPIOD, 10, GPIO_AF_OUTPUT_PP); // FSMC_D15
gpio_set_mode(GPIOD, 4, GPIO_AF_OUTPUT_PP); // FSMC_NOE
gpio_set_mode(GPIOD, 5, GPIO_AF_OUTPUT_PP); // FSMC_NWE
gpio_set_mode(PIN_MAP[cs].gpio_device, PIN_MAP[cs].gpio_bit, GPIO_AF_OUTPUT_PP); //FSMC_CS_NEx
gpio_set_mode(PIN_MAP[rs].gpio_device, PIN_MAP[rs].gpio_bit, GPIO_AF_OUTPUT_PP); //FSMC_RS_Ax
FSMC_NOR_PSRAM4_BASE->BCR = FSMC_BCR_WREN | FSMC_BCR_MTYP_SRAM | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN;
FSMC_NOR_PSRAM4_BASE->BTR = (FSMC_DATA_SETUP_TIME << 8) | FSMC_ADDRESS_SETUP_TIME;
afio_remap(AFIO_REMAP_FSMC_NADV);
LCD = (LCD_CONTROLLER_TypeDef*)controllerAddress;
}
/**
* Initialize a timer, and reset its register map.
* @param dev Timer to initialize
*/
void timer_init(timer_dev *dev) {
rcc_clk_enable(dev->clk_id);
rcc_reset_dev(dev->clk_id);
}
/**
* @brief Initialize a DMA device.
* @param dev Device to initialize.
*/
void dma_init(dma_dev *dev) {
rcc_clk_enable(dev->clk_id);
}
/**
* @brief Initialize a CAN peripheral.
*
* Initializes the RCC clock line for the given peripheral. Resets
* CAN device registers.
*
* @param dev CAN peripheral to initialize
*/
void can_init(can_dev* const dev) {
rcc_clk_enable(dev->clk_id);
rcc_reset_dev(dev->clk_id);
}
