C++ (Cpp) reg_readw示例

示例#1

文件： wave_multi_ch.c 项目： cheungseol/metawave

void Multi_Ch_OnOff(U1 flag)
{
	U2 reg_data;
	if (flag)		/* Multi-CH On */
	{
		/* Sync time pulse on GPS (Channel A,B)*/
		reg_data = reg_readw((wave_dsrc_base + WAVE_MODE_SET_L_REG_OFFSET));
		reg_data |= 3;
		reg_writew((wave_dsrc_base + WAVE_MODE_SET_L_REG_OFFSET), reg_data);

		/* Turn on Multi-channel operation (Channel A,B)*/
		reg_data = reg_readw((wave_dsrc_base + WAVE_MULTICH_SET_L_REG_OFFSET));
		reg_data |= 3;
		reg_writew((wave_dsrc_base + WAVE_MULTICH_SET_L_REG_OFFSET), reg_data);

		
	}
	else			/* Multi-CH Off */
	{
		/* Sync time pulse on SW (Channel A,B)*/
		reg_data = reg_readw((wave_dsrc_base + WAVE_MODE_SET_L_REG_OFFSET));
		clear_bit(reg_data, 0);
		clear_bit(reg_data, 1);
		reg_writew((wave_dsrc_base + WAVE_MODE_SET_L_REG_OFFSET), reg_data);

		/* Turn off Multi-channel operation (Channel A,B)*/
		reg_data = reg_readw((wave_dsrc_base + WAVE_MULTICH_SET_L_REG_OFFSET));
		clear_bit(reg_data, 0);
		clear_bit(reg_data, 1);
		reg_writew((wave_dsrc_base + WAVE_MULTICH_SET_L_REG_OFFSET), reg_data);
	}
}

示例#2

文件： chip_irq.c 项目： Scorpio92/mstar6a918

/* Clear FIQ (Clear is not supported for IRQ) */
void chip_irq_ack(unsigned int irq)
{
    unsigned short tmp;

    if(irq <16)
    {
        tmp = (0x01 << irq);
        reg_writew(tmp, REG_INT_BASE_PA + (0x2c << 2));
    }
    else if((irq >= 16) && (irq < 32))
    {
      tmp = (0x01 << (irq - 16));
        reg_writew(tmp, REG_INT_BASE_PA + (0x2d << 2));
    }
    else if( (irq >= 32) && (irq < 48))
    {
      tmp = (0x01) << (irq - 32);
        reg_writew(tmp, REG_INT_BASE_PA + (0x2e << 2));
    }
    else if( (irq >= 48) && (irq < 64))
    {
        tmp = (0x01) << (irq - 48);
        reg_writew(tmp, REG_INT_BASE_PA + (0x2f << 2));
    }
#if 0
    else if( (irq >= 64) && (irq < 80))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x3c << 2));
        tmp |= (0x01) << (irq - 64);
        reg_writew(tmp, REG_INT_BASE_PA + (0x3c << 2));
        }
    else if((irq >= 80) && (irq < 96))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x3d << 2));
        tmp |= 0x01 << (irq - 81);
        reg_writew(tmp, REG_INT_BASE_PA + (0x3d << 2));
    }
    else if( (irq >= 96) && (irq < 112))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x3e << 2));
        tmp |= (0x01) << (irq - 97);
        reg_writew(tmp, REG_INT_BASE_PA + (0x3e << 2));
    }
    else if( (irq >= 112) && (irq < 128))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x3f << 2));
        tmp |= (0x01) << (irq - 112);
        reg_writew(tmp, REG_INT_BASE_PA + (0x3f << 2));
    }
#endif
}

示例#3

文件： chip_irq.c 项目： nightcap79/kogan-tv-gpl

/* Un-Mask IRQ/FIQ */
void chip_irq_unmask(unsigned int irq) 
{
   unsigned short tmp;

    //printk(KERN_WARNING "chip_irq_unmask(irq=%d)\n",irq);

    if(irq < 16)
    {
        tmp = reg_readw(REG_INT_BASE_PA + 0x24*4);
        tmp &= ~((0x01) << irq);
        reg_writew(tmp, REG_INT_BASE_PA + 0x24*4);
    }
    
    else if((irq >= 16) && (irq < 32))
    {
        tmp = reg_readw(REG_INT_BASE_PA + 0x25*4);
        tmp &= ~((0x01) << (irq -16));
        reg_writew(tmp, REG_INT_BASE_PA + 0x25*4);
    }
    else if((irq >= 32) && (irq < 48))
    {
        tmp = reg_readw(REG_INT_BASE_PA + 0x26*4);
        tmp &= ~((0x01) << (irq-32));
        reg_writew(tmp, REG_INT_BASE_PA + 0x26*4);
    }
    else if((irq >= 48) && (irq < 64))
    {
        tmp = reg_readw(REG_INT_BASE_PA + 0x27*4);
        tmp &= ~((0x01) << (irq -48));
        reg_writew(tmp, REG_INT_BASE_PA + 0x27*4);
    }
    	else if((irq >= 64) && (irq < 80))
	{
        tmp = reg_readw(REG_INT_BASE_PA + 0x34*4);
        tmp &= ~((0x01) << (irq - 64));
        reg_writew(tmp, REG_INT_BASE_PA + 0x34*4);
	}
	else if((irq >= 80) && (irq < 96))
	{
        tmp = reg_readw(REG_INT_BASE_PA + 0x35*4);
        tmp &= ~((0x01) << (irq - 80));
        reg_writew(tmp, REG_INT_BASE_PA + 0x35*4);
	}
	else if( (irq >= 96) && (irq < 112))
	{
        tmp = reg_readw(REG_INT_BASE_PA + 0x36*4);
        tmp &= ~((0x01) << (irq - 96));
        reg_writew(tmp, REG_INT_BASE_PA + 0x36*4);
	}
	else if( (irq >= 112) && (irq < 128))
	{
        tmp = reg_readw(REG_INT_BASE_PA + 0x37*4);
        tmp &= ~((0x01) << (irq - 112));
        reg_writew(tmp, REG_INT_BASE_PA + 0x37*4);
    }
}

示例#4

文件： jls_adc12_api.c 项目： zsjdream/D-Now-lib

void adc12_get_all_channels_val( u16 *vals )
{
	int ch_id;
	while( !(ADC12IFG & (1 << (jls_adc12_ch-1) ) ) );
	for( ch_id = 0; ch_id < jls_adc12_ch; ++ch_id )
	{
		vals[ch_id] = reg_readw( ADC12_MEM_BASE, ch_id*2 );
	}
}

示例#5

文件： chip_irq.c 项目： Scorpio92/mstar6a918

/* Mask IRQ/FIQ */
void chip_irq_mask(unsigned int irq)
{
    unsigned short tmp;

    if(irq <16)
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x24 << 2));
        tmp |= (0x01) << irq;
        reg_writew(tmp, REG_INT_BASE_PA + (0x24 << 2));
    }
    else if((irq >= 16) && (irq < 32))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x25 << 2));
        tmp |= (0x01) << (irq - 16);
        reg_writew(tmp, REG_INT_BASE_PA + (0x25 << 2));
    }
    else if( (irq >= 32) && (irq < 48))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x26 << 2));
        tmp |= (0x01) << (irq - 32);
        reg_writew(tmp, REG_INT_BASE_PA + (0x26 << 2));
    }
    else if( (irq >= 48) && (irq < 64))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x27 << 2));
        tmp |= (0x01) << (irq - 48);
        reg_writew(tmp, REG_INT_BASE_PA + (0x27 << 2));
    }
    else if((irq >= 64) && (irq < 80))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x34 << 2));
        tmp |= (0x01) << (irq - 64);
        reg_writew(tmp, REG_INT_BASE_PA + (0x34 << 2));
    }
    else if((irq >= 80) && (irq < 96))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x35 << 2));
        tmp |= (0x01) << (irq - 80);
        reg_writew(tmp, REG_INT_BASE_PA + (0x35 << 2));
    }
    else if( (irq >= 96) && (irq < 112))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x36 << 2));
        tmp |= (0x01) << (irq - 96);
        reg_writew(tmp, REG_INT_BASE_PA + (0x36 << 2));
    }
    else if( (irq >= 112) && (irq < 128))
    {
        tmp = reg_readw(REG_INT_BASE_PA + (0x37 << 2));
        tmp |= (0x01) << (irq - 112);
        reg_writew(tmp, REG_INT_BASE_PA + (0x37 << 2));
    }

}

示例#6

文件： chip_irq.c 项目： Scorpio92/mstar6a918

// switch FIQ/IRQ merge bit
/*static*/ int __init init_irq_fiq_merge(void)
{
	unsigned short tmp = 0;

	tmp = reg_readw(0x1f2472c8);
	tmp &= 0xFFDF;
	tmp |= 0x0050;
	reg_writew(tmp, 0x1f2472c8);

	return 0;
}

示例#7

文件： chip_irq.c 项目： Scorpio92/mstar6a918

// switch FIQ/IRQ merge bit
int __init init_irq_fiq_merge(void)
{
#if 0 //When ARM been switch to non-secure mode, interrupt setting can't be touch, so we remove it.
    unsigned short tmp;

    tmp = reg_readw(0x1f000000 + (0x123964 << 1));
    tmp &= 0xFFDF;
    tmp |= 0x0050;
    reg_writew(tmp, (0x1f000000 + (0x123964 << 1)));
#endif
    return 0;
}

示例#8

文件： amber3_timer.c 项目： card2000/VDLinux_3.0.20

int query_frequency()
{
	return (12*reg_readw(0x1F22184c));// 1 = 1(Mhz)
}

示例#9

文件： jls_adc12_api.c 项目： zsjdream/D-Now-lib

u16 adc12_get_channel_val( u8 channels_id )
{
	while( !(ADC12IFG & (1 << channels_id) ) );
	return reg_readw(ADC12_MEM_BASE,channels_id*2 );
}