int CSetProgsAdvDlg::SaveData()
{
if (m_ToolsValid)
{
// Remove all registry values which are no longer in the list
CStringList values;
if (m_regToolKey.getValues(values))
{
for (POSITION pos = values.GetHeadPosition(); pos != NULL; )
{
CString ext = values.GetNext(pos);
if (m_Tools.find(ext) == m_Tools.end())
{
CRegString to_remove(m_regToolKey.m_path + _T("\\") + ext);
to_remove.removeValue();
}
}
}
// Add or update new or changed values
for (auto it = m_Tools.cbegin(); it != m_Tools.cend() ; ++it)
{
CString ext = it->first;
CString new_value = it->second;
CRegString reg_value(m_regToolKey.m_path + _T("\\") + ext);
if (reg_value != new_value)
reg_value = new_value;
}
}
return 0;
}
static uint32_t
ejtag_run_pracc (urj_bus_t *bus, const uint32_t *code, unsigned int len)
{
urj_data_register_t *ejaddr, *ejdata, *ejctrl;
int i, pass;
uint32_t addr, data, retval;
ejaddr = urj_part_find_data_register (bus->part, "EJADDRESS");
ejdata = urj_part_find_data_register (bus->part, "EJDATA");
ejctrl = urj_part_find_data_register (bus->part, "EJCONTROL");
if (!(ejaddr && ejdata && ejctrl))
{
urj_error_set (URJ_ERROR_NOTFOUND,
_("EJADDRESS, EJDATA or EJCONTROL register not found"));
return 0;
}
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
pass = 0;
retval = 0;
for (;;)
{
ejctrl->in->data[PrAcc] = 1;
urj_tap_chain_shift_data_registers (bus->chain, 0);
urj_tap_chain_shift_data_registers (bus->chain, 1);
urj_log (URJ_LOG_LEVEL_ALL, "ctrl=%s\n",
urj_tap_register_get_string (ejctrl->out));
if (ejctrl->out->data[Rocc])
{
urj_error_set (URJ_ERROR_BUS, _("Reset occurred, ctrl=%s"),
urj_tap_register_get_string (ejctrl->out));
bus->initialized = 0;
break;
}
if (!ejctrl->out->data[PrAcc])
{
urj_error_set (URJ_ERROR_BUS, _("No processor access, ctrl=%s"),
urj_tap_register_get_string (ejctrl->out));
bus->initialized = 0;
break;
}
urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_chain_shift_data_registers (bus->chain, 1);
addr = reg_value (ejaddr->out);
if (addr & 3)
{
urj_error_set (URJ_ERROR_BUS,
_("PrAcc bad alignment: addr=0x%08lx"),
(long unsigned) addr);
addr &= ~3;
}
urj_part_set_instruction (bus->part, "EJTAG_DATA");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejdata->in, 0);
if (ejctrl->out->data[PRnW])
{
urj_tap_chain_shift_data_registers (bus->chain, 1);
data = reg_value (ejdata->out);
urj_log (URJ_LOG_LEVEL_ALL,
_("%s(%d) PrAcc write: addr=0x%08lx data=0x%08lx\n"),
__FILE__, __LINE__,
(long unsigned) addr, (long unsigned) data);
if (addr == UINT32_C (0xff200000))
{
/* Return value from the target CPU. */
retval = data;
}
else
{
urj_error_set (URJ_ERROR_BUS,
_("Unknown write addr=0x%08lx data=0x%08lx"),
(long unsigned) addr, (long unsigned) data);
}
}
else
{
if (addr == UINT32_C (0xff200200) && pass++)
break;
data = 0;
if (addr >= 0xff200200 && addr < 0xff200200 + (len << 2))
{
data = code[(addr - 0xff200200) >> 2];
for (i = 0; i < 32; i++)
ejdata->in->data[i] = (data >> i) & 1;
}
urj_log (URJ_LOG_LEVEL_ALL,
"%s(%d) PrAcc read: addr=0x%08lx data=0x%08lx\n",
__FILE__, __LINE__,
(long unsigned) addr, (long unsigned) data);
urj_tap_chain_shift_data_registers (bus->chain, 0);
}
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
ejctrl->in->data[PrAcc] = 0;
urj_tap_chain_shift_data_registers (bus->chain, 0);
}
/**
* low level dma read operation
*
*/
static unsigned int
ejtag_dma_read (urj_bus_t *bus, unsigned int addr, int sz)
{
static urj_data_register_t *ejctrl = NULL;
static urj_data_register_t *ejaddr = NULL;
static urj_data_register_t *ejdata = NULL;
int i = 0;
int timeout = 5;
unsigned int ret;
if (ejctrl == NULL)
ejctrl = urj_part_find_data_register (bus->part, "EJCONTROL");
if (ejaddr == NULL)
ejaddr = urj_part_find_data_register (bus->part, "EJADDRESS");
if (ejdata == NULL)
ejdata = urj_part_find_data_register (bus->part, "EJDATA");
urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
urj_tap_chain_shift_instructions (bus->chain);
for (i = 0; i < 32; i++)
ejaddr->in->data[i] = (addr >> i) & 1;
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the address to read */
urj_log (URJ_LOG_LEVEL_COMM, "Wrote to ejaddr->in =%s %08lX\n",
urj_tap_register_get_string (ejaddr->in),
(long unsigned) reg_value (ejaddr->in));
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
ejctrl->in->data[PrAcc] = 1; // Processor access
ejctrl->in->data[ProbEn] = 1;
ejctrl->in->data[DmaAcc] = 1; // DMA operation request */
ejctrl->in->data[DstRt] = 1;
if (sz)
ejctrl->in->data[sz] = 1; // Size : can be WORD/HALFWORD or nothing for byte
ejctrl->in->data[DmaRwn] = 1; // This is a read
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Do the operation */
urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(long unsigned) reg_value (ejctrl->in));
do
{
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
ejctrl->in->data[PrAcc] = 1;
ejctrl->in->data[ProbEn] = 1;
ejctrl->in->data[DmaAcc] = 1;
urj_tap_chain_shift_data_registers (bus->chain, 1);
urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(long unsigned) reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08lX\n",
urj_tap_register_get_string (ejctrl->out),
(long unsigned) reg_value (ejctrl->out));
timeout--;
if (!timeout)
break;
}
while (ejctrl->out->data[DstRt] == 1); // This flag tell us the processor has completed the op
urj_part_set_instruction (bus->part, "EJTAG_DATA");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejdata->in, 0);
urj_tap_chain_shift_data_registers (bus->chain, 1);
ret = reg_value (ejdata->out);
urj_log (URJ_LOG_LEVEL_COMM, "Read from ejdata->out(%c) =%s %08lX\n",
siz_ (sz), urj_tap_register_get_string (ejdata->out),
(long unsigned) reg_value (ejdata->out));
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
ejctrl->in->data[PrAcc] = 1;
ejctrl->in->data[ProbEn] = 1;
urj_tap_chain_shift_data_registers (bus->chain, 1); // Disable DMA, reset state to previous one.
urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(long unsigned) reg_value (ejctrl->in));
urj_log (URJ_LOG_LEVEL_ALL, "Read from ejctrl->out =%s %08lX\n",
urj_tap_register_get_string (ejctrl->out),
(long unsigned) reg_value(ejctrl->out));
if (ejctrl->out->data[Derr] == 1)
{ // Check for DMA error, i.e. incorrect address
urj_error_set (URJ_ERROR_BUS_DMA,
_("dma read (dma transaction failed)"));
}
switch (sz)
{
case DMA_HALFWORD:
if (addr & 2)
ret = (ret >> 16) & 0xffff;
else
ret = ret & 0xffff;
break;
case DMA_BYTE:
if ((addr & 3) == 3)
ret = (ret >> 24) & 0xff;
else if ((addr & 3) == 2)
void convert_Object(void){
char *temp;
int n, i, x, b, p, e;
int disp = 0;
int j;
char str[3];
get_OPformat();
/* if is format 1 */
if(OPCODE_format == 1){
OBJECT_CODE = instPtr->Opcode;
OBJECT_ox = 1; // need to generate OBJECT CODE
convert_ObToString(); // convert int object code to string.
}
/* else if is format 2 */
else if(OPCODE_format == 2){
OBJECT_CODE = (instPtr->Opcode) << 8; // shit left 1 Byte
if(OPERAND_ox == 2){
OBJECT_CODE += ((reg_value(OPERAND1) << 4) | reg_value(OPERAND2)); // 2 registers
}
else{
OBJECT_CODE += (reg_value(OPERAND1) << 4); // 1 register
}
OBJECT_ox = 1; // need to generate OBJECT CODE
convert_ObToString(); // convert int object code to string.
}
/* else (format 3) */
else if(OPCODE_format == 3){
/* if is Immediate addressing */
if(OPERAND1[0] == '#'){
n = 0;
i = 1;
}
/* else if is Indirect addressing */
else if(OPERAND1[0] == '@'){
n = 1;
i = 0;
}
/* else (simple) */
else{
i = 1;
n = 1;
}
/* Calculate displacement,
if OPERAND1 is immediate address constant */
if((OPERAND1[0] == '#') && (OPERAND1[1] >= '0') && (OPERAND1[1] <= '9')){
disp = atoi(&OPERAND1[1]); // we don't need #
b = 0;
p = 0;
}
/* else if PC relative */
else if(relative_mode(&disp)){
b = 0;
p = 1;
}
/* else (BASE relative) */
else{
b = 1;
p = 0;
}
/* if is index address */
if((OPERAND_ox == 2) && (OPERAND2[0] == 'X')){
x = 1;
}
/* else (not index address) */
else{
x = 0;
}
e = 0; // format 3
/* exception RSUB <-- L */
if(!strcmp(OPCODE, "RSUB")){
n = 1;
i = 1;
x = 0;
b = 0;
p = 0;
e = 0;
disp = reg_L;
}
/* generate object code */
OBJECT_CODE = (instPtr->Opcode) << 16; // shift left 16 bits
OBJECT_CODE += ((n << 17) + (i << 16) + (x << 15) + (b << 14) + (p << 13) + (e << 12));
OBJECT_CODE |= (disp & 0x00000FFF) ;
OBJECT_ox = 1; // need to generate OBJECT CODE
convert_ObToString(); // convert int object code to string.
}
/* else if is format 4 */
else if(OPCODE_format == 4){
/* if is Immediate addressing */
if(OPERAND1[0] == '#'){
n = 0;
i = 1;
}
/* else if is Indirect addressing */
else if(OPERAND1[0] == '@'){
n = 1;
i = 0;
}
/* else (simple) */
else{
i = 1;
n = 1;
}
/* Calculate address,
if OPERAND1 is immediate address constant */
if((OPERAND1[0] == '#') && (OPERAND1[1] >= '0') && (OPERAND1[1] <= '9')){
disp = atoi(&OPERAND1[1]); // we don't need #
b = 0;
p = 0;
}
/* else (direct addressing) */
else{
/* Clean '@' or '#' */
if((OPERAND1[0] == '@') || (OPERAND1[0] == '#')){
temp = &OPERAND1[1];
strcpy(OPERAND1, temp);
}
/* search SYMTAB */
if(search_SYMTAB(OPERAND1) == 0){
printf("ERROR! %s is not found. It's an invalid SYMBOL\n", OPERAND1);
exit(0);
}
b = 0;
p = 0;
disp = SYMBOL_ADDR;
/* Relocation */
relocate(0); // store address
}
/* if is index address */
if((OPERAND_ox == 2) && (OPERAND2[0] == 'X')){
x = 1;
}
/* else (not index address) */
else{
x = 0;
}
e = 1; // format 4
/* generate object code */
OBJECT_CODE = (instPtr->Opcode) << 24; // shift left 16 bits
OBJECT_CODE += ((n << 25) + (i << 24) + (x << 23) + (b << 22) + (p << 21) + (e << 20));
OBJECT_CODE += disp;
OBJECT_ox = 1; // need to generate OBJECT CODE
convert_ObToString(); // convert int object code to string.
}
/* else if OPCODE = 'BYTE', then */
else if(!strcmp(OPCODE, "BYTE")){
/* if string */
if(OPERAND1[0] == 'C'){
OBJECT_CODE = (int)OPERAND1[2];
for(j = 3, S_L = 1; OPERAND1[j] != '\''; j++, S_L++){
OBJECT_CODE = (int)OPERAND1[j] + (OBJECT_CODE << 8);
}
}
/* else (char) */
else{
str[0] = OPERAND1[2];
str[1] = OPERAND1[3];
str[2] = '\0';
OBJECT_CODE = (int)strtol(str, NULL, 16);
S_L = 1;
}
OBJECT_ox = 1;
convert_ObToString();
}
/* else if OPCODE = 'WORD', then */
else if(!strcmp(OPCODE, "BYTE")){
OBJECT_CODE = atoi(OPERAND1);
OBJECT_ox = 1;
S_L = 1;
convert_ObToString();
}
/* else if OPCODE = 'BASE', then */
else if(OPCODE_format == 7){
/* search SYMTAB */
if(search_SYMTAB(OPERAND1) == 0){
printf("ERROR! %s is not found. It's an invalid SYMBOL\n", OPERAND1);
exit(0);
}
BASE = SYMBOL_ADDR;
OBJECT_ox = 0;
}
else if(OPCODE_format == 0){
OBJECT_ox = 0;
}
else{
/* Set ERROR Flag */
printf("ERROR.\n");
exit(0);
}
// printf("x = %d, b = %d, p = %d, e = %d, disp = %X\n", x, b, p, e, disp); // for testing
return ;
}
/**
* low-level dma write
*
*/
static void
ejtag_dma_write (urj_bus_t *bus, unsigned int addr, unsigned int data, int sz)
{
static urj_data_register_t *ejctrl = NULL;
static urj_data_register_t *ejaddr = NULL;
static urj_data_register_t *ejdata = NULL;
int i = 0;
int timeout = 5;
if (ejctrl == NULL)
ejctrl = urj_part_find_data_register (bus->part, "EJCONTROL");
if (ejaddr == NULL)
ejaddr = urj_part_find_data_register (bus->part, "EJADDRESS");
if (ejdata == NULL)
ejdata = urj_part_find_data_register (bus->part, "EJDATA");
switch (sz)
{ /* Fill the other bytes with copy of the current */
case DMA_BYTE:
data &= 0xff;
data |= (data << 8) | (data << 16) | (data << 24);
break;
case DMA_HALFWORD:
data &= 0xffff;
data |= (data << 16);
break;
default:
break;
}
urj_part_set_instruction (bus->part, "EJTAG_ADDRESS");
urj_tap_chain_shift_instructions (bus->chain);
for (i = 0; i < 32; i++)
ejaddr->in->data[i] = (addr >> i) & 1;
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the address to write */
urj_log (URJ_LOG_LEVEL_COMM, "Wrote to ejaddr->in =%s %08lX\n",
urj_tap_register_get_string (ejaddr->in),
(long unsigned) reg_value (ejaddr->in));
urj_part_set_instruction (bus->part, "EJTAG_DATA");
urj_tap_chain_shift_instructions (bus->chain);
for (i = 0; i < 32; i++)
ejdata->in->data[i] = (data >> i) & 1;
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Push the data to write */
urj_log (URJ_LOG_LEVEL_COMM, "Wrote to edata->in(%c) =%s %08lX\n",
siz_ (sz), urj_tap_register_get_string (ejdata->in),
(long unsigned) reg_value (ejdata->in));
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
ejctrl->in->data[PrAcc] = 1; // Processor access
ejctrl->in->data[ProbEn] = 1;
ejctrl->in->data[DmaAcc] = 1; // DMA operation request */
ejctrl->in->data[DstRt] = 1;
if (sz)
ejctrl->in->data[sz] = 1; // Size : can be WORD/HALFWORD or nothing for byte
urj_tap_chain_shift_data_registers (bus->chain, 0); /* Do the operation */
urj_log (URJ_LOG_LEVEL_ALL, "Wrote to ejctrl->in =%s %08lX\n",
urj_tap_register_get_string (ejctrl->in),
(long unsigned) reg_value (ejctrl->in));
do
{
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
ejctrl->in->data[PrAcc] = 1;
ejctrl->in->data[ProbEn] = 1;
ejctrl->in->data[DmaAcc] = 1;
urj_tap_chain_shift_data_registers (bus->chain, 1);
timeout--;
if (!timeout)
break;
}
while (ejctrl->out->data[DstRt] == 1); // This flag tell us the processor has completed the op
urj_part_set_instruction (bus->part, "EJTAG_CONTROL");
urj_tap_chain_shift_instructions (bus->chain);
urj_tap_register_fill (ejctrl->in, 0);
ejctrl->in->data[PrAcc] = 1;
ejctrl->in->data[ProbEn] = 1;
urj_tap_chain_shift_data_registers (bus->chain, 1); // Disable DMA, reset state to previous one.
if (ejctrl->out->data[Derr] == 1)
{ // Check for DMA error, i.e. incorrect address
urj_error_set (URJ_ERROR_BUS_DMA,
_("dma write (dma transaction failed)"));
}
return;
}
