static int edp_regulator_enable(struct edp_ctrl *ctrl)
{
int ret;
ret = regulator_set_load(ctrl->vdda_vreg, VDDA_UA_ON_LOAD);
if (ret < 0) {
pr_err("%s: vdda_vreg set regulator mode failed.\n", __func__);
goto vdda_set_fail;
}
ret = regulator_enable(ctrl->vdda_vreg);
if (ret) {
pr_err("%s: Failed to enable vdda_vreg regulator.\n", __func__);
goto vdda_enable_fail;
}
ret = regulator_enable(ctrl->lvl_vreg);
if (ret) {
pr_err("Failed to enable lvl-vdd reg regulator, %d", ret);
goto lvl_enable_fail;
}
DBG("exit");
return 0;
lvl_enable_fail:
regulator_disable(ctrl->vdda_vreg);
vdda_enable_fail:
regulator_set_load(ctrl->vdda_vreg, VDDA_UA_OFF_LOAD);
vdda_set_fail:
return ret;
}
static int msm_hsusb_ldo_set_mode(struct msm_otg *motg, int on)
{
int ret = 0;
if (on) {
ret = regulator_set_load(motg->v1p8, USB_PHY_1P8_HPM_LOAD);
if (ret < 0) {
pr_err("Could not set HPM for v1p8\n");
return ret;
}
ret = regulator_set_load(motg->v3p3, USB_PHY_3P3_HPM_LOAD);
if (ret < 0) {
pr_err("Could not set HPM for v3p3\n");
regulator_set_load(motg->v1p8, USB_PHY_1P8_LPM_LOAD);
return ret;
}
} else {
ret = regulator_set_load(motg->v1p8, USB_PHY_1P8_LPM_LOAD);
if (ret < 0)
pr_err("Could not set LPM for v1p8\n");
ret = regulator_set_load(motg->v3p3, USB_PHY_3P3_LPM_LOAD);
if (ret < 0)
pr_err("Could not set LPM for v3p3\n");
}
pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
return ret < 0 ? ret : 0;
}
static int ufs_qcom_phy_cfg_vreg(struct device *dev,
struct ufs_qcom_phy_vreg *vreg, bool on)
{
int ret = 0;
struct regulator *reg = vreg->reg;
const char *name = vreg->name;
int min_uV;
int uA_load;
if (regulator_count_voltages(reg) > 0) {
min_uV = on ? vreg->min_uV : 0;
ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
if (ret) {
dev_err(dev, "%s: %s set voltage failed, err=%d\n",
__func__, name, ret);
goto out;
}
uA_load = on ? vreg->max_uA : 0;
ret = regulator_set_load(reg, uA_load);
if (ret >= 0) {
/*
* regulator_set_load() returns new regulator
* mode upon success.
*/
ret = 0;
} else {
dev_err(dev, "%s: %s set optimum mode(uA_load=%d) failed, err=%d\n",
__func__, name, uA_load, ret);
goto out;
}
}
out:
return ret;
}
static void qca_disable_regulator(struct qca_vreg vregs,
struct regulator *regulator)
{
regulator_disable(regulator);
regulator_set_voltage(regulator, 0, vregs.max_uV);
if (vregs.load_uA)
regulator_set_load(regulator, 0);
}
static int qca_enable_regulator(struct qca_vreg vregs,
struct regulator *regulator)
{
int ret;
ret = regulator_set_voltage(regulator, vregs.min_uV,
vregs.max_uV);
if (ret)
return ret;
if (vregs.load_uA)
ret = regulator_set_load(regulator,
vregs.load_uA);
if (ret)
return ret;
return regulator_enable(regulator);
}
static void edp_regulator_disable(struct edp_ctrl *ctrl)
{
regulator_disable(ctrl->lvl_vreg);
regulator_disable(ctrl->vdda_vreg);
regulator_set_load(ctrl->vdda_vreg, VDDA_UA_OFF_LOAD);
}
static int qcom_usb_hs_phy_power_on(struct phy *phy)
{
struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy);
struct ulpi *ulpi = uphy->ulpi;
const struct ulpi_seq *seq;
int ret, state;
ret = clk_prepare_enable(uphy->ref_clk);
if (ret)
return ret;
ret = clk_prepare_enable(uphy->sleep_clk);
if (ret)
goto err_sleep;
ret = regulator_set_load(uphy->v1p8, 50000);
if (ret < 0)
goto err_1p8;
ret = regulator_enable(uphy->v1p8);
if (ret)
goto err_1p8;
ret = regulator_set_voltage_triplet(uphy->v3p3, 3050000, 3300000,
3300000);
if (ret)
goto err_3p3;
ret = regulator_set_load(uphy->v3p3, 50000);
if (ret < 0)
goto err_3p3;
ret = regulator_enable(uphy->v3p3);
if (ret)
goto err_3p3;
for (seq = uphy->init_seq; seq->addr; seq++) {
ret = ulpi_write(ulpi, ULPI_EXT_VENDOR_SPECIFIC + seq->addr,
seq->val);
if (ret)
goto err_ulpi;
}
if (uphy->reset) {
ret = reset_control_reset(uphy->reset);
if (ret)
goto err_ulpi;
}
if (uphy->vbus_edev) {
state = extcon_get_state(uphy->vbus_edev, EXTCON_USB);
/* setup initial state */
qcom_usb_hs_phy_vbus_notifier(&uphy->vbus_notify, state,
uphy->vbus_edev);
ret = devm_extcon_register_notifier(&ulpi->dev, uphy->vbus_edev,
EXTCON_USB, &uphy->vbus_notify);
if (ret)
goto err_ulpi;
}
return 0;
err_ulpi:
regulator_disable(uphy->v3p3);
err_3p3:
regulator_disable(uphy->v1p8);
err_1p8:
clk_disable_unprepare(uphy->sleep_clk);
err_sleep:
clk_disable_unprepare(uphy->ref_clk);
return ret;
}
