/* Initialize the interrupt system
* Parameters:
* none
*
* Returns:
* void
*/
void int_init(void)
{
//bool iflag = int_begin_atomic();
//_int_disable();
// Remap/initialize the 8259 PIC and load the IDT pointer
idt_init();
remap_pic();
memset(g_int_handler_table, 0, sizeof(int_handler_t) * INT_NUM_INTERRUPTS);
memset(irq_handler_list, 0, sizeof(struct irq_handler *) * NUM_IRQS);
// Initialize the default interrupt handlers
for (int i = 0; i < INT_NUM_INTERRUPTS; i++)
{
if (i >= FIRST_IRQ_INT &&
i < FIRST_IRQ_INT + NUM_IRQS)
{
g_int_handler_table[i] = irq_int_handler;
}
else if (i == INT_SYSCALL_INTERRUPT)
{
g_int_handler_table[i] = syscall_int_handler;
}
else
{
g_int_handler_table[i] = unexpected_int_handler;
}
}
printf("[cpu] initialized interrupt and IRQ handlers\n");
}
void kmain(multiboot_info_t* mbd, unsigned long magic)
{
if(magic != MULTIBOOT_BOOTLOADER_MAGIC) {
scrn_setmode(GREEN,BLACK);
scrn_print("Algo salio muy muy mal. No se que mas decirte.");
return;
}
scrn_cls();
scrn_setmode(GREEN,BLACK);
scrn_print("BIENVENIDO A juampiOS\n\t"
"Estamos trabajando para ofrecerle "
"el OS del futuro.\n");
scrn_print("INICIALIZANDO GDT...");
gdt_init();
gdt_flush();
scrn_print("OK\nINICIALIZANDO IDT PARA LAS EXCEPCIONES...");
initialize_exception_handlers();
idt_init_exceptions();
remap_pic();
scrn_print("OK\nINICIALIZANDO IDT PARA LAS INTERRUPCIONES Y SYSCALLS...");
irq_init_handlers();
syscalls_initialize();
idt_init_interrupts();
idt_init_syscalls();
idt_flush();
irq_sti_force();
scrn_printf("OK\nCHEQUEANDO ESTADO DE LOS MODULOS...");
scrn_printf("%u MODULOS CARGADOS\n",mbd->mods_count);
scrn_print("CHECKEANDO ESTADO DE LA MEMORIA\n");
// Chequeamos que la cantidad de memoria RAM presente.
if(mbd->flags & 1) {
scrn_printf("\tCantidad de RAM en el sistema:\n"
"\t\tLower: %u Kb, Upper: %u Kb\n",
mbd->mem_lower,mbd->mem_upper);
} else {
kernel_panic("Mapa de memoria de GRUB invalido");
}
scrn_print("INICIALIZANDO LAS ESTRUCTURAS DE MEMORIA DEL KERNEL...");
module_t* grub_modules = (module_t*) mbd->mods_addr;
uint kernel_end_addr = grub_modules[mbd->mods_count-1].mod_end;
// El mapa de memoria upper es a partir del primer megabyte ergo el primer
// lugar donde nos vamos de largo es 1024 kilobytes mas la memoria que dice GRUB
paging_init(kernel_end_addr, (1024+mbd->mem_upper)*1024);
scrn_printf("OK\n");
scrn_print("INICIALIZANDO DISCO ATA\n");
hdd_init();
scrn_printf("INICIALIZANDO FILESYSTEM MINIX\n");
init_disk_super_block();
keybuffer_init(1024);
scheduler_init();
void * buffer = (void *) grub_modules[0].mod_start;
jump_to_initial(buffer);
while(1) ;
}
void setup_isrs() {
set_isr(0, (unsigned)isr0, 0x08, 0x8E);
set_isr(1, (unsigned)isr1, 0x08, 0x8E);
set_isr(2, (unsigned)isr2, 0x08, 0x8E);
set_isr(3, (unsigned)isr3, 0x08, 0x8E);
set_isr(4, (unsigned)isr4, 0x08, 0x8E);
set_isr(5, (unsigned)isr5, 0x08, 0x8E);
set_isr(6, (unsigned)isr6, 0x08, 0x8E);
set_isr(7, (unsigned)isr7, 0x08, 0x8E);
set_isr(8, (unsigned)isr8, 0x08, 0x8E);
set_isr(9, (unsigned)isr9, 0x08, 0x8E);
set_isr(10, (unsigned)isr10, 0x08, 0x8E);
set_isr(11, (unsigned)isr11, 0x08, 0x8E);
set_isr(12, (unsigned)isr12, 0x08, 0x8E);
set_isr(13, (unsigned)isr13, 0x08, 0x8E);
set_isr(14, (unsigned)isr14, 0x08, 0x8E);
set_isr(15, (unsigned)isr15, 0x08, 0x8E);
set_isr(16, (unsigned)isr16, 0x08, 0x8E);
set_isr(17, (unsigned)isr17, 0x08, 0x8E);
set_isr(18, (unsigned)isr18, 0x08, 0x8E);
set_isr(19, (unsigned)isr19, 0x08, 0x8E);
set_isr(20, (unsigned)isr20, 0x08, 0x8E);
set_isr(21, (unsigned)isr21, 0x08, 0x8E);
set_isr(22, (unsigned)isr22, 0x08, 0x8E);
set_isr(23, (unsigned)isr23, 0x08, 0x8E);
set_isr(24, (unsigned)isr24, 0x08, 0x8E);
set_isr(25, (unsigned)isr25, 0x08, 0x8E);
set_isr(26, (unsigned)isr26, 0x08, 0x8E);
set_isr(27, (unsigned)isr27, 0x08, 0x8E);
set_isr(28, (unsigned)isr28, 0x08, 0x8E);
set_isr(29, (unsigned)isr29, 0x08, 0x8E);
set_isr(30, (unsigned)isr30, 0x08, 0x8E);
set_isr(31, (unsigned)isr31, 0x08, 0x8E);
remap_pic();
set_isr(32, (unsigned)irq0, 0x08, 0x8E);
set_isr(33, (unsigned)irq1, 0x08, 0x8E);
set_isr(34, (unsigned)irq2, 0x08, 0x8E);
set_isr(35, (unsigned)irq3, 0x08, 0x8E);
set_isr(36, (unsigned)irq4, 0x08, 0x8E);
set_isr(37, (unsigned)irq5, 0x08, 0x8E);
set_isr(38, (unsigned)irq6, 0x08, 0x8E);
set_isr(39, (unsigned)irq7, 0x08, 0x8E);
set_isr(40, (unsigned)irq8, 0x08, 0x8E);
set_isr(41, (unsigned)irq9, 0x08, 0x8E);
set_isr(42, (unsigned)irq10, 0x08, 0x8E);
set_isr(43, (unsigned)irq11, 0x08, 0x8E);
set_isr(44, (unsigned)irq12, 0x08, 0x8E);
set_isr(45, (unsigned)irq13, 0x08, 0x8E);
set_isr(46, (unsigned)irq14, 0x08, 0x8E);
set_isr(47, (unsigned)irq15, 0x08, 0x8E);
}
void initapic()
{
/* Remap PIC */
remap_pic();
/* Detect APIC, panic if not found */
int ret = 0;
__asm__(
"movl $0x1, %%eax\n\t"
"cpuid\n\t"
"movl %%edx, %%ecx\n\t"
:"=c"(ret)
:
: "eax", "edx"
);
if (!(ret & (1 << 9)))
panic("No APIC found.");
/* Disable (mask) PIC*/
mask_pic();
/* Get APIC ID for first CPU */
uint32_t apic_id = read_lapic_reg(0x20);
write_ioapic_reg(0x10, 0x20);
write_ioapic_reg(0x11, (apic_id << 24) & 0x0F000000);
write_ioapic_reg(0x12, 0x21);
write_ioapic_reg(0x13, (apic_id << 24) & 0x0F000000);
/* mask mouse input */
write_ioapic_reg(0x28, 0x100FF);
write_ioapic_reg(0x29, (apic_id << 24) & 0x0F000000);
/* Spurious Interrupt Vector */
write_lapic_reg(0xF0, SPURIOUS_VECTOR + APIC_ENABLE);
/* enable interrupts */
__asm__("sti");
/* APIC timer initialization */
apic_timer_init();
}
void init_timer(){
remap_pic(0x20, 0x28);
set_mask(0, 0xFE);
set_timer();
}
void pic_init(void)
{
remap_pic();
}
