/* This function blocks until alert occurs or
timeout occurs(If any timeout value > 0 is set) */
static ssize_t show_alert_blocking(struct device *dev,
struct device_attribute *devattr, char *buf)
{
struct tmon_info *data = i2c_get_clientdata(to_i2c_client(dev));
u8 status;
int err;
unsigned long intr_flags;
mutex_lock(&data->sysfs_alert_lock);
status = manage_alert(to_i2c_client(dev));
if ((status & STATUS_REMOTE_LOW) || (status & STATUS_REMOTE_HIGH)) {
mutex_unlock(&data->sysfs_alert_lock);
return return_status(buf, status);
}
/* Even though data->therm_alert is shared between ISR and process,
protection is not required here. Because before any process access
this varaible here, alert interrupt would have been disabled */
data->therm_alert = 0;
data->disable_intr_reqr = 1;
/* Enable Interrupt for thermal alert */
enable_irq(data->irq_num);
/* Wait event on therm alert */
if (data->sysfs_therm_alert_timeout > 0) {
wait_event_interruptible_timeout(data->alert_wait_queue,
(data->therm_alert & 0x1),
msecs_to_jiffies(data->sysfs_therm_alert_timeout));
} else {
wait_event_interruptible(
data->alert_wait_queue,
(data->therm_alert & 0x1));
}
/* data->therm_alert is shared between ISR and process.
So, spinlock used for protection */
spin_lock_irqsave(&data->alert_spinlock, intr_flags);
if (data->disable_intr_reqr) {
disable_irq_nosync(data->irq_num);
data->disable_intr_reqr = 0;
}
spin_unlock_irqrestore(&data->alert_spinlock, intr_flags);
mutex_lock(&data->update_lock);
TMON_RD(to_i2c_client(dev), REG_STATUS, &status);
mutex_unlock(&data->update_lock);
mutex_unlock(&data->sysfs_alert_lock);
return return_status(buf, status);
}
static ssize_t show_alert(struct device *dev,
struct device_attribute *devattr, char *buf)
{
u8 status;
status = manage_alert(to_i2c_client(dev));
return return_status(buf, status);
}
void request_perform(const RequestParams *params, S3RequestContext *context)
{
Request *request;
S3Status status;
#define return_status(status) \
(*(params->completeCallback))(status, 0, params->callbackData); \
return
// These will hold the computed values
RequestComputedValues computed;
// Validate the bucket name
if (params->bucketContext.bucketName &&
((status = S3_validate_bucket_name
(params->bucketContext.bucketName,
params->bucketContext.uriStyle)) != S3StatusOK)) {
return_status(status);
}
// Compose the amz headers
if ((status = compose_amz_headers(params, &computed)) != S3StatusOK) {
return_status(status);
}
// Compose standard headers
if ((status = compose_standard_headers
(params, &computed)) != S3StatusOK) {
return_status(status);
}
// URL encode the key
if ((status = encode_key(params, &computed)) != S3StatusOK) {
return_status(status);
}
// Compute the canonicalized amz headers
canonicalize_amz_headers(&computed);
// Compute the canonicalized resource
canonicalize_resource(params->bucketContext.bucketName,
params->subResource, computed.urlEncodedKey,
computed.canonicalizedResource);
// Compose Authorization header
if ((status = compose_auth_header(params, &computed)) != S3StatusOK) {
return_status(status);
}
// Get an initialized Request structure now
if ((status = request_get(params, &computed, &request)) != S3StatusOK) {
return_status(status);
}
// If a RequestContext was provided, add the request to the curl multi
if (context) {
CURLMcode code = curl_multi_add_handle(context->curlm, request->curl);
if (code == CURLM_OK) {
if (context->requests) {
request->prev = context->requests->prev;
request->next = context->requests;
context->requests->prev->next = request;
context->requests->prev = request;
}
else {
context->requests = request->next = request->prev = request;
}
}
else {
if (request->status == S3StatusOK) {
request->status = (code == CURLM_OUT_OF_MEMORY) ?
S3StatusOutOfMemory : S3StatusInternalError;
}
request_finish(request);
}
}
// Else, perform the request immediately
else {
CURLcode code = curl_easy_perform(request->curl);
if ((code != CURLE_OK) && (request->status == S3StatusOK)) {
request->status = request_curl_code_to_status(code);
}
// Finish the request, ensuring that all callbacks have been made, and
// also releases the request
request_finish(request);
}
}
/* Execute the given command.
* Return Error if a non-fatal error occurs and execution can continue.
* Return Exit if a fatal error occurs that needs to result in process termination.
*
*/
Result execute( char *** program_args,
char * file_in,
char * file_out,
unsigned num_programs) {
/* Each process requires an input and output file descriptor.
* -5 represents normal stdin/stdout.
* -6 represents undefined.
*/
int input_fd = FD_UNDEFINED;
int output_fd = FD_STD;
int fd_to_close = FD_UNDEFINED;
/* Child process PIDs are tracked for reporting purposes. */
pid_t * child_pids = (pid_t *) malloc(num_programs * sizeof(pid_t));
int current_pipe[2];
unsigned i = 0;
Result exec_status;
Result return_val = Ok;
int child_exit_status;
int child_exit_code;
for (i = 0; i < num_programs; i++) {
/* First program. */
if (i == 0) {
input_fd = FD_STD;
/* If the input file is non-null, open it for reading instead of stdin. */
if (open_file(&input_fd, file_in, "reading", O_RDONLY) == -1) {
return_status(Error);
}
}
/* Last program. */
if (i == num_programs - 1) {
output_fd = FD_STD;
/* If there's an output file, open it for writing. */
if (open_file(&output_fd, file_out, "writing", O_WRONLY | O_CREAT) == -1) {
return_status(Error);
}
}
/* Not the last program.
* At this point in every iteration, input_fd is set to something meaningful,
* so we just need to set output_fd by opening a new pipe.
*/
else {
/* Pipe and check for failure. */
if (pipe(current_pipe) == -1) {
fprintf(stderr, "exec error: unable to pipe.\n");
return_status(Error);
}
/* Output to the write end of the pipe. */
output_fd = current_pipe[1];
/* Close the read end of the output pipe in the child. */
fd_to_close = current_pipe[0];
}
/* With file descriptors set up, execute the program. */
exec_status = execute_single(program_args[i], input_fd, output_fd,
fd_to_close, &child_pids[i]);
/* Child only: propogate exec failure to the top so that memory can be freed. */
if (exec_status == Exit) {
return_status(Exit);
}
/* Parent only: continue to next command on fork failure. */
else if (exec_status == Error) {
return_status(Error);
}
/* The input for the next program is the output from the previous. */
input_fd = current_pipe[0];
}
/* Wait for children to exit and report errors.
* Children are collected in-order to facilitate error reporting,
* however this does mean that children that die quickly may have to wait to be cleaned up.
*/
for (i = 0; i < num_programs; i++) {
waitpid(child_pids[i], &child_exit_status, 0);
/* Child exited normally. */
if (WIFEXITED(child_exit_status)) {
/* Child exit code is non-zero. */
child_exit_code = WEXITSTATUS(child_exit_status);
if (child_exit_code != 0) {
fprintf(stderr, "%s [%d] exited with code %d.\n",
program_args[i][0], i, child_exit_code
);
return_val = Error;
}
}
/* Child exited abnormally. */
else {
fprintf(stderr, "%s [%d] exited abnormally.\n", program_args[i][0], i);
return_val = Error;
}
}
return_status(return_val);
}
void rs232_io()
{
#ifdef BIT_ORDER2
union {
half_word all;
struct {
HALF_WORD_BIT_FIELD word_length:2;
HALF_WORD_BIT_FIELD stop_bit:1;
HALF_WORD_BIT_FIELD parity:2;
HALF_WORD_BIT_FIELD baud_rate:3;
} bit;
} parameters;
#endif
#ifdef BIT_ORDER1
union {
half_word all;
struct {
HALF_WORD_BIT_FIELD baud_rate:3;
HALF_WORD_BIT_FIELD parity:2;
HALF_WORD_BIT_FIELD stop_bit:1;
HALF_WORD_BIT_FIELD word_length:2;
} bit;
} parameters;
#endif
DIVISOR_LATCH divisor_latch;
int j;
half_word timeout;
sys_addr timeout_location;
/* clear com/lpt idle flag */
IDLE_comlpt ();
setIF(1);
/*
* Which adapter?
*/
switch (getDX ())
{
case 0:
port = RS232_COM1_PORT_START;
timeout_location = RS232_COM1_TIMEOUT;
break;
case 1:
port = RS232_COM2_PORT_START;
timeout_location = RS232_COM2_TIMEOUT;
break;
case 2:
port = RS232_COM3_PORT_START;
timeout_location = RS232_COM3_TIMEOUT;
break;
case 3:
port = RS232_COM4_PORT_START;
timeout_location = RS232_COM4_TIMEOUT;
break;
default:
break;
}
/*
* Determine function
*/
switch (getAH ())
{
case 0:
/*
* Initialise the communication port
*/
value = 0x80; /* set DLAB */
outb(port + (io_addr) RS232_LCR, value);
/*
* Set baud rate
*/
parameters.all = getAL();
divisor_latch.all = divisors[parameters.bit.baud_rate];
outb(port + (io_addr) RS232_IER, divisor_latch.byte.MSByte);
outb(port + (io_addr) RS232_TX_RX, divisor_latch.byte.LSByte);
/*
* Set word length, stop bits and parity
*/
parameters.bit.baud_rate = 0;
outb(port + (io_addr) RS232_LCR, parameters.all);
/*
* Disable interrupts
*/
value = 0;
outb(port + (io_addr) RS232_IER, value);
return_status();
break;
case 1:
/*
* Send char over the comms line
*/
/*
* Set DTR and RTS
*/
outb(port + (io_addr) RS232_MCR, 3);
/*
* Real BIOS checks CTS and DSR - we know DSR ok.
* Real BIOS check THRE - we know it's ok.
* We only check CTS - this is supported on a few ports, eg. Macintosh.
*/
/*
* Wait for CTS to go high, or timeout
*/
sas_load(timeout_location, &timeout);
for ( j = 0; j < timeout; j++)
{
inb(port + (io_addr) RS232_MSR, &value);
if(value & 0x10)break; /* CTS High, all is well */
}
if(j < timeout)
{
outb(port + (io_addr) RS232_TX_RX, getAL()); /* Send byte */
inb(port + (io_addr) RS232_LSR, &value);
setAH(value); /* Return Line Status Reg in AH */
}
else
{
setAH(value | 0x80); /* Indicate time out */
}
break;
case 2:
/*
* Receive char over the comms line
*/
/*
* Set DTR
*/
value = 1;
outb(port + (io_addr) RS232_MCR, value);
/*
* Real BIOS checks DSR - we know it's ok.
*/
/*
* Wait for data to appear, or timeout(just an empirical guess)
*/
sas_load(timeout_location, &timeout);
for ( j = 0; j < timeout; j++)
{
inb(port + (io_addr) RS232_LSR, &value);
if ( (value & 1) == 1 )
{
/*
* Data ready go read it
*/
value &= 0x1e; /* keep error bits only */
setAH(value);
inb(port + (io_addr) RS232_TX_RX, &value);
setAL(value);
return;
}
}
/*
* Set timeout
*/
value |= 0x80;
setAH(value);
break;
case 3:
/*
* Return the communication port status
*/
return_status();
break;
case 4:
/*
* EXTENDED (PS/2) Initialise the communication port
*/
value = 0x80; /* set DLAB */
outb(port + (io_addr) RS232_LCR, value);
parameters.bit.word_length = getCH();
parameters.bit.stop_bit = getBL();
parameters.bit.parity = getBH();
parameters.bit.baud_rate = getCL();
/*
Set baud rate
*/
divisor_latch.all = divisors[parameters.bit.baud_rate];
outb(port + (io_addr) RS232_IER, divisor_latch.byte.MSByte);
outb(port + (io_addr) RS232_TX_RX, divisor_latch.byte.LSByte);
/*
* Set word length, stop bits and parity
*/
parameters.bit.baud_rate = 0;
outb(port + (io_addr) RS232_LCR, parameters.all);
/*
* Disable interrupts
*/
value = 0;
outb(port + (io_addr) RS232_IER, value);
return_status();
break;
case 5: /* EXTENDED Comms Port Control */
switch( getAL() )
{
case 0: /* Read modem control register */
inb( port + (io_addr) RS232_MCR, &value);
setBL(value);
break;
case 1: /* Write modem control register */
outb( port + (io_addr) RS232_MCR, getBL());
break;
}
/*
Return the communication port status
*/
return_status();
break;
default:
/*
** Yes both XT and AT BIOS's really do this.
*/
setAH( getAH()-3 );
break;
}
}
