/** switch fields order before the next lcdc frame start
* coming */
static void iep_switch_fields_order(void)
{
void *pbase = (void*)iep_drvdata1->iep_base;
int mode = iep_get_deinterlace_mode(pbase);
struct fb_info *fb;
switch (mode) {
case dein_mode_I4O1B:
iep_set_deinterlace_mode(dein_mode_I4O1T, pbase);
break;
case dein_mode_I4O1T:
iep_set_deinterlace_mode(dein_mode_I4O1B, pbase);
break;
case dein_mode_I2O1B:
iep_set_deinterlace_mode(dein_mode_I2O1T, pbase);
break;
case dein_mode_I2O1T:
iep_set_deinterlace_mode(dein_mode_I2O1B, pbase);
break;
default:
;
}
fb = rk_get_fb(1);
rk_direct_fb_show(fb);
//iep_switch_input_address(pbase);
}
_mali_osk_errcode_t mali_mem_validation_add_range(u32 start, u32 size_para)
{
/* Check that no other MEM_VALIDATION resources exist */
struct fb_info *fb = rk_get_fb(0);
u32 base = (fb->fix).smem_start;
u32 size = (fb->fix).smem_len;
if (MALI_INVALID_MEM_ADDR != mali_mem_validator.phys_base) {
MALI_PRINT_ERROR(("Failed to add frame buffer memory; another range is already specified\n"));
return _MALI_OSK_ERR_FAULT;
}
/* Check restrictions on page alignment */
if ((0 != (base & (~_MALI_OSK_CPU_PAGE_MASK))) ||
(0 != (size & (~_MALI_OSK_CPU_PAGE_MASK)))) {
MALI_PRINT_ERROR(("Failed to add frame buffer memory; incorrect alignment\n"));
return _MALI_OSK_ERR_FAULT;
}
mali_mem_validator.phys_base = base;
mali_mem_validator.size = size;
MALI_DEBUG_PRINT(2, ("Memory Validator installed for Mali physical address base=0x%08X, size=0x%08X\n",
mali_mem_validator.phys_base, mali_mem_validator.size));
return _MALI_OSK_ERR_OK;
}
static void iep_config_lcdc(struct iep_reg *reg)
{
struct fb_info *fb;
int fbi = 0;
int fmt = 0;
fbi = reg->layer == 0 ? 0 : 1;
rk_fb_dpi_win_sel(fbi);
fb = rk_get_fb(fbi);
#if 1
switch (reg->format) {
case IEP_FORMAT_ARGB_8888:
case IEP_FORMAT_ABGR_8888:
fmt = HAL_PIXEL_FORMAT_RGBA_8888;
fb->var.bits_per_pixel = 32;
fb->var.red.length = 8;
fb->var.red.offset = 16;
fb->var.red.msb_right = 0;
fb->var.green.length = 8;
fb->var.green.offset = 8;
fb->var.green.msb_right = 0;
fb->var.blue.length = 8;
fb->var.blue.offset = 0;
fb->var.blue.msb_right = 0;
fb->var.transp.length = 8;
fb->var.transp.offset = 24;
fb->var.transp.msb_right = 0;
break;
case IEP_FORMAT_BGRA_8888:
fmt = HAL_PIXEL_FORMAT_BGRA_8888;
fb->var.bits_per_pixel = 32;
break;
case IEP_FORMAT_RGB_565:
fmt = HAL_PIXEL_FORMAT_RGB_565;
fb->var.bits_per_pixel = 16;
fb->var.red.length = 5;
fb->var.red.offset = 11;
fb->var.red.msb_right = 0;
fb->var.green.length = 6;
fb->var.green.offset = 5;
fb->var.green.msb_right = 0;
fb->var.blue.length = 5;
fb->var.blue.offset = 0;
fb->var.blue.msb_right = 0;
break;
case IEP_FORMAT_YCbCr_422_SP:
fmt = HAL_PIXEL_FORMAT_YCbCr_422_SP;
fb->var.bits_per_pixel = 16;
break;
case IEP_FORMAT_YCbCr_420_SP:
fmt = HAL_PIXEL_FORMAT_YCrCb_NV12;
fb->var.bits_per_pixel = 16;
break;
case IEP_FORMAT_YCbCr_422_P:
case IEP_FORMAT_YCrCb_422_SP:
case IEP_FORMAT_YCrCb_422_P:
case IEP_FORMAT_YCrCb_420_SP:
case IEP_FORMAT_YCbCr_420_P:
case IEP_FORMAT_YCrCb_420_P:
case IEP_FORMAT_RGBA_8888:
case IEP_FORMAT_BGR_565:
// unsupported format
IEP_ERR("unsupported format %d\n", reg->format);
break;
default:
;
}
fb->var.xoffset = 0;
fb->var.yoffset = 0;
fb->var.xres = reg->act_width;
fb->var.yres = reg->act_height;
fb->var.xres_virtual = reg->act_width;
fb->var.yres_virtual = reg->act_height;
fb->var.nonstd = ((reg->off_y&0xFFF)<<20) + ((reg->off_x&0xFFF)<<8) + (fmt&0xFF);
fb->var.grayscale = ((reg->vir_height&0xFFF)<<20) + ((reg->vir_width&0xFFF)<<8) + 0; //win0 xsize & ysize
#endif
rk_direct_fb_show(fb);
}
