void rk_display_init(device_t dev, u32 lcdbase,
unsigned long fb_size)
{
struct edid edid;
struct soc_rockchip_rk3288_config *conf = dev->chip_info;
uint32_t lower = ALIGN_DOWN(lcdbase, MiB);
uint32_t upper = ALIGN_UP(lcdbase + fb_size, MiB);
enum vop_modes detected_mode = VOP_MODE_UNKNOWN;
printk(BIOS_SPEW, "LCD framebuffer @%p\n", (void *)(lcdbase));
memset((void *)lcdbase, 0, fb_size); /* clear the framebuffer */
dcache_clean_invalidate_by_mva((void *)lower, upper - lower);
mmu_config_range(lower / MiB, (upper - lower) / MiB, DCACHE_OFF);
switch (conf->vop_mode) {
case VOP_MODE_NONE:
return;
case VOP_MODE_AUTO_DETECT:
/* try EDP first, then HDMI */
case VOP_MODE_EDP:
printk(BIOS_DEBUG, "Attempting to setup EDP display.\n");
rkclk_configure_edp();
rkclk_configure_vop_aclk(conf->vop_id, 192 * MHz);
rk_edp_init(conf->vop_id);
if (rk_edp_get_edid(&edid) == 0) {
detected_mode = VOP_MODE_EDP;
break;
} else {
printk(BIOS_WARNING, "Cannot get EDID from EDP.\n");
if (conf->vop_mode == VOP_MODE_EDP)
return;
}
/* fall thru */
case VOP_MODE_HDMI:
printk(BIOS_DEBUG, "Attempting to setup HDMI display.\n");
rkclk_configure_hdmi();
rkclk_configure_vop_aclk(conf->vop_id, 384 * MHz);
rk_hdmi_init(conf->vop_id);
if (rk_hdmi_get_edid(&edid) == 0) {
detected_mode = VOP_MODE_HDMI;
break;
} else {
printk(BIOS_WARNING, "Cannot get EDID from HDMI.\n");
if (conf->vop_mode == VOP_MODE_HDMI)
return;
}
/* fall thru */
default:
printk(BIOS_WARNING, "Cannot read any edid info, aborting.\n");
return;
}
if (rkclk_configure_vop_dclk(conf->vop_id, edid.pixel_clock * KHz)) {
printk(BIOS_WARNING, "config vop err\n");
return;
}
edid.framebuffer_bits_per_pixel = conf->framebuffer_bits_per_pixel;
edid.bytes_per_line = edid.ha * conf->framebuffer_bits_per_pixel / 8;
edid.x_resolution = edid.ha;
edid.y_resolution = edid.va;
rkvop_mode_set(conf->vop_id, &edid, detected_mode);
rkvop_enable(conf->vop_id, lcdbase, &edid);
switch (detected_mode) {
case VOP_MODE_HDMI:
if (rk_hdmi_enable(&edid)) {
printk(BIOS_WARNING, "hdmi enable err\n");
return;
}
/*
* HACK: if we do remove this delay, HDMI TV may not show
* anythings. So we make an delay here, ensure TV have
* enough time to respond.
*/
mdelay(2000);
break;
case VOP_MODE_EDP:
default:
if (rk_edp_enable()) {
printk(BIOS_WARNING, "edp enable err\n");
return;
}
mainboard_power_on_backlight();
break;
}
set_vbe_mode_info_valid(&edid, (uintptr_t)lcdbase);
}
/**
* rk_display_init() - Try to enable the given display device
*
* This function performs many steps:
* - Finds the display device being referenced by @ep_node
* - Puts the VOP's ID into its uclass platform data
* - Probes the device to set it up
* - Reads the EDID timing information
* - Sets up the VOP clocks, etc. for the selected pixel clock and display mode
* - Enables the display (the display device handles this and will do different
* things depending on the display type)
* - Tells the uclass about the display resolution so that the console will
* appear correctly
*
* @dev: VOP device that we want to connect to the display
* @fbbase: Frame buffer address
* @l2bpp Log2 of bits-per-pixels for the display
* @ep_node: Device tree node to process - this is the offset of an endpoint
* node within the VOP's 'port' list.
* @return 0 if OK, -ve if something went wrong
*/
int rk_display_init(struct udevice *dev, ulong fbbase,
enum video_log2_bpp l2bpp, int ep_node)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
const void *blob = gd->fdt_blob;
struct rk_vop_priv *priv = dev_get_priv(dev);
int vop_id, remote_vop_id;
struct rk3288_vop *regs = priv->regs;
struct display_timing timing;
struct udevice *disp;
int ret, remote, i, offset;
struct display_plat *disp_uc_plat;
struct udevice *clk;
vop_id = fdtdec_get_int(blob, ep_node, "reg", -1);
debug("vop_id=%d\n", vop_id);
remote = fdtdec_lookup_phandle(blob, ep_node, "remote-endpoint");
if (remote < 0)
return -EINVAL;
remote_vop_id = fdtdec_get_int(blob, remote, "reg", -1);
debug("remote vop_id=%d\n", remote_vop_id);
for (i = 0, offset = remote; i < 3 && offset > 0; i++)
offset = fdt_parent_offset(blob, offset);
if (offset < 0) {
debug("%s: Invalid remote-endpoint position\n", dev->name);
return -EINVAL;
}
ret = uclass_find_device_by_of_offset(UCLASS_DISPLAY, offset, &disp);
if (ret) {
debug("%s: device '%s' display not found (ret=%d)\n", __func__,
dev->name, ret);
return ret;
}
disp_uc_plat = dev_get_uclass_platdata(disp);
debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat);
disp_uc_plat->source_id = remote_vop_id;
disp_uc_plat->src_dev = dev;
ret = device_probe(disp);
if (ret) {
debug("%s: device '%s' display won't probe (ret=%d)\n",
__func__, dev->name, ret);
return ret;
}
ret = display_read_timing(disp, &timing);
if (ret) {
debug("%s: Failed to read timings\n", __func__);
return ret;
}
ret = rkclk_get_clk(CLK_NEW, &clk);
if (!ret) {
ret = clk_set_periph_rate(clk, DCLK_VOP0 + remote_vop_id,
timing.pixelclock.typ);
}
if (ret) {
debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret);
return ret;
}
rkvop_mode_set(regs, &timing, vop_id);
rkvop_enable(regs, fbbase, 1 << l2bpp, &timing);
ret = display_enable(disp, 1 << l2bpp, &timing);
if (ret)
return ret;
uc_priv->xsize = timing.hactive.typ;
uc_priv->ysize = timing.vactive.typ;
uc_priv->bpix = l2bpp;
debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize);
return 0;
}
