int init_module(void)
{
rtf_create_using_bh(CMDF, 4, 0);
rt_mount_rtai();
rt_request_timer(rt_timer_tick, imuldiv(TICK, FREQ_8254, 1000000000), 0);
return 0;
}
int init_module(void)
{
rt_assign_irq_to_cpu(0, 0);
rtf_create(CMDF, 10000);
if (Mode) {
rt_typed_sem_init(&sem, 0, SEM_TYPE);
}
rt_task_init_cpuid(&thread, intr_handler, 0, STACK_SIZE, 0, 0, 0, 0);
rt_task_resume(&thread);
#ifdef IRQEXT
rt_request_timer((void *)rt_timer_tick_ext, imuldiv(TICK, FREQ_8254, 1000000000), 0);
rt_set_global_irq_ext(0, 1, 0);
#else
rt_request_timer((void *)rt_timer_tick, imuldiv(TICK, FREQ_8254, 1000000000), 0);
#endif
SETUP_8254_TSC_EMULATION;
return 0;
}
int init_module(void)
{
RESET_COUNT = SECS*100;
rt_mount_rtai();
rt_assign_irq_to_cpu(TIMER_8254_IRQ, 1 << hard_cpu_id());
rt_request_timer(just_ret, COUNT, 1);
rt_request_global_irq(TIMER_8254_IRQ, calibrate);
printk("\n->>> HERE WE GO (PRINTING EVERY %d SECONDS, 'make stop' to end calibrating) <<<-\n\n", RESET_COUNT/100);
return 0;
}
int init_module(void)
{
tasknode = ddn2nl(TaskNode);
rt_mbx_init(&mbx, 1);
rt_register(nam2num("HDLMBX"), &mbx, IS_MBX, 0);
rt_task_init(&sup_task, sup_fun, 0, 2000, 1, 0, 0);
rt_task_resume(&sup_task);
rt_request_timer(timer_tick, imuldiv(PERIOD, FREQ_8254, 1000000000), 0);
return 0;
}
int init_module(void)
{
rt_request_timer(rt_timer_tick, imuldiv(TICK, FREQ_8254, 1000000000), 0);
return 0;
}
static long long user_srq(unsigned long whatever)
{
extern int calibrate_8254(void);
unsigned long args[MAXARGS];
int ret;
ret = copy_from_user(args, (unsigned long *)whatever, MAXARGS*sizeof(unsigned long));
switch (args[0]) {
case CAL_8254: {
return calibrate_8254();
break;
}
case KTHREADS:
case KLATENCY: {
rt_set_oneshot_mode();
period = start_rt_timer(nano2count(args[1]));
if (args[0] == KLATENCY) {
rt_task_init_cpuid(&rtask, spv, args[2], STACKSIZE, 0, 0, 0, hard_cpu_id());
} else {
// rt_kthread_init_cpuid(&rtask, spv, args[2], STACKSIZE, 0, 0, 0, hard_cpu_id());
}
expected = rt_get_time() + 100*period;
rt_task_make_periodic(&rtask, expected, period);
break;
}
case END_KLATENCY: {
stop_rt_timer();
rt_task_delete(&rtask);
break;
}
case FREQ_CAL: {
times.intrs = -1;
reset_count = args[1]*HZ;
count = 0;
rt_assign_irq_to_cpu(TIMER_8254_IRQ, 1 << hard_cpu_id());
rt_request_timer(just_ret, COUNT, 1);
rt_request_global_irq(TIMER_8254_IRQ, calibrate);
break;
}
case END_FREQ_CAL: {
rt_free_timer();
rt_reset_irq_to_sym_mode(TIMER_8254_IRQ);
rt_free_global_irq(TIMER_8254_IRQ);
break;
}
case BUS_CHECK: {
loops = maxj = 0;
bus_period = imuldiv(args[1], CPU_FREQ, 1000000000);
bus_threshold = imuldiv(args[2], CPU_FREQ, 1000000000);
use_parport = args[3];
rt_assign_irq_to_cpu(TIMER_8254_IRQ, 1 << hard_cpu_id());
rt_request_timer((void *)rt_timer_tick_ext, imuldiv(args[1], FREQ_8254, 1000000000), 0);
rt_set_global_irq_ext(TIMER_8254_IRQ, 1, 0);
break;
}
case END_BUS_CHECK: {
rt_free_timer();
rt_reset_irq_to_sym_mode(TIMER_8254_IRQ);
break;
}
case GET_PARAMS: {
rtf_put(0, ¶ms, sizeof(params));
break;
}
}
return 0;
}