static int __init rtcan_mscan_init_one(int idx, unsigned long addr, int irq)
{
struct rtcan_device *dev;
int ret;
dev = rtcan_dev_alloc(0, 0);
if (dev == NULL)
return -ENOMEM;
dev->base_addr = (unsigned long)ioremap(addr, MSCAN_SIZE);
if (dev->base_addr == 0) {
ret = -ENOMEM;
printk("ERROR! ioremap of %#lx failed\n", addr);
goto out_dev_free;
}
dev->ctrl_name = mscan_ctlr_name;
dev->board_name = mscan_board_name;
dev->can_sys_clock = mscan_clock;
ret = rtcan_mscan_register(dev, irq, 1);
if (ret)
goto out_iounmap;
/* Remember initialized devices */
rtcan_mscan_devs[idx] = dev;
printk("%s: %s driver: MSCAN port %d, base-addr 0x%lx, irq %d\n",
dev->name, RTCAN_DRV_NAME, idx + 1, addr, irq);
return 0;
out_iounmap:
iounmap((void *)dev->base_addr);
out_dev_free:
rtcan_dev_free(dev);
return ret;
}
static int rtcan_ems_pci_add_chan(struct pci_dev *pdev, int channel,
struct rtcan_device **master_dev)
{
struct rtcan_device *dev;
struct rtcan_sja1000 *chip;
struct rtcan_ems_pci *board;
unsigned long addr;
int err, init_step = 1;
dev = rtcan_dev_alloc(sizeof(struct rtcan_sja1000),
sizeof(struct rtcan_ems_pci));
if (dev == NULL)
return -ENOMEM;
init_step = 2;
chip = (struct rtcan_sja1000 *)dev->priv;
board = (struct rtcan_ems_pci *)dev->board_priv;
board->pci_dev = pdev;
board->channel = channel;
if (channel != EMS_PCI_SLAVE) {
addr = pci_resource_start(pdev, 0);
board->conf_addr = ioremap(addr, EMS_PCI_CONF_SIZE);
if (board->conf_addr == 0) {
err = -ENODEV;
goto failure;
}
init_step = 3;
/* Configure PITA-2 parallel interface */
writel(PITA2_MISC_CONFIG, board->conf_addr + PITA2_MISC);
/* Enable interrupts from card */
writel(PITA2_ICR_INT0_EN, board->conf_addr + PITA2_ICR);
} else {
struct rtcan_ems_pci *master_board =
(struct rtcan_ems_pci *)(*master_dev)->board_priv;
master_board->slave_dev = dev;
board->conf_addr = master_board->conf_addr;
}
addr = pci_resource_start(pdev, 1) + EMS_PCI_PORT_START;
if (channel == EMS_PCI_SLAVE)
addr += EMS_PCI_PORT_SIZE;
board->base_addr = ioremap(addr, EMS_PCI_PORT_SIZE);
if (board->base_addr == 0) {
err = -ENODEV;
goto failure;
}
init_step = 4;
dev->board_name = ems_pci_board_name;
chip->read_reg = rtcan_ems_pci_read_reg;
chip->write_reg = rtcan_ems_pci_write_reg;
chip->irq_ack = rtcan_ems_pci_irq_ack;
/* Clock frequency in Hz */
dev->can_sys_clock = EMS_PCI_CAN_SYS_CLOCK;
/* Output control register */
chip->ocr = EMS_PCI_OCR_STD;
/* Clock divider register */
if (channel == EMS_PCI_MASTER)
chip->cdr = EMS_PCI_CDR_MASTER;
else
chip->cdr = EMS_PCI_CDR_SLAVE;
strncpy(dev->name, RTCAN_DEV_NAME, IFNAMSIZ);
/* Register and setup interrupt handling */
chip->irq_flags = RTDM_IRQTYPE_SHARED;
chip->irq_num = pdev->irq;
init_step = 5;
printk("%s: base_addr=%p conf_addr=%p irq=%d\n", RTCAN_DRV_NAME,
board->base_addr, board->conf_addr, chip->irq_num);
/* Register SJA1000 device */
err = rtcan_sja1000_register(dev);
if (err) {
printk(KERN_ERR
"ERROR %d while trying to register SJA1000 device!\n",
err);
goto failure;
}
if (channel != EMS_PCI_SLAVE)
*master_dev = dev;
return 0;
failure:
rtcan_ems_pci_del_chan(dev, init_step);
return err;
}
static int rtcan_peak_pci_add_chan(struct pci_dev *pdev, int channel,
struct rtcan_device **master_dev)
{
struct rtcan_device *dev;
struct rtcan_sja1000 *chip;
struct rtcan_peak_pci *board;
u16 pita_icr_high;
unsigned long addr;
int ret, init_step = 1;
dev = rtcan_dev_alloc(sizeof(struct rtcan_sja1000),
sizeof(struct rtcan_peak_pci));
if (dev == NULL)
return -ENOMEM;
init_step = 2;
chip = (struct rtcan_sja1000 *)dev->priv;
board = (struct rtcan_peak_pci *)dev->board_priv;
board->pci_dev = pdev;
board->channel = channel;
if (channel != CHANNEL_SLAVE) {
addr = pci_resource_start(pdev, 0);
board->conf_addr = ioremap(addr, PCI_CONFIG_PORT_SIZE);
if (board->conf_addr == 0) {
ret = -ENODEV;
goto failure;
}
init_step = 3;
/* Set GPIO control register */
writew(0x0005, board->conf_addr + PITA_GPIOICR + 2);
if (channel == CHANNEL_MASTER)
writeb(0x00, board->conf_addr + PITA_GPIOICR); /* enable both */
else
writeb(0x04, board->conf_addr + PITA_GPIOICR); /* enable single */
writeb(0x05, board->conf_addr + PITA_MISC + 3); /* toggle reset */
mdelay(5);
writeb(0x04, board->conf_addr + PITA_MISC + 3); /* leave parport mux mode */
} else {
struct rtcan_peak_pci *master_board =
(struct rtcan_peak_pci *)(*master_dev)->board_priv;
master_board->slave_dev = dev;
board->conf_addr = master_board->conf_addr;
}
addr = pci_resource_start(pdev, 1);
if (channel == CHANNEL_SLAVE)
addr += 0x400;
board->base_addr = ioremap(addr, PCI_PORT_SIZE);
if (board->base_addr == 0) {
ret = -ENODEV;
goto failure;
}
init_step = 4;
dev->board_name = peak_pci_board_name;
chip->read_reg = rtcan_peak_pci_read_reg;
chip->write_reg = rtcan_peak_pci_write_reg;
chip->irq_ack = rtcan_peak_pci_irq_ack;
/* Clock frequency in Hz */
dev->can_sys_clock = PEAK_PCI_CAN_SYS_CLOCK;
/* Output control register */
chip->ocr = SJA_OCR_MODE_NORMAL | SJA_OCR_TX0_PUSHPULL;
/* Clock divider register */
if (channel == CHANNEL_MASTER)
chip->cdr = PELICAN_MASTER;
else
chip->cdr = PELICAN_SINGLE;
strncpy(dev->name, RTCAN_DEV_NAME, IFNAMSIZ);
/* Register and setup interrupt handling */
chip->irq_flags = RTDM_IRQTYPE_SHARED;
chip->irq_num = pdev->irq;
pita_icr_high = readw(board->conf_addr + PITA_ICR + 2);
if (channel == CHANNEL_SLAVE) {
pita_icr_high |= 0x0001;
} else {
pita_icr_high |= 0x0002;
}
writew(pita_icr_high, board->conf_addr + PITA_ICR + 2);
init_step = 5;
printk("%s: base_addr=%p conf_addr=%p irq=%d\n", RTCAN_DRV_NAME,
board->base_addr, board->conf_addr, chip->irq_num);
/* Register SJA1000 device */
ret = rtcan_sja1000_register(dev);
if (ret) {
printk(KERN_ERR
"ERROR %d while trying to register SJA1000 device!\n", ret);
goto failure;
}
if (channel != CHANNEL_SLAVE)
*master_dev = dev;
return 0;
failure:
rtcan_peak_pci_del_chan(dev, init_step);
return ret;
}
int __init rtcan_isa_init_one(int idx)
{
struct rtcan_device *dev;
struct rtcan_sja1000 *chip;
struct rtcan_isa *board;
int ret;
if ((dev = rtcan_dev_alloc(sizeof(struct rtcan_sja1000),
sizeof(struct rtcan_isa))) == NULL)
return -ENOMEM;
chip = (struct rtcan_sja1000 *)dev->priv;
board = (struct rtcan_isa *)dev->board_priv;
dev->board_name = isa_board_name;
board->io = io[idx];
chip->irq_num = irq[idx];
chip->irq_flags = RTDM_IRQTYPE_SHARED | RTDM_IRQTYPE_EDGE;
chip->read_reg = rtcan_isa_readreg;
chip->write_reg = rtcan_isa_writereg;
/* Check and request I/O ports */
if (!request_region(board->io, RTCAN_ISA_PORT_SIZE, RTCAN_DRV_NAME)) {
ret = -EBUSY;
goto out_dev_free;
}
/* Clock frequency in Hz */
if (can_clock[idx])
dev->can_sys_clock = can_clock[idx] / 2;
else
dev->can_sys_clock = 8000000; /* 16/2 MHz */
/* Output control register */
if (ocr[idx])
chip->ocr = ocr[idx];
else
chip->ocr = SJA_OCR_MODE_NORMAL | SJA_OCR_TX0_PUSHPULL;
if (cdr[idx])
chip->cdr = cdr[idx];
else
chip->cdr = SJA_CDR_CAN_MODE | SJA_CDR_CLK_OFF | SJA_CDR_CBP;
strncpy(dev->name, RTCAN_DEV_NAME, IFNAMSIZ);
ret = rtcan_sja1000_register(dev);
if (ret) {
printk(KERN_ERR "ERROR %d while trying to register SJA1000 "
"device!\n", ret);
goto out_free_region;
}
rtcan_isa_devs[idx] = dev;
return 0;
out_free_region:
release_region(board->io, RTCAN_ISA_PORT_SIZE);
out_dev_free:
rtcan_dev_free(dev);
return ret;
}
/** Init module */
int __init rtcan_peak_dng_init_one(int idx)
{
int ret, dtype;
struct rtcan_device *dev;
struct rtcan_sja1000 *sja;
struct rtcan_peak_dng *dng;
if (strncmp(type[idx], "sp", 2) == 0)
dtype = DONGLE_TYPE_SP;
else if (strncmp(type[idx], "epp", 3) == 0)
dtype = DONGLE_TYPE_EPP;
else {
printk("%s: type %s is invalid, use \"sp\" or \"epp\".",
RTCAN_DRV_NAME, type[idx]);
return -EINVAL;
}
if ((dev = rtcan_dev_alloc(sizeof(struct rtcan_sja1000),
sizeof(struct rtcan_peak_dng))) == NULL)
return -ENOMEM;
sja = (struct rtcan_sja1000 *)dev->priv;
dng = (struct rtcan_peak_dng *)dev->board_priv;
dev->board_name = dongle_board_name;
if (io[idx])
dng->ioport = io[idx];
else
dng->ioport = dng_ports[idx];
if (irq[idx])
sja->irq_num = irq[idx];
else
sja->irq_num = dng_irqs[idx];
sja->irq_flags = 0;
if (dtype == DONGLE_TYPE_SP) {
sja->read_reg = rtcan_peak_dng_sp_readreg;
sja->write_reg = rtcan_peak_dng_writereg;
dng->ecr = 0; /* set to anything */
} else {
sja->read_reg = rtcan_peak_dng_epp_readreg;
sja->write_reg = rtcan_peak_dng_writereg;
dng->ecr = dng->ioport + 0x402;
}
/* Check and request I/O ports */
if (!request_region(dng->ioport, DNG_PORT_SIZE, RTCAN_DRV_NAME)) {
ret = -EBUSY;
goto out_dev_free;
}
if (dng->type == DONGLE_TYPE_EPP) {
if (!request_region(dng->ecr, ECR_PORT_SIZE, RTCAN_DRV_NAME)) {
ret = -EBUSY;
goto out_free_region;
}
}
/* Clock frequency in Hz */
dev->can_sys_clock = 8000000; /* 16/2 MHz */
/* Output control register */
sja->ocr = SJA_OCR_MODE_NORMAL | SJA_OCR_TX0_PUSHPULL;
sja->cdr = SJA_CDR_CAN_MODE;
strncpy(dev->name, RTCAN_DEV_NAME, IFNAMSIZ);
rtcan_peak_dng_enable(dev);
/* Register RTDM device */
ret = rtcan_sja1000_register(dev);
if (ret) {
printk(KERN_ERR "ERROR while trying to register SJA1000 device %d!\n",
ret);
goto out_free_region2;
}
rtcan_peak_dng_devs[idx] = dev;
return 0;
out_free_region2:
if (dng->type == DONGLE_TYPE_EPP)
release_region(dng->ecr, ECR_PORT_SIZE);
out_free_region:
release_region(dng->ioport, DNG_PORT_SIZE);
out_dev_free:
rtcan_dev_free(dev);
return ret;
}
static int rtcan_adv_pci_add_chan(struct pci_dev *pdev,
int channel,
unsigned int bar,
unsigned int offset,
struct rtcan_device **master_dev)
{
struct rtcan_device *dev;
struct rtcan_sja1000 *chip;
struct rtcan_adv_pci *board;
void __iomem *base_addr;
int ret;
dev = rtcan_dev_alloc(sizeof(struct rtcan_sja1000),
sizeof(struct rtcan_adv_pci));
if (dev == NULL)
return -ENOMEM;
chip = (struct rtcan_sja1000 *)dev->priv;
board = (struct rtcan_adv_pci *)dev->board_priv;
if (channel == CHANNEL_SLAVE) {
struct rtcan_adv_pci *master_board =
(struct rtcan_adv_pci *)(*master_dev)->board_priv;
master_board->slave_dev = dev;
if (offset)
base_addr = master_board->base_addr+offset;
else
base_addr = pci_iomap(pdev, bar, ADV_PCI_BASE_SIZE);
if (!base_addr) {
ret = -EIO;
goto failure;
}
} else {
base_addr = pci_iomap(pdev, bar, ADV_PCI_BASE_SIZE) + offset;
if (!base_addr) {
ret = -EIO;
goto failure;
}
}
board->pci_dev = pdev;
board->conf_addr = NULL;
board->base_addr = base_addr;
dev->board_name = adv_pci_board_name;
chip->read_reg = rtcan_adv_pci_read_reg;
chip->write_reg = rtcan_adv_pci_write_reg;
/* Clock frequency in Hz */
dev->can_sys_clock = ADV_PCI_CAN_CLOCK;
/* Output control register */
chip->ocr = ADV_PCI_OCR;
/* Clock divider register */
chip->cdr = ADV_PCI_CDR;
strncpy(dev->name, RTCAN_DEV_NAME, IFNAMSIZ);
/* Make sure SJA1000 is in reset mode */
chip->write_reg(dev, SJA_MOD, SJA_MOD_RM);
/* Set PeliCAN mode */
chip->write_reg(dev, SJA_CDR, SJA_CDR_CAN_MODE);
/* check if mode is set */
ret = chip->read_reg(dev, SJA_CDR);
if (ret != SJA_CDR_CAN_MODE) {
ret = -EIO;
goto failure_iounmap;
}
/* Register and setup interrupt handling */
chip->irq_flags = RTDM_IRQTYPE_SHARED;
chip->irq_num = pdev->irq;
RTCAN_DBG("%s: base_addr=%p conf_addr=%p irq=%d ocr=%#x cdr=%#x\n",
RTCAN_DRV_NAME, board->base_addr, board->conf_addr,
chip->irq_num, chip->ocr, chip->cdr);
/* Register SJA1000 device */
ret = rtcan_sja1000_register(dev);
if (ret) {
printk(KERN_ERR "ERROR %d while trying to register SJA1000 device!\n",
ret);
goto failure_iounmap;
}
if (channel != CHANNEL_SLAVE)
*master_dev = dev;
return 0;
failure_iounmap:
if (channel != CHANNEL_SLAVE || !offset)
pci_iounmap(pdev, base_addr);
failure:
rtcan_dev_free(dev);
return ret;
}
static int rtcan_ixxat_pci_add_chan(struct pci_dev *pdev,
int channel,
struct rtcan_device **master_dev,
int conf_addr,
void __iomem *base_addr)
{
struct rtcan_device *dev;
struct rtcan_sja1000 *chip;
struct rtcan_ixxat_pci *board;
u8 intcsr;
int ret;
dev = rtcan_dev_alloc(sizeof(struct rtcan_sja1000),
sizeof(struct rtcan_ixxat_pci));
if (dev == NULL)
return -ENOMEM;
chip = (struct rtcan_sja1000 *)dev->priv;
board = (struct rtcan_ixxat_pci *)dev->board_priv;
board->pci_dev = pdev;
board->conf_addr = conf_addr;
board->base_addr = base_addr;
if (channel == CHANNEL_SLAVE) {
struct rtcan_ixxat_pci *master_board =
(struct rtcan_ixxat_pci *)(*master_dev)->board_priv;
master_board->slave_dev = dev;
}
dev->board_name = ixxat_pci_board_name;
chip->read_reg = rtcan_ixxat_pci_read_reg;
chip->write_reg = rtcan_ixxat_pci_write_reg;
/* Clock frequency in Hz */
dev->can_sys_clock = IXXAT_PCI_CAN_SYS_CLOCK;
/* Output control register */
chip->ocr = (SJA_OCR_MODE_NORMAL | SJA_OCR_TX0_INVERT |
SJA_OCR_TX0_PUSHPULL | SJA_OCR_TX1_PUSHPULL);
/* Clock divider register */
chip->cdr = SJA_CDR_CAN_MODE;
strncpy(dev->name, RTCAN_DEV_NAME, IFNAMSIZ);
/* Enable PCI interrupts */
intcsr = inb(board->conf_addr + IXXAT_INTCSR_OFFSET);
if (channel == CHANNEL_SLAVE)
intcsr |= IXXAT_INTCSR_SLAVE;
else
intcsr |= IXXAT_INTCSR_MASTER;
outb(intcsr, board->conf_addr + IXXAT_INTCSR_OFFSET);
/* Register and setup interrupt handling */
chip->irq_flags = RTDM_IRQTYPE_SHARED;
chip->irq_num = pdev->irq;
RTCAN_DBG("%s: base_addr=0x%p conf_addr=%#x irq=%d ocr=%#x cdr=%#x\n",
RTCAN_DRV_NAME, board->base_addr, board->conf_addr,
chip->irq_num, chip->ocr, chip->cdr);
/* Register SJA1000 device */
ret = rtcan_sja1000_register(dev);
if (ret) {
printk(KERN_ERR "ERROR %d while trying to register SJA1000 device!\n",
ret);
goto failure;
}
if (channel != CHANNEL_SLAVE)
*master_dev = dev;
return 0;
failure:
rtcan_dev_free(dev);
return ret;
}
