int
rw_piot_set_tx_queue_stats_mapping(rw_piot_api_handle_t api_handle, uint16_t tx_queue_id, uint8_t stat_idx)
{
rw_piot_device_t *rw_piot_dev = RWPIOT_GET_DEVICE(api_handle);
int ret;
ASSERT(RWPIOT_VALID_DEVICE(rw_piot_dev));
if (NULL == rw_piot_dev) {
RW_PIOT_LOG(RTE_LOG_ERR, "PIOT Could not find device by handle\n");
return -1;
}
ret = rte_eth_dev_set_tx_queue_stats_mapping(rw_piot_dev->rte_port_id, tx_queue_id, stat_idx);
return(ret);
}
/* Setup ethdev hardware queues */
static int
dpdk_ethdev_queues_setup(struct vr_dpdk_ethdev *ethdev)
{
int ret, i;
uint8_t port_id = ethdev->ethdev_port_id;
struct rte_mempool *mempool;
/* configure RX queues */
RTE_LOG(DEBUG, VROUTER, "%s: nb_rx_queues=%u nb_tx_queues=%u\n",
__func__, (unsigned)ethdev->ethdev_nb_rx_queues,
(unsigned)ethdev->ethdev_nb_tx_queues);
for (i = 0; i < VR_DPDK_MAX_NB_RX_QUEUES; i++) {
if (i < ethdev->ethdev_nb_rss_queues) {
mempool = vr_dpdk.rss_mempool;
ethdev->ethdev_queue_states[i] = VR_DPDK_QUEUE_RSS_STATE;
} else if (i < ethdev->ethdev_nb_rx_queues) {
if (vr_dpdk.nb_free_mempools == 0) {
RTE_LOG(ERR, VROUTER, " error assigning mempool to eth device %"
PRIu8 " RX queue %d\n", port_id, i);
return -ENOMEM;
}
vr_dpdk.nb_free_mempools--;
mempool = vr_dpdk.free_mempools[vr_dpdk.nb_free_mempools];
ethdev->ethdev_queue_states[i] = VR_DPDK_QUEUE_READY_STATE;
} else {
ethdev->ethdev_queue_states[i] = VR_DPDK_QUEUE_NONE;
continue;
}
ret = rte_eth_rx_queue_setup(port_id, i, VR_DPDK_NB_RXD,
SOCKET_ID_ANY, &rx_queue_conf, mempool);
if (ret < 0) {
/* return mempool to the list */
if (mempool != vr_dpdk.rss_mempool)
vr_dpdk.nb_free_mempools++;
RTE_LOG(ERR, VROUTER, " error setting up eth device %" PRIu8 " RX queue %d"
": %s (%d)\n", port_id, i, rte_strerror(-ret), -ret);
return ret;
}
/* map RX queue to stats counter ignoring any errors */
rte_eth_dev_set_rx_queue_stats_mapping(port_id, i, i);
/* save queue mempool pointer */
ethdev->ethdev_mempools[i] = mempool;
}
i = ethdev->ethdev_nb_rx_queues - ethdev->ethdev_nb_rss_queues;
RTE_LOG(INFO, VROUTER, " setup %d RSS queue(s) and %d filtering queue(s)\n",
(int)ethdev->ethdev_nb_rss_queues, i);
/* configure TX queues */
for (i = 0; i < ethdev->ethdev_nb_tx_queues; i++) {
ret = rte_eth_tx_queue_setup(port_id, i, VR_DPDK_NB_TXD,
SOCKET_ID_ANY, &tx_queue_conf);
if (ret < 0) {
RTE_LOG(ERR, VROUTER, " error setting up eth device %" PRIu8 " TX queue %d"
": %s (%d)\n", port_id, i, rte_strerror(-ret), -ret);
return ret;
}
/* map TX queue to stats counter ignoring any errors */
rte_eth_dev_set_tx_queue_stats_mapping(port_id, i, i);
}
return 0;
}
static void udpi_init_ports(void)
{
/* Init NIC ports, then start the ports */
int32_t ret = -1;
uint32_t queue_id = 0;
uint32_t lcore_id = 0;
uint32_t i, j;
/* Init port */
for (j=0; j<udpi.n_ports; j++)
{
RTE_LOG(INFO, PORT, "Initializing NIC port %u ...\n", j);
fflush(stdout);
ret = rte_eth_dev_configure(j, udpi.ports[j].n_queues, udpi.ports[j].n_queues, &udpi.port_conf);
if(0 > ret)
{
rte_panic("Cannot init NIC port %u (%d)\n", j, ret);
}
for (i=0; i<udpi.n_cores; i++)
{
if (udpi.cores[i].core_type != UDPI_CORE_IPV4_RX || udpi.cores[i].port_id != j)
continue;
lcore_id = udpi.cores[i].core_id;
queue_id = udpi.cores[i].id;
ret = rte_eth_rx_queue_setup(j, queue_id, udpi.rsz_hwq_rx,
rte_lcore_to_socket_id(lcore_id), NULL, udpi.pool);
if (0 > ret)
{
rte_panic("Cannot init Rx for port %u with qid %u (%d)\n", j, queue_id, ret);
}
ret = rte_eth_dev_set_rx_queue_stats_mapping(j, queue_id, queue_id);
if (ret < 0)
{
rte_panic("Failed to set tx_queue_stats_mapping of p%u_q%u. error = %d.",
j, queue_id, ret);
}
ret = rte_eth_tx_queue_setup(j, queue_id, udpi.rsz_hwq_tx, rte_lcore_to_socket_id(lcore_id), NULL);
if (0 > ret)
{
rte_panic("Cannot init Tx for port %u with qid %u (%d)\n", j, queue_id, ret);
}
ret = rte_eth_dev_set_tx_queue_stats_mapping(j, queue_id, queue_id);
if (ret < 0)
{
rte_panic("Failed to set tx_queue_stats_mapping of p%u_q%u. error = %d.", j, queue_id, ret);
}
}
/* Start port */
ret = rte_eth_dev_start(j);
if(0 > ret)
{
rte_panic("Cannot start port %u (%d)\n", j, ret);
}
rte_eth_promiscuous_enable(j);
}
udpi_ports_check_link();
return;
}
