VOID
ODM_delay_ms(IN u4Byte ms)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_ms(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_mdelay_os(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
delay_ms(ms);
#endif
}
void
ODM_delay_ms(u32 ms)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP|ODM_ADSL))
delay_ms(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
rtw_mdelay_os(ms);
#elif(DM_ODM_SUPPORT_TYPE & ODM_MP)
delay_ms(ms);
#endif
}
/*
* Return:
* 0: power on successfully
* others: power on failed
*/
int platform_wifi_power_on(void)
{
int ret = 0;
#ifdef CONFIG_RTL8188E
rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_ON);
#endif /* CONFIG_RTL8188E */
/* Pull up pwd pin, make wifi leave power down mode. */
rtw_wifi_gpio_init();
rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON);
#if (MP_DRIVER == 1) && (defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8723B))
/* Pull up BT reset pin. */
rtw_wifi_gpio_wlan_ctrl(WLAN_BT_PWDN_ON);
#endif
rtw_mdelay_os(5);
sdhci_bus_scan();
#ifdef CONFIG_RTL8723B
/* YJ,test,130305 */
rtw_mdelay_os(1000);
#endif
#ifdef ANDROID_2X
rtw_mdelay_os(200);
#else /* !ANDROID_2X */
if (1) {
int i = 0;
for (i = 0; i <= 50; i++) {
msleep(10);
if (sdhci_device_attached())
break;
printk("%s delay times:%d\n", __func__, i);
}
}
#endif /* !ANDROID_2X */
return ret;
}
void platform_wifi_power_off(void)
{
/* Pull down pwd pin, make wifi enter power down mode. */
rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF);
rtw_mdelay_os(5);
rtw_wifi_gpio_deinit();
#ifdef CONFIG_RTL8188E
rtw_wifi_gpio_wlan_ctrl(WLAN_POWER_OFF);
#endif /* CONFIG_RTL8188E */
#ifdef CONFIG_WOWLAN
if (mmc_host)
mmc_host->pm_flags &= ~MMC_PM_KEEP_POWER;
#endif /* CONFIG_WOWLAN */
}
static int _FWFreeToGo(
IN PADAPTER Adapter
)
{
u32 counter = 0;
u32 value32;
// polling CheckSum report
do{
value32 = rtw_read32(Adapter, REG_MCUFWDL);
}while((counter ++ < POLLING_READY_TIMEOUT_COUNT) && (!(value32 & FWDL_ChkSum_rpt)));
if(counter >= POLLING_READY_TIMEOUT_COUNT){
DBG_8192C("chksum report faill ! REG_MCUFWDL:0x%08x .\n",value32);
return _FAIL;
}
//RT_TRACE(COMP_INIT, DBG_LOUD, ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n",value32));
value32 = rtw_read32(Adapter, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
rtw_write32(Adapter, REG_MCUFWDL, value32);
// polling for FW ready
counter = 0;
do
{
if(rtw_read32(Adapter, REG_MCUFWDL) & WINTINI_RDY){
//RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Polling FW ready success!! REG_MCUFWDL:0x%08x .\n",PlatformIORead4Byte(Adapter, REG_MCUFWDL)) );
return _SUCCESS;
}
rtw_mdelay_os(5);
}while(counter++ < POLLING_READY_TIMEOUT_COUNT);
DBG_8192C("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n",rtw_read32(Adapter, REG_MCUFWDL));
return _FAIL;
}
static void shutdown_card(void)
{
u32 addr;
u8 tmp8, cnt=0;
if (NULL == g_test_adapter)
{
DBG_871X("%s: padapter==NULL\n", __FUNCTION__);
return;
}
#ifdef CONFIG_FWLPS_IN_IPS
LeaveAllPowerSaveMode(g_test_adapter);
#endif // CONFIG_FWLPS_IN_IPS
// Leave SDIO HCI Suspend
addr = 0x10250086;
rtw_write8(g_test_adapter, addr, 0);
do {
tmp8 = rtw_read8(g_test_adapter, addr);
cnt++;
DBG_871X(FUNC_ADPT_FMT ": polling SDIO_HSUS_CTRL(0x%x)=0x%x, cnt=%d\n",
FUNC_ADPT_ARG(g_test_adapter), addr, tmp8, cnt);
if (tmp8 & BIT(1))
break;
if (cnt >= 100)
{
DBG_871X(FUNC_ADPT_FMT ": polling 0x%x[1]==1 FAIL!!\n",
FUNC_ADPT_ARG(g_test_adapter), addr);
break;
}
rtw_mdelay_os(10);
} while (1);
// unlock register I/O
rtw_write8(g_test_adapter, 0x1C, 0);
// enable power down function
// 0x04[4] = 1
// 0x05[7] = 1
addr = 0x04;
tmp8 = rtw_read8(g_test_adapter, addr);
tmp8 |= BIT(4);
rtw_write8(g_test_adapter, addr, tmp8);
DBG_871X(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n",
FUNC_ADPT_ARG(g_test_adapter), addr, rtw_read8(g_test_adapter, addr));
addr = 0x05;
tmp8 = rtw_read8(g_test_adapter, addr);
tmp8 |= BIT(7);
rtw_write8(g_test_adapter, addr, tmp8);
DBG_871X(FUNC_ADPT_FMT ": read after write 0x%x=0x%x\n",
FUNC_ADPT_ARG(g_test_adapter), addr, rtw_read8(g_test_adapter, addr));
// lock register page0 0x0~0xB read/write
rtw_write8(g_test_adapter, 0x1C, 0x0E);
g_test_adapter->bSurpriseRemoved = _TRUE;
DBG_871X(FUNC_ADPT_FMT ": bSurpriseRemoved=%d\n",
FUNC_ADPT_ARG(g_test_adapter), g_test_adapter->bSurpriseRemoved);
#ifdef CONFIG_CONCURRENT_MODE
if (g_test_adapter->pbuddy_adapter)
{
PADAPTER pbuddy;
pbuddy = g_test_adapter->pbuddy_adapter;
pbuddy->bSurpriseRemoved = _TRUE;
DBG_871X(FUNC_ADPT_FMT ": buddy(" ADPT_FMT ") bSurpriseRemoved=%d\n",
FUNC_ADPT_ARG(g_test_adapter), ADPT_ARG(pbuddy), pbuddy->bSurpriseRemoved);
}
#endif // CONFIG_CONCURRENT_MODE
}
int rtw_resume_process(_adapter *padapter)
{
struct net_device *pnetdev;
struct pwrctrl_priv *pwrpriv;
u8 is_pwrlock_hold_by_caller;
u8 is_directly_called_by_auto_resume;
int ret = 0;
u32 start_time = rtw_get_current_time();
_func_enter_;
DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid);
rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_ON);
rtw_mdelay_os(1);
{
u32 ret = 0;
DBG_8192C("read start:\n");
//spi_write8_endian(padapter, SPI_LOCAL_OFFSET | 0xF0, 0x01, 1);
rtw_write8(padapter, SPI_LOCAL_OFFSET | 0xF0, 0x03);
ret = rtw_read32(padapter, SPI_LOCAL_OFFSET | 0xF0);
DBG_8192C("read end 0xF0 read32:%x:\n", ret);
DBG_8192C("read end 0xF0 read8:%x:\n", rtw_read8(padapter, SPI_LOCAL_OFFSET | 0xF0));
}
if (padapter) {
pnetdev = padapter->pnetdev;
pwrpriv = &padapter->pwrctrlpriv;
} else {
ret = -1;
goto exit;
}
// interface init
if (gspi_init(adapter_to_dvobj(padapter)) != _SUCCESS)
{
ret = -1;
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: initialize SDIO Failed!!\n", __FUNCTION__));
goto exit;
}
rtw_hal_disable_interrupt(padapter);
if (gspi_alloc_irq(adapter_to_dvobj(padapter)) != _SUCCESS)
{
ret = -1;
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s: gspi_alloc_irq Failed!!\n", __FUNCTION__));
goto exit;
}
rtw_reset_drv_sw(padapter);
pwrpriv->bkeepfwalive = _FALSE;
DBG_871X("bkeepfwalive(%x)\n",pwrpriv->bkeepfwalive);
if(pm_netdev_open(pnetdev,_TRUE) != 0) {
ret = -1;
goto exit;
}
netif_device_attach(pnetdev);
netif_carrier_on(pnetdev);
if( padapter->pid[1]!=0) {
DBG_871X("pid[1]:%d\n",padapter->pid[1]);
rtw_signal_process(padapter->pid[1], SIGUSR2);
}
#ifdef CONFIG_LAYER2_ROAMING_RESUME
rtw_roaming(padapter, NULL);
#endif
#ifdef CONFIG_RESUME_IN_WORKQUEUE
rtw_unlock_suspend();
#endif //CONFIG_RESUME_IN_WORKQUEUE
exit:
pwrpriv->bInSuspend = _FALSE;
DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__
, ret, rtw_get_passing_time_ms(start_time));
_func_exit_;
return ret;
}
static int rtw_gspi_suspend(struct spi_device *spi, pm_message_t mesg)
{
struct dvobj_priv *dvobj = spi_get_drvdata(spi);
PADAPTER padapter = dvobj->if1;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct net_device *pnetdev = padapter->pnetdev;
int ret = 0;
u32 start_time = rtw_get_current_time();
_func_enter_;
DBG_871X("==> %s (%s:%d)\n",__FUNCTION__, current->comm, current->pid);
pwrpriv->bInSuspend = _TRUE;
while (pwrpriv->bips_processing == _TRUE)
rtw_msleep_os(1);
if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved))
{
DBG_871X("%s bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", __FUNCTION__
,padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved);
goto exit;
}
rtw_cancel_all_timer(padapter);
LeaveAllPowerSaveMode(padapter);
//padapter->net_closed = _TRUE;
//s1.
if(pnetdev)
{
netif_carrier_off(pnetdev);
rtw_netif_stop_queue(pnetdev);
}
#ifdef CONFIG_WOWLAN
padapter->pwrctrlpriv.bSupportRemoteWakeup=_TRUE;
#else
//s2.
//s2-1. issue rtw_disassoc_cmd to fw
disconnect_hdl(padapter, NULL);
//rtw_disassoc_cmd(padapter);
#endif
#ifdef CONFIG_LAYER2_ROAMING_RESUME
if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) )
{
DBG_871X("%s %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n",__FUNCTION__,
pmlmepriv->cur_network.network.Ssid.Ssid,
MAC_ARG(pmlmepriv->cur_network.network.MacAddress),
pmlmepriv->cur_network.network.Ssid.SsidLength,
pmlmepriv->assoc_ssid.SsidLength);
pmlmepriv->to_roaming = 1;
}
#endif
//s2-2. indicate disconnect to os
rtw_indicate_disconnect(padapter);
//s2-3.
rtw_free_assoc_resources(padapter, 1);
//s2-4.
rtw_free_network_queue(padapter, _TRUE);
rtw_led_control(padapter, LED_CTL_POWER_OFF);
rtw_dev_unload(padapter);
if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
rtw_indicate_scan_done(padapter, 1);
if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING))
rtw_indicate_disconnect(padapter);
// interface deinit
gspi_deinit(dvobj);
RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("%s: deinit GSPI complete!\n", __FUNCTION__));
rtw_wifi_gpio_wlan_ctrl(WLAN_PWDN_OFF);
rtw_mdelay_os(1);
exit:
DBG_871X("<=== %s return %d.............. in %dms\n", __FUNCTION__
, ret, rtw_get_passing_time_ms(start_time));
_func_exit_;
return ret;
}
VOID
odm_SearchPwdBLowerBound(
IN PVOID pDM_VOID,
IN u1Byte IGI_target
)
{
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
u4Byte value32 =0;
u1Byte cnt, IGI;
BOOLEAN bAdjust=_TRUE;
s1Byte TH_L2H_dmc, TH_H2L_dmc;
s1Byte TH_L2H, TH_H2L, Diff;
IGI = 0x50; // find H2L, L2H lower bound
ODM_Write_DIG(pDM_Odm, IGI);
Diff = IGI_target -(s1Byte)IGI;
TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff;
if(TH_L2H_dmc > 10)
TH_L2H_dmc = 10;
TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff;
if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
{
ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)TH_L2H_dmc);
ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)TH_H2L_dmc);
}
else
ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u1Byte)TH_H2L_dmc<<8) | (u1Byte)TH_L2H_dmc);
rtw_mdelay_os(5);
while(bAdjust)
{
for(cnt=0; cnt<20; cnt ++)
{
if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
value32 = ODM_GetBBReg(pDM_Odm,ODM_REG_RPT_11N, bMaskDWord);
else if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
value32 = ODM_GetBBReg(pDM_Odm,ODM_REG_RPT_11AC, bMaskDWord);
if (value32 & BIT30 && (pDM_Odm->SupportICType & (ODM_RTL8723A|ODM_RTL8723B|ODM_RTL8188E)))
pDM_Odm->txEdcca1 = pDM_Odm->txEdcca1 + 1;
else if(value32 & BIT29)
pDM_Odm->txEdcca1 = pDM_Odm->txEdcca1 + 1;
else
pDM_Odm->txEdcca0 = pDM_Odm->txEdcca0 + 1;
}
//DbgPrint("txEdcca1 = %d, txEdcca0 = %d\n", pDM_Odm->txEdcca1, pDM_Odm->txEdcca0);
if(pDM_Odm->txEdcca1 > 5 )
{
IGI = IGI -1;
TH_L2H_dmc = TH_L2H_dmc + 1;
if(TH_L2H_dmc > 10)
TH_L2H_dmc = 10;
TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff;
if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
{
ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte0, (u1Byte)TH_L2H_dmc);
ODM_SetBBReg(pDM_Odm,rOFDM0_ECCAThreshold, bMaskByte2, (u1Byte)TH_H2L_dmc);
}
else
ODM_SetBBReg(pDM_Odm, rFPGA0_XB_LSSIReadBack, 0xFFFF, ((u1Byte)TH_H2L_dmc<<8) | (u1Byte)TH_L2H_dmc);
pDM_Odm->TxHangFlg = _TRUE;
pDM_Odm->txEdcca1 = 0;
pDM_Odm->txEdcca0 = 0;
if(TH_L2H_dmc == 10)
{
bAdjust = _FALSE;
pDM_Odm->TxHangFlg = _FALSE;
pDM_Odm->txEdcca1 = 0;
pDM_Odm->txEdcca0 = 0;
pDM_Odm->H2L_lb = TH_H2L_dmc;
pDM_Odm->L2H_lb = TH_L2H_dmc;
pDM_Odm->Adaptivity_IGI_upper = IGI;
}
}
else
{
bAdjust = _FALSE;
pDM_Odm->TxHangFlg = _FALSE;
pDM_Odm->txEdcca1 = 0;
pDM_Odm->txEdcca0 = 0;
pDM_Odm->H2L_lb = TH_H2L_dmc;
pDM_Odm->L2H_lb = TH_L2H_dmc;
pDM_Odm->Adaptivity_IGI_upper = IGI;
}
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_DIG, ODM_DBG_LOUD, ("IGI = 0x%x, H2L_lb = 0x%x, L2H_lb = 0x%x\n", IGI, pDM_Odm->H2L_lb , pDM_Odm->L2H_lb));
}
/*
*
* Parameters
* padapter
* pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4
*
*/
void rtw_set_rpwm(PADAPTER padapter, u8 pslv)
{
u8 rpwm;
struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
#ifdef CONFIG_DETECT_CPWM_BY_POLLING
u8 cpwm_orig = 0;
u8 cpwm_now = 0;
u32 cpwm_polling_start_time = 0;
u8 pollingRes = _FAIL;
#endif
_func_enter_;
pslv = PS_STATE(pslv);
if (_TRUE == pwrpriv->btcoex_rfon)
{
if (pslv < PS_STATE_S4)
pslv = PS_STATE_S3;
}
#ifdef CONFIG_LPS_RPWM_TIMER
if (pwrpriv->brpwmtimeout == _TRUE)
{
DBG_871X("%s: RPWM timeout, force to set RPWM(0x%02X) again!\n", __FUNCTION__, pslv);
}
else
#endif // CONFIG_LPS_RPWM_TIMER
{
if ( (pwrpriv->rpwm == pslv)
#ifdef CONFIG_LPS_LCLK
#ifndef CONFIG_RTL8723A
|| ((pwrpriv->rpwm >= PS_STATE_S2)&&(pslv >= PS_STATE_S2))
#endif
#endif
)
{
RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,
("%s: Already set rpwm[0x%02X], new=0x%02X!\n", __FUNCTION__, pwrpriv->rpwm, pslv));
return;
}
}
if ((padapter->bSurpriseRemoved == _TRUE) ||
(padapter->hw_init_completed == _FALSE))
{
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: SurpriseRemoved(%d) hw_init_completed(%d)\n",
__FUNCTION__, padapter->bSurpriseRemoved, padapter->hw_init_completed));
pwrpriv->cpwm = PS_STATE_S4;
return;
}
if (padapter->bDriverStopped == _TRUE)
{
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: change power state(0x%02X) when DriverStopped\n", __FUNCTION__, pslv));
if (pslv < PS_STATE_S2) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: Reject to enter PS_STATE(0x%02X) lower than S2 when DriverStopped!!\n", __FUNCTION__, pslv));
return;
}
}
rpwm = pslv | pwrpriv->tog;
#ifdef CONFIG_LPS_LCLK
// only when from PS_STATE S0/S1 to S2 and higher needs ACK
if ((pwrpriv->cpwm < PS_STATE_S2) && (pslv >= PS_STATE_S2))
rpwm |= PS_ACK;
#endif
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("rtw_set_rpwm: rpwm=0x%02x cpwm=0x%02x\n", rpwm, pwrpriv->cpwm));
pwrpriv->rpwm = pslv;
#ifdef CONFIG_DETECT_CPWM_BY_POLLING
if (rpwm & PS_ACK)
{
//cpwm_orig = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HCPWM1);
rtw_hal_get_hwreg(padapter, HW_VAR_GET_CPWM, (u8 *)(&cpwm_orig));
}
#endif
#if defined(CONFIG_LPS_RPWM_TIMER) && !defined(CONFIG_DETECT_CPWM_BY_POLLING)
if (rpwm & PS_ACK)
_set_timer(&pwrpriv->pwr_rpwm_timer, LPS_RPWM_WAIT_MS);
#endif // CONFIG_LPS_RPWM_TIMER && !CONFIG_DETECT_CPWM_BY_POLLING
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
pwrpriv->tog += 0x80;
#ifdef CONFIG_LPS_LCLK
// No LPS 32K, No Ack
if (!(rpwm & PS_ACK))
#endif
{
pwrpriv->cpwm = pslv;
}
#ifdef CONFIG_DETECT_CPWM_BY_POLLING
if (rpwm & PS_ACK)
{
cpwm_polling_start_time = rtw_get_current_time();
//polling cpwm
do{
rtw_mdelay_os(1);
//cpwm_now = rtw_read8(padapter, SDIO_LOCAL_BASE | SDIO_REG_HCPWM1);
rtw_hal_get_hwreg(padapter, HW_VAR_GET_CPWM, (u8 *)(&cpwm_now));
if ((cpwm_orig ^ cpwm_now) & 0x80)
{
#ifdef CONFIG_LPS_LCLK
#ifdef CONFIG_RTL8723A
pwrpriv->cpwm = PS_STATE(cpwm_now);
#else // !CONFIG_RTL8723A
pwrpriv->cpwm = PS_STATE_S4;
#endif // !CONFIG_RTL8723A
pwrpriv->cpwm_tog = cpwm_now & PS_TOGGLE;
#endif
pollingRes = _SUCCESS;
break;
}
}while (rtw_get_passing_time_ms(cpwm_polling_start_time) < LPS_RPWM_WAIT_MS);
if (pollingRes == _FAIL)
{
#ifdef CONFIG_LPS_RPWM_TIMER
_set_timer(&pwrpriv->pwr_rpwm_timer, 1);
#endif
DBG_871X("%s polling cpwm timeout!!!!!!!!!!\n", __FUNCTION__);
}
}
#endif
_func_exit_;
}
static void sethwreg(PADAPTER padapter, u8 variable, u8 *val)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter);
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
u8 tmp1Byte = 0, tmp1Byte2 = 0;
switch (variable) {
case HW_VAR_RXDMA_AGG_PG_TH:
#ifdef CONFIG_USB_RX_AGGREGATION
if (pdvobjpriv->traffic_stat.cur_tx_tp < 1 && pdvobjpriv->traffic_stat.cur_rx_tp < 1) {
/* for low traffic, do not usb AGGREGATION */
pHalData->rxagg_usb_timeout = 0x01;
pHalData->rxagg_usb_size = 0;
} else {
/* default setting */
pHalData->rxagg_usb_timeout = 0x20;
pHalData->rxagg_usb_size = 0x05;
}
rtw_halmac_rx_agg_switch(pdvobjpriv, _TRUE);
#if 0
RTW_INFO("\n==========RAFFIC_STATISTIC==============\n");
RTW_INFO("cur_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.cur_tx_bytes);
RTW_INFO("cur_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.cur_rx_bytes);
RTW_INFO("last_tx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_tx_bytes);
RTW_INFO("last_rx_bytes:%lld\n", pdvobjpriv->traffic_stat.last_rx_bytes);
RTW_INFO("cur_tx_tp:%d\n", pdvobjpriv->traffic_stat.cur_tx_tp);
RTW_INFO("cur_rx_tp:%d\n", pdvobjpriv->traffic_stat.cur_rx_tp);
RTW_INFO("\n========================\n");
#endif
#endif
break;
case HW_VAR_SET_RPWM:
#ifdef CONFIG_LPS_LCLK
{
u8 ps_state = *((u8 *)val);
/*
* rpwm value only use BIT0(clock bit) ,
* BIT6(Ack bit), and BIT7(Toggle bit) for 88e.
* BIT0 value - 1: 32k, 0:40MHz.
* BIT6 value - 1: report cpwm value after success set,
* 0:do not report.
* BIT7 value - Toggle bit change.
* modify by Thomas. 2012/4/2.
*/
ps_state = ps_state & 0xC1;
rtw_write8(padapter, REG_USB_HRPWM_8821C, ps_state);
}
#endif
break;
case HW_VAR_AMPDU_MAX_TIME:
rtw_write8(padapter, REG_AMPDU_MAX_TIME_V1_8821C, 0x70);
break;
case HW_VAR_USB_MODE:
tmp1Byte = (rtw_read8(padapter, REG_PAD_CTRL2_8821C + 2) & 0xf0);
tmp1Byte2 = rtw_read8(padapter, REG_SYS_PW_CTRL_8821C + 1);
if (*val == 1) /* USB_MODE_U2 */
tmp1Byte = tmp1Byte | BIT2 | BIT0;
else if (*val == 2) /* USB_MODE_U3 */
tmp1Byte = tmp1Byte | BIT3 | BIT0;
rtw_write8(padapter, REG_PAD_CTRL2_8821C + 2, tmp1Byte);
rtw_write8(padapter, REG_PAD_CTRL2_8821C + 1, 0x64);
rtw_write8(padapter, REG_SYS_PW_CTRL_8821C + 1, (tmp1Byte2 | BIT1));
rtw_mdelay_os(1);
rtw_write8(padapter, REG_PAD_CTRL2_8821C + 2, (tmp1Byte | BIT1));
break;
default:
rtl8821c_sethwreg(padapter, variable, val);
break;
}
}
