BOOL s3c_mfc_init_hw(void) { /* * 1. Reset the MFC IP */ s3c_mfc_reset(); /* * 2. Download Firmware code into MFC */ s3c_mfc_put_firmware_into_codebuff(); s3c_mfc_download_boot_firmware(); mfc_debug("downloading firmware into bitprocessor\n"); /* * 3. Start Bit Processor */ s3c_mfc_start_bit_processor(); /* * 4. Set the Base Address Registers for the following 3 buffers * (CODE_BUF, WORKING_BUF, PARAMETER_BUF) */ s3c_mfc_config_sfr_bitproc_buffer(); /* * 5. Set the Control Registers * - STRM_BUF_CTRL * - FRME_BUF_CTRL * - DEC_FUNC_CTRL * - WORK_BUF_CTRL */ s3c_mfc_config_sfr_ctrl_opts(); s3c_mfc_get_firmware_ver(); return TRUE; }
static int s3c_mfc_resume(struct platform_device *pdev) { int i, index = 0; int inst_no; int is_mfc_on = 0; unsigned int mfc_pwr, dwMfcBase; unsigned int domain_v_ready; s3c_mfc_inst_context_t *mfcinst_ctx; mutex_lock(s3c_mfc_mutex); clk_enable(s3c_mfc_hclk); clk_enable(s3c_mfc_sclk); clk_enable(s3c_mfc_pclk); /* 1. MFC Power On(Domain V) */ mfc_pwr = readl(S3C_NORMAL_CFG); mfc_pwr |= (1 << 9); __raw_writel(mfc_pwr, S3C_NORMAL_CFG); /* 2. Check MFC power on */ do { domain_v_ready = readl(S3C_BLK_PWR_STAT); mfc_debug("domain v ready = 0x%X\n", domain_v_ready); msleep(1); } while (!(domain_v_ready & (1 << 1))); /* 3. MFC clock set 133 Mhz */ if (s3c_mfc_setup_clock() == FALSE) return -ENODEV; /* 4. Firmware download */ s3c_mfc_download_boot_firmware(); /* * 5. Power On state * Validate all the MFC Instances */ for (inst_no = 0; inst_no < S3C_MFC_NUM_INSTANCES_MAX; inst_no++) { mfcinst_ctx = s3c_mfc_inst_get_context(inst_no); if (mfcinst_ctx) { is_mfc_on = 1; /* * When MFC Power On, the MFC instance is validated. * Then the MFC operations (DEC_EXE, ENC_EXE, etc.) will be performed again */ s3c_mfc_inst_pow_on_state(mfcinst_ctx); mfc_debug("mfc resume %d-th instance is validated\n", inst_no); } } if (is_mfc_on) { /* 5. Restore MFC SFR */ dwMfcBase = s3c_mfc_sfr_base_virt_addr; for (i = S3C_MFC_SAVE_START_ADDR; i <= S3C_MFC_SAVE_END_ADDR; i += 4 ) { writel(s3c_mfc_save[index], dwMfcBase + i); index++; } /* 6. Command MFC wakeup */ s3c_mfc_wakeup(); } mutex_unlock(s3c_mfc_mutex); return 0; }