C++ (Cpp) s3cfb_mipi_clk_enable示例

示例#1

文件： setup-fb-s5p.c 项目： pileiba/s4zoomkernel

int s3cfb_clk_off(struct platform_device *pdev, struct clk **clk)
{
	struct clk *lcd_clk = NULL;

	lcd_clk = clk_get(&pdev->dev, "lcd");
	if (IS_ERR(lcd_clk)) {
		printk(KERN_ERR "failed to get ip clk for fimd0\n");
		goto err_clk0;
	}

	clk_disable(lcd_clk);
	clk_put(lcd_clk);

	clk_disable(*clk);
	clk_put(*clk);

	*clk = NULL;

#ifdef CONFIG_FB_S5P_MIPI_DSIM
	s3cfb_mipi_clk_enable(0);
#endif
#ifdef CONFIG_FB_S5P_MDNIE
	s3cfb_mdnie_clk_off();
	s3cfb_mdnie_pwm_clk_off();
#endif

	return 0;

err_clk0:
	clk_put(lcd_clk);

	return -EINVAL;
}

示例#2

文件： setup-fb-s5p.c 项目： sdemills/SM-V700

int s3cfb_clk_off(struct platform_device *pdev, struct clk **clk)
{
	int ret = 0;
	struct clk *lcd_clk = NULL;
	struct s3c_platform_fb *pdata = pdev->dev.platform_data;
	struct s3cfb_lcd *lcd = (struct s3cfb_lcd *)pdata->lcd;
	
	lcd_clk = clk_get(&pdev->dev, "lcd");
	if (IS_ERR(lcd_clk)) {
		printk(KERN_ERR "failed to get ip clk for fimd0\n");
		goto err_clk0;
	}

	clk_disable(lcd_clk);
	clk_put(lcd_clk);

	clk_disable(*clk);
	clk_put(*clk);

	*clk = NULL;
#ifndef CONFIG_FB_I80_CLOCK_GATING
#ifdef CONFIG_FB_S5P_MIPI_DSIM
	s3cfb_mipi_clk_enable(0);
#endif
#endif

#ifdef CONFIG_FB_S5P_MDNIE
	s3cfb_mdnie_clk_off();
	s3cfb_mdnie_pwm_clk_off();
#endif

	return 0;

err_clk0:
	clk_put(lcd_clk);
#if 0
err_mutex:
	mutex_unlock(&lcd->clk_mutex);
#endif
	return ret;
}

示例#3

文件： setup-fb-s5p.c 项目： sdemills/SM-V700

int s3cfb_clk_on(struct platform_device *pdev, struct clk **s3cfb_clk)
{
	struct clk *sclk = NULL;
	struct clk *mout_mpll = NULL;
	struct clk *lcd_clk = NULL;
	struct clksrc_clk *src_clk = NULL;
	struct s3c_platform_fb *pdata = pdev->dev.platform_data;
	struct s3cfb_lcd *lcd = (struct s3cfb_lcd *)pdata->lcd;

	u32 rate = 0, clkdiv = 0;
	int ret = 0;

	lcd_clk = clk_get(&pdev->dev, "lcd");
	if (IS_ERR(lcd_clk)) {
		dev_err(&pdev->dev, "failed to get operation clk for fimd\n");
		goto err_clk0;
	}

	ret = clk_enable(lcd_clk);
	if (ret < 0) {
		dev_err(&pdev->dev, "failed to clk_enable of lcd clk for fimd\n");
		goto err_clk0;
	}
	clk_put(lcd_clk);

	sclk = clk_get(&pdev->dev, "sclk_fimd");
	if (IS_ERR(sclk)) {
		dev_err(&pdev->dev, "failed to get sclk for fimd\n");
		goto err_clk1;
	}

	if (soc_is_exynos4210())
		mout_mpll = clk_get(&pdev->dev, "mout_mpll");
	else
		mout_mpll = clk_get(&pdev->dev, "mout_mpll_user");

	if (IS_ERR(mout_mpll)) {
		dev_err(&pdev->dev, "failed to get mout_mpll for fimd\n");
		goto err_clk2;
	}

	ret = clk_set_parent(sclk, mout_mpll);
	if (ret < 0) {
		dev_err(&pdev->dev, "failed to clk_set_parent for fimd\n");
		goto err_clk2;
	}

	if (!lcd->vclk) {
		rate = get_clk_rate(pdev, mout_mpll);
		if (!rate)
			rate = 800 * MHZ;	/* MOUT PLL */
		lcd->vclk = rate;
	} else
		rate = lcd->vclk;

	ret = clk_set_rate(sclk, rate);

	if (ret < 0) {
		dev_err(&pdev->dev, "failed to clk_set_rate of sclk for fimd\n");
		goto err_clk2;
	}
	dev_dbg(&pdev->dev, "set fimd sclk rate to %d\n", rate);

	clk_put(mout_mpll);

	ret = clk_enable(sclk);
	if (ret < 0) {
		dev_err(&pdev->dev, "failed to clk_enable of sclk for fimd\n");
		goto err_clk2;
	}

	*s3cfb_clk = sclk;

#ifndef CONFIG_FB_I80_CLOCK_GATING
#ifdef CONFIG_FB_S5P_MIPI_DSIM
	s3cfb_mipi_clk_enable(1);
#endif
#endif

#ifdef CONFIG_FB_S5P_MDNIE
	s3cfb_mdnie_clk_on(rate);
#ifdef CONFIG_FB_MDNIE_PWM
	s3cfb_mdnie_pwm_clk_on();
#endif

#endif

	src_clk = container_of(sclk, struct clksrc_clk, clk);
	clkdiv = __raw_readl(src_clk->reg_div.reg);

#ifndef CONFIG_FB_I80_CLOCK_GATING
	dev_info(&pdev->dev, "fimd sclk rate %ld, clkdiv 0x%x\n",
		clk_get_rate(sclk), clkdiv);
#endif

	return 0;

err_clk2:
	clk_put(mout_mpll);
err_clk1:
	clk_put(sclk);
err_clk0:
	clk_put(lcd_clk);

	return ret;
}