int s3cfb_clk_on(struct platform_device *pdev, struct clk **s3cfb_clk)
{
struct clk *sclk = NULL;
struct clk *mout_fimd = NULL, *mout_mpll = NULL;
u32 rate = 0;
int ret;
sclk = clk_get(&pdev->dev, "sclk_fimd");
if (IS_ERR(sclk)) {
dev_err(&pdev->dev, "failed to get sclk for fimd\n");
goto err_clk1;
}
mout_mpll = clk_get(&pdev->dev, "mout_mpll");
if (IS_ERR(mout_mpll)) {
dev_err(&pdev->dev, "failed to get mout_mpll\n");
goto err_clk1;
}
mout_fimd = clk_get(&pdev->dev, "mout_fimd");
if (IS_ERR(mout_fimd)) {
dev_err(&pdev->dev,
"failed to get mout_fimd\n");
goto err_clk2;
}
clk_set_parent(mout_fimd, mout_mpll);
rate = clk_round_rate(sclk, 133400000);
dev_dbg(&pdev->dev, "set fimd sclk rate to %d\n", rate);
if (!rate)
rate = 133400000;
clk_set_rate(sclk, rate);
dev_dbg(&pdev->dev, "set fimd sclk rate to %d\n", rate);
clk_put(mout_mpll);
clk_put(mout_fimd);
ret = s5pv210_pd_enable("fimd_pd");
if (ret < 0) {
dev_err(&pdev->dev, "failed to enable fimd power domain\n");
goto err_clk2;
}
clk_enable(sclk);
*s3cfb_clk = sclk;
return 0;
err_clk2:
clk_put(mout_mpll);
err_clk1:
clk_put(sclk);
return -EINVAL;
}
static int s3c_jpeg_open(struct inode *inode, struct file *file)
{
sspc100_jpg_ctx *jpg_reg_ctx;
DWORD ret;
ret = s5pv210_pd_enable("jpeg_pd");
if (ret < 0) {
jpg_err("failed to enable jpeg power domain\n");
return FALSE;
}
/* clock enable */
clk_enable(s3c_jpeg_clk);
jpg_dbg("JPG_open \r\n");
jpg_reg_ctx = (sspc100_jpg_ctx *)mem_alloc(sizeof(sspc100_jpg_ctx));
memset(jpg_reg_ctx, 0x00, sizeof(sspc100_jpg_ctx));
ret = lock_jpg_mutex();
if (!ret) {
jpg_err("JPG Mutex Lock Fail\r\n");
unlock_jpg_mutex();
kfree(jpg_reg_ctx);
return FALSE;
}
if (instanceNo > MAX_INSTANCE_NUM) {
jpg_err("Instance Number error-JPEG is running, \
instance number is %d\n", instanceNo);
unlock_jpg_mutex();
kfree(jpg_reg_ctx);
return FALSE;
}
int rotator_open(struct inode *inode, struct file *file)
{
struct rot_ctrl *ctrl = &s5p_rot;
struct rot_param *params;
int ret;
/* allocating the rotator instance */
params = kmalloc(sizeof(struct rot_param), GFP_KERNEL);
if (params == NULL) {
printk(KERN_ERR "Instance memory allocation was failed\n");
return -ENOMEM;
}
memset(params, 0, sizeof(struct rot_param));
file->private_data = (struct rot_param *)params;
atomic_inc(&ctrl->in_use);
if (atomic_read(&ctrl->in_use) == 1) {
ret = s5pv210_pd_enable("rotator_pd");
if (ret < 0) {
printk(KERN_ERR "failed to enable rotator power domain\n");
return -ENOMEM;
}
clk_enable(ctrl->clock);
rotator_enable_int(ctrl);
}
return 0;
}
static void jpeg_clock_enable(void)
{
/* power domain enable */
s5pv210_pd_enable("jpeg_pd");
/* clock enable */
clk_enable(s3c_jpeg_clk);
}
int s3c_fimc_clk_on(struct platform_device *pdev, struct clk *clk)
{
struct clk *sclk_fimc_lclk = NULL;
struct clk *mout_fimc_lclk = NULL;
struct clk *mout_mpll = NULL;
int ret;
mout_mpll = clk_get(&pdev->dev, "mout_mpll");
if (IS_ERR(mout_mpll)) {
dev_err(&pdev->dev, "failed to get mout_mpll\n");
goto err_clk1;
}
mout_fimc_lclk = clk_get(&pdev->dev, "mout_fimc_lclk");
if (IS_ERR(mout_fimc_lclk)) {
dev_err(&pdev->dev, "failed to get mout_fimc_lclk\n");
goto err_clk2;
}
sclk_fimc_lclk = clk_get(&pdev->dev, "sclk_fimc_lclk");
if (IS_ERR(sclk_fimc_lclk)) {
dev_err(&pdev->dev, "failed to get sclk_fimc_lclk\n");
goto err_clk3;
}
clk_set_parent(mout_fimc_lclk, mout_mpll);
clk_set_rate(sclk_fimc_lclk, 166750000);
/* be able to handle clock on/off only with this clock */
clk = clk_get(&pdev->dev, "fimc");
if (IS_ERR(clk)) {
dev_err(&pdev->dev, "failed to get interface clock\n");
goto err_clk3;
}
clk_put(mout_mpll);
clk_put(mout_fimc_lclk);
clk_put(sclk_fimc_lclk);
ret = s5pv210_pd_enable("fimc_pd");
if (ret < 0) {
dev_err(&pdev->dev, "failed to enable fimc power domain\n");
goto err_clk3;
}
clk_enable(clk);
return 0;
err_clk3:
clk_put(mout_fimc_lclk);
err_clk2:
clk_put(mout_mpll);
err_clk1:
return -EINVAL;
}
int s3c_csis_clk_on(struct platform_device *pdev, struct clk **clk)
{
struct clk *sclk_csis = NULL;
struct clk *parent = NULL;
struct clk *mout_csis = NULL;
struct s3c_platform_csis *pdata;
int ret;
/* power domain enable for mipi-csis */
ret = s5pv210_pd_enable("csis_pd");
if (ret < 0) {
dev_err(&pdev->dev, "failed to enable csis power domain\n");
return -EINVAL;
}
pdata = to_csis_plat(&pdev->dev);
/* mout_mpll */
parent = clk_get(&pdev->dev, pdata->srclk_name);
if (IS_ERR(parent)) {
dev_err(&pdev->dev, "failed to get parent clock for csis\n");
goto err_clk1;
}
/* mout_csis */
mout_csis = clk_get(&pdev->dev, "mout_csis");
if (IS_ERR(mout_csis)) {
dev_err(&pdev->dev, "failed to get mout_csis clock source\n");
goto err_clk2;
}
/* sclk_csis */
sclk_csis = clk_get(&pdev->dev, pdata->clk_name);
if (IS_ERR(sclk_csis)) {
dev_err(&pdev->dev, "failed to get csis clock source\n");
goto err_clk3;
}
clk_set_parent(mout_csis, parent);
clk_set_parent(sclk_csis, mout_csis);
clk_enable(sclk_csis);
return 0;
err_clk3:
clk_put(mout_csis);
err_clk2:
clk_put(parent);
err_clk1:
return -EINVAL;
}
static int jpeg_resume(struct platform_device *pdev)
{
#if defined(CONFIG_CPU_S5PV210)
if (s5pv210_pd_enable("jpeg_pd") < 0) {
jpeg_err("failed to enable jpeg power domain\n");
return -EINVAL;
}
#endif
/* clock enable */
clk_enable(jpeg_ctrl->clk);
return 0;
}
static int mfc_suspend(struct platform_device *pdev, pm_message_t state)
{
int ret = 0;
#if ENABLE_MONITORING_MFC_DD
mfc_info("mfc_suspend......#1\n");
#endif
mutex_lock(&mfc_mutex);
if (!mfc_is_running())
{
#if ENABLE_MONITORING_MFC_DD
mfc_info("mfc_suspend......#2-0\n");
#endif
mutex_unlock(&mfc_mutex);
return 0;
}
#if Frame_Base_Power_CTR_ON
if (s5pv210_pd_enable("mfc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not on for mfc\n");
return -1;
}
clk_enable(mfc_clk);
#endif
#if ENABLE_MONITORING_MFC_DD
mfc_info("mfc_suspend......#2-1\n");
#endif
ret = mfc_set_sleep();
if(ret != MFCINST_RET_OK){
mutex_unlock(&mfc_mutex);
return ret;
}
#if Frame_Base_Power_CTR_ON
clk_disable(mfc_clk);
#endif
mutex_unlock(&mfc_mutex);
return 0;
}
static int rotator_resume(struct platform_device *pdev)
{
struct rot_ctrl *ctrl = &s5p_rot;
int ret;
ret = s5pv210_pd_enable("rotator_pd");
if (ret < 0) {
printk(KERN_ERR "failed to enable rotator power domain\n");
return -1;
}
clk_enable(ctrl->clock);
ctrl->status = ROT_IDLE;
rotator_enable_int(ctrl);
return 0;
}
static int jpeg_open(struct inode *inode, struct file *file)
{
int ret;
int in_use;
mutex_lock(&jpeg_ctrl->lock);
in_use = atomic_read(&jpeg_ctrl->in_use);
if (in_use > JPEG_MAX_INSTANCE) {
ret = -EBUSY;
goto resource_busy;
} else {
atomic_inc(&jpeg_ctrl->in_use);
jpeg_info("jpeg driver opened.\n");
}
mutex_unlock(&jpeg_ctrl->lock);
#if defined(CONFIG_CPU_S5PV210)
ret = s5pv210_pd_enable("jpeg_pd");
if (ret < 0) {
jpeg_err("failed to enable jpeg power domain\n");
return -EINVAL;
}
#endif
/* clock enable */
clk_enable(jpeg_ctrl->clk);
file->private_data = (struct jpeg_control *)jpeg_ctrl;
#ifdef CONFIG_PM_RUNTIME
pm_runtime_get_sync(jpeg_pm);
#endif
return 0;
resource_busy:
mutex_unlock(&jpeg_ctrl->lock);
return ret;
}
int s5p_tv_clk_gate(bool on)
{
if (on) {
#ifdef CONFIG_S5PV210_PM
if (s5pv210_pd_enable("vp_pd") < 0) {
printk(KERN_ERR "[Error]The power is not on for VP\n");
goto err_pm;
}
#endif
clk_enable(s5ptv_status.vp_clk);
#ifdef CONFIG_S5PV210_PM
if (s5pv210_pd_enable("mixer_pd") < 0) {
printk(KERN_ERR "[Error]The power is not on for mixer\n");
goto err_pm;
}
#endif
clk_enable(s5ptv_status.mixer_clk);
#ifdef CONFIG_S5PV210_PM
if (s5pv210_pd_enable("tv_enc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not on for TV ENC\n");
goto err_pm;
}
#endif
clk_enable(s5ptv_status.tvenc_clk);
#ifdef CONFIG_S5PV210_PM
if (s5pv210_pd_enable("hdmi_pd") < 0) {
printk(KERN_ERR "[Error]The power is not on for HDMI\n");
goto err_pm;
}
#endif
clk_enable(s5ptv_status.hdmi_clk);
} else {
/* off */
clk_disable(s5ptv_status.vp_clk);
#ifdef CONFIG_S5PV210_PM
if (s5pv210_pd_disable("vp_pd") < 0) {
printk(KERN_ERR "[Error]The power is not off for VP\n");
goto err_pm;
}
#endif
clk_disable(s5ptv_status.mixer_clk);
#ifdef CONFIG_S5PV210_PM
if (0 != s5pv210_pd_disable("mixer_pd")) {
printk(KERN_ERR "[Error]The power is not off for mixer\n");
goto err_pm;
}
#endif
clk_disable(s5ptv_status.tvenc_clk);
#ifdef CONFIG_S5PV210_PM
if (s5pv210_pd_disable("tv_enc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not off for TV ENC\n");
goto err_pm;
}
#endif
clk_disable(s5ptv_status.hdmi_clk);
#ifdef CONFIG_S5PV210_PM
if (s5pv210_pd_disable("hdmi_pd") < 0) {
printk(KERN_ERR "[Error]The power is not off for HDMI\n");
goto err_pm;
}
#endif
}
return 0;
#ifdef CONFIG_S5PV210_PM
err_pm:
return -1;
#endif
}
int mfc_power_on(void)
{
return s5pv210_pd_enable(pm->pd_name);
}
static int mfc_open(struct inode *inode, struct file *file)
{
mfc_inst_ctx *mfc_ctx;
int ret;
//struct sched_param param = { .sched_priority = 1 };
#if ENABLE_MONITORING_MFC_DD
mfc_info("MFC mfc_open..\n");
#endif
mutex_lock(&mfc_mutex);
if (!mfc_is_running())
{
#ifdef CONFIG_CPU_FREQ_S5PV210
s5pv210_set_cpufreq_level(RESTRICT_TABLE);
#endif /* CONFIG_CPU_FREQ_S5PV210 */
#ifdef CONFIG_S5P_LPAUDIO
s5p_set_lpaudio_lock(1);
#endif /* CONFIG_S5P_LPAUDIO */
if (s5pv210_pd_enable("mfc_pd") < 0){
printk(KERN_ERR "[Error]The power is not on for mfc\n");
return -1;
}
clk_enable(mfc_clk);
#ifdef CONFIG_PM_PWR_GATING
s5pc110_lock_power_domain(MFC_DOMAIN_LOCK_TOKEN);
#endif
if (mfc_init_hw() != TRUE)
{
#if Frame_Base_Power_CTR_ON
clk_disable(mfc_clk);
if (s5pv210_pd_disable("mfc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not off for mfc\n");
return -1;
}
#endif
ret = -ENODEV;
goto out_open;
}
#if Frame_Base_Power_CTR_ON
clk_disable(mfc_clk);
/*if (s5pv210_pd_disable("mfc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not off for mfc\n");
return -1;
}*/
#endif
}
mfc_ctx = (mfc_inst_ctx *)kmalloc(sizeof(mfc_inst_ctx), GFP_KERNEL);
if (mfc_ctx == NULL)
{
mfc_err("MFCINST_MEMORY_ALLOC_FAIL\n");
ret = -ENOMEM;
goto out_open;
}
memset(mfc_ctx, 0, sizeof(mfc_inst_ctx));
/* get the inst no allocating some part of memory among reserved memory */
mfc_ctx->mem_inst_no = mfc_get_mem_inst_no();
mfc_ctx->InstNo = -1;
if (mfc_ctx->mem_inst_no < 0)
{
mfc_err("MFCINST_INST_NUM_EXCEEDED\n");
kfree(mfc_ctx);
ret = -EPERM;
goto out_open;
}
if (mfc_set_state(mfc_ctx, MFCINST_STATE_OPENED) < 0)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
kfree(mfc_ctx);
ret = -ENODEV;
goto out_open;
}
/* Decoder only */
mfc_ctx->extraDPB = MFC_MAX_EXTRA_DPB;
mfc_ctx->FrameType = MFC_RET_FRAME_NOT_SET;
file->private_data = (mfc_inst_ctx *)mfc_ctx;
//sched_setscheduler(current, SCHED_FIFO, ¶m);
ret = 0;
out_open:
mutex_unlock(&mfc_mutex);
if(ret != 0)
{
mfc_err("MFC_OEPN_FAIL..... ret(%d) \n", ret);
return ret;
}
#if ENABLE_MONITORING_MFC_DD
mfc_info("MFC_OEPN_OK..... ret(%d) \n", ret);
#endif
return ret;
}
static int mfc_resume(struct platform_device *pdev)
{
int ret = 0;
unsigned int mc_status;
#if ENABLE_MONITORING_MFC_DD
mfc_info("mfc_resume......#1\n");
#endif
mutex_lock(&mfc_mutex);
if (!mfc_is_running())
{
#if ENABLE_MONITORING_MFC_DD
mfc_info("mfc_resume......#2-0\n");
#endif
mutex_unlock(&mfc_mutex);
return 0;
}
#if ENABLE_MONITORING_MFC_DD
mfc_info("mfc_resume......#2-1\n");
#endif
#if Frame_Base_Power_CTR_ON
if (s5pv210_pd_enable("mfc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not on for mfc\n");
return -1;
}
clk_enable(mfc_clk);
#endif
/*
* 1. MFC reset
*/
do {
mc_status = READL(MFC_MC_STATUS);
} while(mc_status != 0);
mfc_cmd_reset();
WRITEL(mfc_port0_base_paddr, MFC_MC_DRAMBASE_ADDR_A);
WRITEL(mfc_port1_base_paddr, MFC_MC_DRAMBASE_ADDR_B);
WRITEL(1, MFC_NUM_MASTER);
ret = mfc_set_wakeup();
if(ret != MFCINST_RET_OK){
mutex_unlock(&mfc_mutex);
return ret;
}
#if Frame_Base_Power_CTR_ON
clk_disable(mfc_clk);
if (s5pv210_pd_disable("mfc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not off for mfc\n");
return -1;
}
#endif
mutex_unlock(&mfc_mutex);
return 0;
}
static int mfc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
{
int ret, ex_ret;
mfc_inst_ctx *mfc_ctx = NULL;
mfc_common_args in_param;
mutex_lock(&mfc_mutex);
#if Frame_Base_Power_CTR_ON
if (s5pv210_pd_enable("mfc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not on for mfc\n");
return -1;
}
clk_enable(mfc_clk);
#endif
ret = copy_from_user(&in_param, (mfc_common_args *)arg, sizeof(mfc_common_args));
if (ret < 0)
{
mfc_err("Inparm copy error\n");
ret = -EIO;
in_param.ret_code = MFCINST_ERR_INVALID_PARAM;
goto out_ioctl;
}
mfc_ctx = (mfc_inst_ctx *)file->private_data;
mutex_unlock(&mfc_mutex);
switch (cmd)
{
case IOCTL_MFC_ENC_INIT:
mutex_lock(&mfc_mutex);
#if ENABLE_MONITORING_MFC_DD
mfc_info("IOCTL_MFC_ENC_INIT\n");
#endif
if (mfc_set_state(mfc_ctx, MFCINST_STATE_ENC_INITIALIZE) < 0)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
/* MFC encode init */
in_param.ret_code = mfc_init_encode(mfc_ctx, &(in_param.args));
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_ENC_EXE:
mutex_lock(&mfc_mutex);
#if ENABLE_MONITORING_MFC_DD
mfc_info("IOCTL_MFC_ENC_EXE\n");
#endif
if (mfc_ctx->MfcState < MFCINST_STATE_ENC_INITIALIZE)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
if (mfc_set_state(mfc_ctx, MFCINST_STATE_ENC_EXE) < 0)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
in_param.ret_code = mfc_exe_encode(mfc_ctx, &(in_param.args));
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_DEC_INIT:
mutex_lock(&mfc_mutex);
#if ENABLE_MONITORING_MFC_DD
mfc_info("IOCTL_MFC_DEC_INIT\n");
#endif
if (mfc_set_state(mfc_ctx, MFCINST_STATE_DEC_INITIALIZE) < 0)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
/* MFC decode init */
in_param.ret_code = mfc_init_decode(mfc_ctx, &(in_param.args));
if (in_param.ret_code < 0)
{
mfc_err("MFC_DEC_INIT ERROR ............. ret(%d)\n",in_param.ret_code);
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
}
if (in_param.args.dec_init.out_dpb_cnt <= 0)
{
mfc_err("MFC out_dpb_cnt error\n");
mutex_unlock(&mfc_mutex);
break;
}
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_DEC_EXE:
mutex_lock(&mfc_mutex);
#if ENABLE_MONITORING_MFC_DD
mfc_debug_L0("IOCTL_MFC_DEC_EXE\n");
#endif
if (mfc_ctx->MfcState < MFCINST_STATE_DEC_INITIALIZE)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
if (mfc_set_state(mfc_ctx, MFCINST_STATE_DEC_EXE) < 0)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
in_param.ret_code = mfc_exe_decode(mfc_ctx, &(in_param.args));
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_GET_CONFIG:
mutex_lock(&mfc_mutex);
#if ENABLE_MONITORING_MFC_DD
mfc_info("IOCTL_MFC_GET_CONFIG\n");
#endif
if (mfc_ctx->MfcState < MFCINST_STATE_DEC_INITIALIZE)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
in_param.ret_code = mfc_get_config(mfc_ctx, &(in_param.args));
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_SET_CONFIG:
mutex_lock(&mfc_mutex);
#if ENABLE_MONITORING_MFC_DD
mfc_info("IOCTL_MFC_SET_CONFIG\n");
#endif
in_param.ret_code = mfc_set_config(mfc_ctx, &(in_param.args));
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_GET_IN_BUF:
mutex_lock(&mfc_mutex);
#if ENABLE_MONITORING_MFC_DD
mfc_info("IOCTL_MFC_GET_IN_BUF\n");
#endif
if (mfc_ctx->MfcState < MFCINST_STATE_OPENED)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
if (in_param.args.mem_alloc.buff_size <= 0)
{
mfc_err("MFCINST_ERR_INVALID_PARAM\n");
in_param.ret_code = MFCINST_ERR_INVALID_PARAM;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
if ((is_dec_codec(in_param.args.mem_alloc.codec_type)) &&
(in_param.args.mem_alloc.buff_size < (CPB_BUF_SIZE + DESC_BUF_SIZE)))
{
in_param.args.mem_alloc.buff_size = CPB_BUF_SIZE + DESC_BUF_SIZE;
}
/* Buffer manager should have 64KB alignment for MFC base addresses */
in_param.args.mem_alloc.buff_size = ALIGN_TO_8KB(in_param.args.mem_alloc.buff_size);
/* allocate stream buf for decoder & current YC buf for encoder */
if (is_dec_codec(in_param.args.mem_alloc.codec_type))
{
in_param.ret_code = mfc_allocate_buffer(mfc_ctx, &in_param.args, 0);
}
else
{
in_param.ret_code = mfc_allocate_buffer(mfc_ctx, &in_param.args, 1);
}
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_FREE_BUF:
mutex_lock(&mfc_mutex);
#if ENABLE_MONITORING_MFC_DD
mfc_info("IOCTL_MFC_FREE_BUF\n");
#endif
if (mfc_ctx->MfcState < MFCINST_STATE_OPENED)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
in_param.ret_code = mfc_release_buffer((unsigned char *)in_param.args.mem_free.u_addr);
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
case IOCTL_MFC_GET_PHYS_ADDR:
mutex_lock(&mfc_mutex);
mfc_debug("IOCTL_MFC_GET_PHYS_ADDR\n");
if (mfc_ctx->MfcState < MFCINST_STATE_OPENED)
{
mfc_err("MFCINST_ERR_STATE_INVALID\n");
in_param.ret_code = MFCINST_ERR_STATE_INVALID;
ret = -EINVAL;
mutex_unlock(&mfc_mutex);
break;
}
in_param.ret_code = mfc_get_phys_addr(mfc_ctx, &(in_param.args));
ret = in_param.ret_code;
mutex_unlock(&mfc_mutex);
break;
default:
mfc_err("Requested ioctl command is not defined. (ioctl cmd=0x%08x)\n", cmd);
in_param.ret_code = MFCINST_ERR_INVALID_PARAM;
ret = -EINVAL;
}
out_ioctl:
#if Frame_Base_Power_CTR_ON
clk_disable(mfc_clk);
if (s5pv210_pd_disable("mfc_pd") < 0) {
printk(KERN_ERR "[Error]The power is not off for mfc\n");
return -1;
}
#endif
ex_ret = copy_to_user((mfc_common_args *)arg, &in_param, sizeof(mfc_common_args));
if (ex_ret < 0)
{
mfc_err("Outparm copy to user error\n");
ret = -EIO;
}
mfc_debug_L0("---------------IOCTL return = %d ---------------\n", ret);
return ret;
}
int s3cfb_clk_on(struct platform_device *pdev, struct clk **s3cfb_clk)
{
struct clk *sclk = NULL;
struct clk *mout_fimd = NULL, *mout_mpll = NULL;
u32 rate = 0;
int ret;
sclk = clk_get(&pdev->dev, "sclk_fimd");
if (IS_ERR(sclk)) {
dev_err(&pdev->dev, "failed to get sclk for fimd\n");
goto err_clk1;
}
#if defined(CONFIG_S5PV210_SCLKFIMD_USE_VPLL)
mout_mpll = clk_get(&pdev->dev, "mout_vpll");
#else
mout_mpll = clk_get(&pdev->dev, "mout_mpll");
#endif
if (IS_ERR(mout_mpll)) {
dev_err(&pdev->dev, "failed to get mout_mpll\n");
goto err_clk1;
}
mout_fimd = clk_get(&pdev->dev, "mout_fimd");
if (IS_ERR(mout_fimd)) {
dev_err(&pdev->dev,
"failed to get mout_fimd\n");
goto err_clk2;
}
clk_set_parent(sclk, mout_fimd);
clk_set_parent(mout_fimd, mout_mpll);
rate = clk_round_rate(sclk, 166750000);
dev_dbg(&pdev->dev, "set fimd sclk rate to %d\n", rate);
if (!rate)
rate = 166750000;
#if defined(CONFIG_MACH_S5PC110_P1)
#if defined(CONFIG_TARGET_PCLK_44_46)
rate = 45000000;
#elif defined(CONFIG_TARGET_PCLK_47_6)
//P1_ATT PCLK -> 47.6MHz
rate = 48000000;
#else
rate = 54000000;
#endif
#endif
clk_set_rate(sclk, rate);
dev_dbg(&pdev->dev, "set fimd sclk rate to %d\n", rate);
clk_put(mout_mpll);
clk_put(mout_fimd);
#if defined(CONFIG_MACH_S5PC110_P1)
{
struct clk * sclk_mdnie;
struct clk * sclk_mdnie_pwm;
sclk_mdnie = clk_get(&pdev->dev, "sclk_mdnie");
if (IS_ERR(sclk)) {
dev_err(&pdev->dev, "failed to get sclk for mdnie\n");
}
else
{
#if defined(CONFIG_TARGET_PCLK_44_46)
clk_set_rate(sclk_mdnie, 45*1000000);
#elif defined(CONFIG_TARGET_PCLK_47_6)
//P1_ATT PCLK -> 47.6MHz
clk_set_rate(sclk_mdnie, 48*1000000);
#else
clk_set_rate(sclk_mdnie, 54*1000000);
#endif
clk_put(sclk_mdnie);
}
sclk_mdnie_pwm = clk_get(&pdev->dev, "sclk_mdnie_pwm");
if (IS_ERR(sclk)) {
dev_err(&pdev->dev, "failed to get sclk for mdnie pwm\n");
}
else
{
clk_set_rate(sclk_mdnie_pwm, 2400*1000); // mdnie pwm need to 24Khz*100
clk_put(sclk_mdnie_pwm);
}
}
#endif
ret = s5pv210_pd_enable("fimd_pd");
if (ret < 0) {
dev_err(&pdev->dev, "failed to enable fimd power domain\n");
goto err_clk2;
}
clk_enable(sclk);
*s3cfb_clk = sclk;
return 0;
err_clk2:
clk_put(mout_mpll);
err_clk1:
clk_put(sclk);
return -EINVAL;
}
