static void __init smdkc110_machine_init(void)
{
struct clk *arm_clk;
arm_clk = clk_get(NULL, "fclk");
if (arm_clk == NULL) {
memcpy(&max8698_platform_default_data, &max8698_platform_data_1,
sizeof(struct max8698_platform_data));
printk(KERN_ERR "get fclk clock failed\n");
} else {
printk(KERN_INFO "arm_clk = %lu\n", arm_clk->rate);
switch (arm_clk->rate) {
case 800*1000*1000:
memcpy(&max8698_platform_default_data,
&max8698_platform_data_0,
sizeof(struct max8698_platform_data));
break;
case 1000*1000*1000:
memcpy(&max8698_platform_default_data,
&max8698_platform_data_1,
sizeof(struct max8698_platform_data));
break;
default:
printk(KERN_ERR "Set to default voltage value\n");
memcpy(&max8698_platform_default_data,
&max8698_platform_data_1,
sizeof(struct max8698_platform_data));
break;
}
clk_put(arm_clk);
}
#ifdef CONFIG_DM9000
smdkv210_dm9000_set();
#endif
s3c_pm_init();
s3c_i2c0_set_platdata(NULL);
s3c_i2c1_set_platdata(NULL);
s3c_i2c2_set_platdata(NULL);
i2c_register_board_info(0, smdkc110_i2c_devs0,
ARRAY_SIZE(smdkc110_i2c_devs0));
i2c_register_board_info(1, smdkc110_i2c_devs1,
ARRAY_SIZE(smdkc110_i2c_devs1));
i2c_register_board_info(2, smdkc110_i2c_devs2,
ARRAY_SIZE(smdkc110_i2c_devs2));
s3c_ide_set_platdata(&smdkc110_ide_pdata);
#ifdef CONFIG_S3C64XX_DEV_SPI
if (!gpio_request(S5PV210_GPB(1), "SPI_CS0")) {
gpio_direction_output(S5PV210_GPB(1), 1);
s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(1));
s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
s5pv210_spi_set_info(0, S5PV210_SPI_SRCCLK_PCLK,
ARRAY_SIZE(smdk_spi0_csi));
}
if (!gpio_request(S5PV210_GPB(5), "SPI_CS1")) {
gpio_direction_output(S5PV210_GPB(5), 1);
s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(1));
s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
s5pv210_spi_set_info(1, S5PV210_SPI_SRCCLK_PCLK,
ARRAY_SIZE(smdk_spi1_csi));
}
spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs));
#endif
#ifdef CONFIG_S3C_DEV_HSMMC
s3c_sdhci0_set_platdata(&smdkc110_hsmmc0_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC1
s3c_sdhci1_set_platdata(&smdkc110_hsmmc1_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC2
s3c_sdhci2_set_platdata(&smdkc110_hsmmc2_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC3
s3c_sdhci3_set_platdata(&smdkc110_hsmmc3_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HWMON
s3c_hwmon_set_platdata(&smdkc110_hwmon_pdata);
#endif
#ifdef CONFIG_TOUCHSCREEN_S3C2410
#ifdef CONFIG_S3C_DEV_ADC
s3c24xx_ts_set_platdata(&s3c_ts_platform);
#endif
#ifdef CONFIG_S3C_DEV_ADC1
s3c24xx_ts1_set_platdata(&s3c_ts_platform);
#endif
#endif
#if defined(CONFIG_VIDEO_TV20) || defined(CONFIG_VIDEO_TVOUT)
s5p_hdmi_hpd_set_platdata(&hdmi_hpd_data);
s5p_hdmi_cec_set_platdata(&hdmi_cec_data);
#endif
platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices));
}
static void __init mini210_machine_init(void)
{
arm_pm_restart = smdkc110_pm_restart;
s3c_pm_init();
mini210_wifi_init();
#ifdef CONFIG_DM9000
mini210_dm9000_init();
#endif
platform_add_devices(mini210_devices, ARRAY_SIZE(mini210_devices));
#ifdef CONFIG_ANDROID_PMEM
android_pmem_set_platdata();
#endif
#ifdef CONFIG_KEYBOARD_SAMSUNG
samsung_keypad_set_platdata(&mini210_keypad_data);
#endif
#ifdef CONFIG_TOUCHSCREEN_S3C2410
s3c24xx_ts_set_platdata(&s3c_ts_platform);
#endif
s3c_i2c0_set_platdata(NULL);
s3c_i2c1_set_platdata(NULL);
#ifdef CONFIG_TOUCHSCREEN_GOODIX
if (mini210_get_ctp() == CTP_GT80X) {
i2c2_data.frequency = 260*1000;
}
#endif
s3c_i2c2_set_platdata(&i2c2_data);
i2c_register_board_info(0, mini210_i2c_devs0,
ARRAY_SIZE(mini210_i2c_devs0));
i2c_register_board_info(1, mini210_i2c_devs1,
ARRAY_SIZE(mini210_i2c_devs1));
i2c_register_board_info(2, mini210_i2c_devs2,
ARRAY_SIZE(mini210_i2c_devs2));
#ifdef CONFIG_TOUCHSCREEN_EGALAX
i2c_register_board_info(5, i2c_devs5, ARRAY_SIZE(i2c_devs5));
#endif
#ifdef CONFIG_S5PV210_SETUP_IDE
s3c_ide_set_platdata(&mini210_ide_pdata);
#endif
#ifdef CONFIG_FB_S3C_MINI210
{
struct s3cfb_lcd *mlcd = mini210_get_lcd();
if (!(mlcd->args & 0x0f)) {
if (readl(S5PV210_GPF0_BASE + 0x184) & 0x10)
mlcd->args |= (1 << 7);
}
mini210_fb_data.lcd = mlcd;
s3c_fb_set_platdata(&mini210_fb_data);
}
#endif
#ifdef CONFIG_S3C_DEV_HSMMC
s3c_sdhci0_set_platdata(&mini210_hsmmc0_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC1
s3c_sdhci1_set_platdata(&mini210_hsmmc1_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC2
s3c_sdhci2_set_platdata(&mini210_hsmmc2_pdata);
#endif
#ifdef CONFIG_S3C_DEV_HSMMC3
s3c_sdhci3_set_platdata(&mini210_hsmmc3_pdata);
#endif
#ifdef CONFIG_VIDEO_FIMC
/* fimc */
s3c_fimc0_set_platdata(&fimc_plat_lsi);
s3c_fimc1_set_platdata(&fimc_plat_lsi);
s3c_fimc2_set_platdata(&fimc_plat_lsi);
#ifdef CONFIG_VIDEO_S5K4BA
#ifdef CAM_ITU_CH_A
smdkv210_cam0_power(1);
#else
smdkv210_cam1_power(1);
#endif
#endif
#endif
#ifdef CONFIG_VIDEO_FIMC_MIPI
s3c_csis_set_platdata(NULL);
#endif
#ifdef CONFIG_VIDEO_JPEG_V2
s3c_jpeg_set_platdata(&jpeg_plat);
#endif
#ifdef CONFIG_VIDEO_MFC50
/* mfc */
s3c_mfc_set_platdata(NULL);
#endif
/* spi */
#ifdef CONFIG_SPI_S3C64XX
if (!gpio_request(S5PV210_GPB(1), "SPI_CS0")) {
gpio_direction_output(S5PV210_GPB(1), 1);
s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(1));
s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
s5pv210_spi_set_info(0, S5PV210_SPI_SRCCLK_PCLK,
ARRAY_SIZE(smdk_spi0_csi));
}
if (!gpio_request(S5PV210_GPB(5), "SPI_CS1")) {
gpio_direction_output(S5PV210_GPB(5), 1);
s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(1));
s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
s5pv210_spi_set_info(1, S5PV210_SPI_SRCCLK_PCLK,
ARRAY_SIZE(smdk_spi1_csi));
}
spi_register_board_info(s3c_spi_devs, ARRAY_SIZE(s3c_spi_devs));
#endif
mini210_otg_init();
mini210_ehci_init();
mini210_ohci_init();
clk_xusbxti.rate = 24000000;
regulator_has_full_constraints();
mini210_setup_clocks();
/* write something into the INFORM6 register that we can use to
* differentiate an unclear reboot from a clean reboot (which
* writes a small integer code to INFORM6).
*/
__raw_writel(0xee, S5P_INFORM6);
}
