int pwm_check_enabled(int pwm_id) { const struct s5p_timer *pwm = (struct s5p_timer *)samsung_get_base_timer(); const unsigned long tcon = readl(&pwm->tcon); return tcon & TCON_START(pwm_id); }
int pwm_init(int pwm_id, int div, int invert) { u32 val; const struct s5p_timer *pwm = (struct s5p_timer *)samsung_get_base_timer(); unsigned long ticks_per_period; unsigned int offset, prescaler; /* * Timer Freq(HZ) = * PWM_CLK / { (prescaler_value + 1) * (divider_value) } */ val = readl(&pwm->tcfg0); if (pwm_id < 2) { prescaler = PRESCALER_0; val &= ~0xff; val |= (prescaler & 0xff); } else { prescaler = PRESCALER_1; val &= ~(0xff << 8); val |= (prescaler & 0xff) << 8; } writel(val, &pwm->tcfg0); val = readl(&pwm->tcfg1); val &= ~(0xf << MUX_DIV_SHIFT(pwm_id)); val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id); writel(val, &pwm->tcfg1); if (pwm_id == 4) { /* * TODO(sjg): Use this as a countdown timer for now. We count * down from the maximum value to 0, then reset. */ ticks_per_period = -1UL; } else { const unsigned long pwm_hz = 1000; unsigned long timer_rate_hz = clock_get_periph_rate( PERIPH_ID_PWM0) / ((prescaler + 1) * (1 << div)); ticks_per_period = timer_rate_hz / pwm_hz; } /* set count value */ offset = pwm_id * 3; writel(ticks_per_period, &pwm->tcntb0 + offset); val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id)); if (invert && (pwm_id < 4)) val |= TCON_INVERTER(pwm_id); writel(val, &pwm->tcon); pwm_enable(pwm_id); return 0; }
int pwm_config(int pwm_id, int duty_ns, int period_ns) { const struct s5p_timer *pwm = (struct s5p_timer *)samsung_get_base_timer(); unsigned int offset; unsigned long tin_rate; unsigned long tin_ns; unsigned long frequency; unsigned long tcon; unsigned long tcnt; unsigned long tcmp; /* * We currently avoid using 64bit arithmetic by using the * fact that anything faster than 1GHz is easily representable * by 32bits. */ if (period_ns > NS_IN_SEC || duty_ns > NS_IN_SEC || period_ns == 0) return -ERANGE; if (duty_ns > period_ns) return -EINVAL; frequency = NS_IN_SEC / period_ns; /* Check to see if we are changing the clock rate of the PWM */ tin_rate = pwm_calc_tin(pwm_id, frequency); tin_ns = NS_IN_SEC / tin_rate; tcnt = period_ns / tin_ns; /* Note, counters count down */ tcmp = duty_ns / tin_ns; tcmp = tcnt - tcmp; /* Update the PWM register block. */ offset = pwm_id * 3; if (pwm_id < 4) { writel(tcnt, &pwm->tcntb0 + offset); writel(tcmp, &pwm->tcmpb0 + offset); } tcon = readl(&pwm->tcon); tcon |= TCON_UPDATE(pwm_id); if (pwm_id < 4) tcon |= TCON_AUTO_RELOAD(pwm_id); else tcon |= TCON4_AUTO_RELOAD; writel(tcon, &pwm->tcon); tcon &= ~TCON_UPDATE(pwm_id); writel(tcon, &pwm->tcon); return 0; }
void pwm_disable(int pwm_id) { const struct s5p_timer *pwm = (struct s5p_timer *)samsung_get_base_timer(); unsigned long tcon; tcon = readl(&pwm->tcon); tcon &= ~TCON_START(pwm_id); writel(tcon, &pwm->tcon); }
int pwm_init(int pwm_id, int div, int invert) { u32 val; const struct s5p_timer *pwm = (struct s5p_timer *)samsung_get_base_timer(); unsigned long timer_rate_hz; unsigned int offset, prescaler; /* * Timer Freq(HZ) = * PWM_CLK / { (prescaler_value + 1) * (divider_value) } */ val = readl(&pwm->tcfg0); if (pwm_id < 2) { prescaler = PRESCALER_0; val &= ~0xff; val |= (prescaler & 0xff); } else { prescaler = PRESCALER_1; val &= ~(0xff << 8); val |= (prescaler & 0xff) << 8; } writel(val, &pwm->tcfg0); val = readl(&pwm->tcfg1); val &= ~(0xf << MUX_DIV_SHIFT(pwm_id)); val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id); writel(val, &pwm->tcfg1); #if defined(CONFIG_CPU_EXYNOS5410) timer_rate_hz = 2500000; #elif defined(CONFIG_CPU_EXYNOS5420) timer_rate_hz = 1800000; #else timer_rate_hz = get_pwm_clk() / ((prescaler + 1) * (div + 1)); #endif timer_rate_hz = timer_rate_hz / 100; /* set count value */ offset = pwm_id * 3; timer_rate_hz = -1; writel(timer_rate_hz, &pwm->tcntb0 + offset); val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id)); if (invert && (pwm_id < 4)) val |= TCON_INVERTER(pwm_id); writel(val, &pwm->tcon); pwm_enable(pwm_id); return 0; }
int pwm_enable(int pwm_id) { const struct s5p_timer *pwm = (struct s5p_timer *)samsung_get_base_timer(); unsigned long tcon; tcon = readl(&pwm->tcon); tcon |= TCON_START(pwm_id); writel(tcon, &pwm->tcon); return 0; }
unsigned long __attribute__((no_instrument_function)) timer_get_us(void) { static unsigned long base_time_us; struct s5p_timer *const timer = (struct s5p_timer *)samsung_get_base_timer(); unsigned long now_downward_us = readl(&timer->tcnto4); if (!base_time_us) base_time_us = now_downward_us; /* Note that this timer counts downward. */ return base_time_us - now_downward_us; }
/* macro to read the 16 bit timer */ static inline struct s5p_timer *s5p_get_base_timer(void) { return (struct s5p_timer *)samsung_get_base_timer(); }
int pwm_config(int pwm_id, int duty_ns, int period_ns) { const struct s5p_timer *pwm = (struct s5p_timer *)samsung_get_base_timer(); unsigned int offset; unsigned long tin_rate; unsigned long tin_ns; unsigned long period; unsigned long tcon; unsigned long tcnt; unsigned long timer_rate_hz; unsigned long tcmp; /* * We currently avoid using 64bit arithmetic by using the * fact that anything faster than 1GHz is easily representable * by 32bits. */ if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ) return -ERANGE; if (duty_ns > period_ns) return -EINVAL; period = NS_IN_HZ / period_ns; /* Check to see if we are changing the clock rate of the PWM */ tin_rate = pwm_calc_tin(pwm_id, period); timer_rate_hz = tin_rate; tin_ns = NS_IN_HZ / tin_rate; tcnt = period_ns / tin_ns; /* Note, counters count down */ tcmp = duty_ns / tin_ns; tcmp = tcnt - tcmp; /* * the pwm hw only checks the compare register after a decrement, * so the pin never toggles if tcmp = tcnt */ if (tcmp == tcnt) tcmp--; if (tcmp < 0) tcmp = 0; /* Update the PWM register block. */ offset = pwm_id * 3; if (pwm_id < 4) { writel(tcnt, &pwm->tcntb0 + offset); writel(tcmp, &pwm->tcmpb0 + offset); } tcon = readl(&pwm->tcon); tcon |= TCON_UPDATE(pwm_id); if (pwm_id < 4) tcon |= TCON_AUTO_RELOAD(pwm_id); else tcon |= TCON4_AUTO_RELOAD; writel(tcon, &pwm->tcon); tcon &= ~TCON_UPDATE(pwm_id); writel(tcon, &pwm->tcon); return 0; }