static void save_core_regs(void) { extern void save_au1xxx_intctl(void); extern void pm_eth0_shutdown(void); /* Do the serial ports.....these really should be a pm_* * registered function by the driver......but of course the * standard serial driver doesn't understand our Au1xxx * unique registers. */ sleep_uart0_inten = au_readl(UART0_ADDR + UART_IER); sleep_uart0_fifoctl = au_readl(UART0_ADDR + UART_FCR); sleep_uart0_linectl = au_readl(UART0_ADDR + UART_LCR); sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK); sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL); /* Shutdown USB host/device. */ sleep_usbhost_enable = au_readl(USB_HOST_CONFIG); /* There appears to be some undocumented reset register.... */ au_writel(0, 0xb0100004); au_sync(); au_writel(0, USB_HOST_CONFIG); au_sync(); sleep_usbdev_enable = au_readl(USBD_ENABLE); au_writel(0, USBD_ENABLE); au_sync(); /* Save interrupt controller state. */ save_au1xxx_intctl(); /* Clocks and PLLs. */ sleep_aux_pll_cntrl = au_readl(SYS_AUXPLL); /* We don't really need to do this one, but unless we * write it again it won't have a valid value if we * happen to read it. */ sleep_cpu_pll_cntrl = au_readl(SYS_CPUPLL); sleep_pin_function = au_readl(SYS_PINFUNC); /* Save the static memory controller configuration. */ sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0); sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0); sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0); sleep_static_memctlr[1][0] = au_readl(MEM_STCFG1); sleep_static_memctlr[1][1] = au_readl(MEM_STTIME1); sleep_static_memctlr[1][2] = au_readl(MEM_STADDR1); sleep_static_memctlr[2][0] = au_readl(MEM_STCFG2); sleep_static_memctlr[2][1] = au_readl(MEM_STTIME2); sleep_static_memctlr[2][2] = au_readl(MEM_STADDR2); sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3); sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3); sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3); }
static void save_core_regs(void) { extern void save_au1xxx_intctl(void); extern void pm_eth0_shutdown(void); /* * Do the serial ports.....these really should be a pm_* * registered function by the driver......but of course the * standard serial driver doesn't understand our Au1xxx * unique registers. */ sleep_uart0_inten = au_readl(UART0_ADDR + UART_IER); sleep_uart0_fifoctl = au_readl(UART0_ADDR + UART_FCR); sleep_uart0_linectl = au_readl(UART0_ADDR + UART_LCR); sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK); sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL); au_sync(); #ifndef CONFIG_SOC_AU1200 /* Shutdown USB host/device. */ sleep_usb[0] = au_readl(USB_HOST_CONFIG); /* There appears to be some undocumented reset register.... */ au_writel(0, 0xb0100004); au_sync(); au_writel(0, USB_HOST_CONFIG); au_sync(); sleep_usb[1] = au_readl(USBD_ENABLE); au_writel(0, USBD_ENABLE); au_sync(); #else /* AU1200 */ /* enable access to OTG mmio so we can save OTG CAP/MUX. * FIXME: write an OTG driver and move this stuff there! */ au_writel(au_readl(USB_MSR_BASE + 4) | (1 << 6), USB_MSR_BASE + 4); au_sync(); sleep_usb[0] = au_readl(0xb4020020); /* OTG_CAP */ sleep_usb[1] = au_readl(0xb4020024); /* OTG_MUX */ #endif /* Save interrupt controller state. */ save_au1xxx_intctl(); /* Clocks and PLLs. */ sleep_sys_clocks[0] = au_readl(SYS_FREQCTRL0); sleep_sys_clocks[1] = au_readl(SYS_FREQCTRL1); sleep_sys_clocks[2] = au_readl(SYS_CLKSRC); sleep_sys_clocks[3] = au_readl(SYS_CPUPLL); sleep_sys_clocks[4] = au_readl(SYS_AUXPLL); /* pin mux config */ sleep_sys_pinfunc = au_readl(SYS_PINFUNC); /* Save the static memory controller configuration. */ sleep_static_memctlr[0][0] = au_readl(MEM_STCFG0); sleep_static_memctlr[0][1] = au_readl(MEM_STTIME0); sleep_static_memctlr[0][2] = au_readl(MEM_STADDR0); sleep_static_memctlr[1][0] = au_readl(MEM_STCFG1); sleep_static_memctlr[1][1] = au_readl(MEM_STTIME1); sleep_static_memctlr[1][2] = au_readl(MEM_STADDR1); sleep_static_memctlr[2][0] = au_readl(MEM_STCFG2); sleep_static_memctlr[2][1] = au_readl(MEM_STTIME2); sleep_static_memctlr[2][2] = au_readl(MEM_STADDR2); sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3); sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3); sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3); #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) au1xxx_dbdma_suspend(); #endif }