void au1000_restart(char *command) { /* Set all integrated peripherals to disabled states */ u32 prid = read_32bit_cp0_register(CP0_PRID); printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n"); switch (prid & 0xFF000000) { case 0x00000000: /* Au1000 */ outl(0x02, 0xb0000010); /* ac97_enable */ outl(0x08, 0xb017fffc); /* usbh_enable - early errata */ asm("sync"); outl(0x00, 0xb017fffc); /* usbh_enable */ outl(0x00, 0xb0200058); /* usbd_enable */ outl(0x00, 0xb0300040); /* ir_enable */ outl(0x00, 0xb0520000); /* macen0 */ outl(0x00, 0xb0520004); /* macen1 */ outl(0x00, 0xb1000008); /* i2s_enable */ outl(0x00, 0xb1100100); /* uart0_enable */ outl(0x00, 0xb1200100); /* uart1_enable */ outl(0x00, 0xb1300100); /* uart2_enable */ outl(0x00, 0xb1400100); /* uart3_enable */ outl(0x02, 0xb1600100); /* ssi0_enable */ outl(0x02, 0xb1680100); /* ssi1_enable */ outl(0x00, 0xb1900020); /* sys_freqctrl0 */ outl(0x00, 0xb1900024); /* sys_freqctrl1 */ outl(0x00, 0xb1900028); /* sys_clksrc */ outl(0x00, 0xb1900100); /* sys_pininputen */ break; case 0x01000000: /* Au1500 */ outl(0x02, 0xb0000010); /* ac97_enable */ outl(0x08, 0xb017fffc); /* usbh_enable - early errata */ asm("sync"); outl(0x00, 0xb017fffc); /* usbh_enable */ outl(0x00, 0xb0200058); /* usbd_enable */ outl(0x00, 0xb1520000); /* macen0 */ outl(0x00, 0xb1520004); /* macen1 */ outl(0x00, 0xb1100100); /* uart0_enable */ outl(0x00, 0xb1400100); /* uart3_enable */ outl(0x00, 0xb1900020); /* sys_freqctrl0 */ outl(0x00, 0xb1900024); /* sys_freqctrl1 */ outl(0x00, 0xb1900028); /* sys_clksrc */ outl(0x00, 0xb1900100); /* sys_pininputen */ default: break; } set_cp0_status((ST0_BEV | ST0_ERL)); set_cp0_config(CONF_CM_UNCACHED); flush_cache_all(); write_32bit_cp0_register(CP0_WIRED, 0); __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000)); }
void prom_init_secondary(void) { /* Set up kseg0 to be cachable coherent */ clear_cp0_config(CONF_CM_CMASK); set_cp0_config(0x5); /* Enable interrupts for lines 0-4 */ clear_cp0_status(0xe000); set_cp0_status(0x1f01); }
void __init au1500_setup(void) { char *argptr; u32 pin_func, static_cfg0; u32 sys_freqctrl, sys_clksrc; argptr = prom_getcmdline(); /* NOTE: The memory map is established by YAMON 2.08+ */ /* Various early Au1500 Errata corrected by this */ set_cp0_config(1<<19); /* Config[OD] */ #ifdef CONFIG_AU1000_SERIAL_CONSOLE if ((argptr = strstr(argptr, "console=")) == NULL) { argptr = prom_getcmdline(); strcat(argptr, " console=ttyS0,115200"); } #endif #ifdef CONFIG_SOUND_AU1000 strcat(argptr, " au1000_audio=vra"); argptr = prom_getcmdline(); #endif _machine_restart = au1000_restart; _machine_halt = au1000_halt; _machine_power_off = au1000_power_off; // IO/MEM resources. set_io_port_base(0); ioport_resource.start = 0x10000000; ioport_resource.end = 0xffffffff; iomem_resource.start = 0x10000000; iomem_resource.end = 0xffffffff; #ifdef CONFIG_BLK_DEV_INITRD ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0); initrd_start = (unsigned long)&__rd_start; initrd_end = (unsigned long)&__rd_end; #endif // set AUX clock to 12MHz * 8 = 96 MHz au_writel(8, SYS_AUXPLL); au_writel(0, SYS_PINSTATERD); udelay(100); #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE) #ifdef CONFIG_USB_OHCI if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) { char usb_args[80]; argptr = prom_getcmdline(); memset(usb_args, 0, sizeof(usb_args)); sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d", USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT); strcat(argptr, usb_args); } #endif /* zero and disable FREQ2 */ sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl &= ~0xFFF00000; au_writel(sys_freqctrl, SYS_FREQCTRL0); /* zero and disable USBH/USBD clocks */ sys_clksrc = au_readl(SYS_CLKSRC); sys_clksrc &= ~0x00007FE0; au_writel(sys_clksrc, SYS_CLKSRC); sys_freqctrl = au_readl(SYS_FREQCTRL0); sys_freqctrl &= ~0xFFF00000; sys_clksrc = au_readl(SYS_CLKSRC); sys_clksrc &= ~0x00007FE0; // FREQ2 = aux/2 = 48 MHz sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); au_writel(sys_freqctrl, SYS_FREQCTRL0); /* * Route 48MHz FREQ2 into USB Host and/or Device */ #ifdef CONFIG_USB_OHCI sys_clksrc |= ((4<<12) | (0<<11) | (0<<10)); #endif #ifdef CONFIG_AU1000_USB_DEVICE sys_clksrc |= ((4<<7) | (0<<6) | (0<<5)); #endif au_writel(sys_clksrc, SYS_CLKSRC); pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); #ifndef CONFIG_AU1000_USB_DEVICE // 2nd USB port is USB host pin_func |= 0x8000; #endif au_writel(pin_func, SYS_PINFUNC); #endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE) #ifdef CONFIG_USB_OHCI // enable host controller and wait for reset done au_writel(0x08, USB_HOST_CONFIG); udelay(1000); au_writel(0x0c, USB_HOST_CONFIG); udelay(1000); au_readl(USB_HOST_CONFIG); while (!(au_readl(USB_HOST_CONFIG) & 0x10)) ; au_readl(USB_HOST_CONFIG); #endif #ifdef CONFIG_FB conswitchp = &dummy_con; #endif #ifdef CONFIG_FB_E1356 if ((argptr = strstr(argptr, "video=")) == NULL) { argptr = prom_getcmdline(); strcat(argptr, " video=e1356fb:system:pb1500"); } #elif defined (CONFIG_FB_XPERT98) if ((argptr = strstr(argptr, "video=")) == NULL) { argptr = prom_getcmdline(); strcat(argptr, " video=atyfb:1024x768-8@70"); } #endif // CONFIG_FB_E1356 #ifndef CONFIG_SERIAL_NONSTANDARD /* don't touch the default serial console */ au_writel(0, UART0_ADDR + UART_CLK); #endif au_writel(0, UART3_ADDR + UART_CLK); #ifdef CONFIG_BLK_DEV_IDE ide_ops = &std_ide_ops; #endif #ifdef CONFIG_PCI // Setup PCI bus controller au_writel(0, Au1500_PCI_CMEM); au_writel(0x00003fff, Au1500_CFG_BASE); #if defined(__MIPSEB__) au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG); #else au_writel(0xf, Au1500_PCI_CFG); #endif au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); au_writel(0, Au1500_PCI_MWBASE_REV_CCL); au_writel(0x02a00356, Au1500_PCI_STATCMD); au_writel(0x00003c04, Au1500_PCI_HDRTYPE); au_writel(0x00000008, Au1500_PCI_MBAR); au_sync(); #endif while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S); au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL); au_sync(); while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S); au_writel(0, SYS_TOYTRIM); /* Enable BCLK switching */ au_writel(0x00000060, 0xb190003c); #ifdef CONFIG_RTC rtc_ops = &pb1500_rtc_ops; // Enable the RTC if not already enabled if (!(au_readl(0xac000028) & 0x20)) { printk("enabling clock ...\n"); au_writel((au_readl(0xac000028) | 0x20), 0xac000028); } // Put the clock in BCD mode if (readl(0xac00002C) & 0x4) { /* reg B */ au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); au_sync(); } #endif }