void serial_keyboard_device::device_reset()
{
generic_keyboard_device::device_reset();
m_rbit = 1;
if(m_slot)
m_owner->out_rx(m_rbit);
else
m_out_tx_func(m_rbit);
UINT8 val = m_io_term_frame->read();
set_tra_rate(rates[val & 0x0f]);
switch(val & 0x30)
{
case 0x10:
set_data_frame(7, 1, SERIAL_PARITY_EVEN);
break;
case 0x00:
default:
set_data_frame(8, 1, SERIAL_PARITY_NONE);
break;
case 0x20:
set_data_frame(8, 2, SERIAL_PARITY_NONE);
break;
case 0x30:
set_data_frame(8, 1, SERIAL_PARITY_EVEN);
break;
}
}
void midiout_device::device_reset()
{
// we don't Tx, we Rx at 31250 8-N-1
set_rcv_rate(31250);
set_tra_rate(0);
set_data_frame(8, 1, PARITY_NONE, false);
}
//-------------------------------------------------
// update_serial -
//-------------------------------------------------
void z80sio_channel::update_serial()
{
int data_bit_count = get_rx_word_length();
stop_bits_t stop_bits = get_stop_bits();
parity_t parity;
LOG(("Z80SIO update_serial\n"));
if (m_wr4 & WR4_PARITY_ENABLE)
{
if (m_wr4 & WR4_PARITY_EVEN)
parity = PARITY_EVEN;
else
parity = PARITY_ODD;
}
else
parity = PARITY_NONE;
set_data_frame(1, data_bit_count, parity, stop_bits);
int clocks = get_clock_mode();
if (m_rxc > 0)
{
set_rcv_rate(m_rxc / clocks);
}
if (m_txc > 0)
{
set_tra_rate(m_txc / clocks);
}
receive_register_reset(); // if stop bits is changed from 0, receive register has to be reset
}
void jvc_xvd701_device::device_start()
{
int startbits = 1;
int databits = 8;
parity_t parity = PARITY_ODD;
stop_bits_t stopbits = STOP_BITS_1;
set_data_frame(startbits, databits, parity, stopbits);
int txbaud = 9600;
set_tra_rate(txbaud);
int rxbaud = 9600;
set_rcv_rate(rxbaud);
output_rxd(1);
// TODO: make this configurable
output_dcd(0);
output_dsr(0);
output_ri(0);
output_cts(0);
m_timer_response = timer_alloc(TIMER_RESPONSE);
}
void wangpc_keyboard_device::device_start()
{
// set serial callbacks
m_maincpu->i8051_set_serial_tx_callback(WRITE8_DELEGATE(wangpc_keyboard_device, mcs51_tx_callback));
m_maincpu->i8051_set_serial_rx_callback(READ8_DELEGATE(wangpc_keyboard_device, mcs51_rx_callback));
set_data_frame(8, 2, PARITY_NONE, false);
}
void midiout_device::device_reset()
{
// we don't Tx, we Rx at 31250 8-N-1
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rcv_rate(31250);
set_tra_rate(0);
}
void sb_device::device_reset()
{
m_dsp.prot_value = 0xaa;
m_dsp.prot_count = 0;
m_dack_out = 0;
m_dsp.fifo_ptr = 0;
m_dsp.fifo_r_ptr = 0;
m_dsp.wbuf_status = 0;
m_dsp.rbuf_status = 0;
m_dsp.frequency = 8000; // per stereo-fx
m_dsp.irq_active = 0;
m_dsp.dma_no_irq = false;
mixer_reset();
m_onebyte_midi = false;
m_uart_midi = false;
m_uart_irq = false;
m_mpu_midi = false;
m_tx_busy = false;
m_xmit_read = m_xmit_write = 0;
m_recv_read = m_recv_write = 0;
m_rx_waiting = m_tx_waiting = 0;
// MIDI is 31250 baud, 8-N-1
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rate(31250);
}
void apollo_kbd_device::device_reset()
{
LOG1(("reset apollo_kbd"));
m_beeper.reset();
m_mouse.reset();
// init keyboard
m_loopback_mode = 1;
m_mode = KBD_MODE_0_COMPATIBILITY;
m_delay = 500;
m_repeat = 33;
m_last_pressed = 0;
memset(m_keytime, 0, sizeof(m_keytime));
memset(m_keyon, 0, sizeof(m_keyon));
// start timer
m_timer->adjust( attotime::zero, 0, attotime::from_msec(5)); // every 5ms
// keyboard comms is at 8E1, 1200 baud
set_data_frame(1, 8, PARITY_EVEN, STOP_BITS_1);
set_rcv_rate(1200);
set_tra_rate(1200);
m_tx_busy = false;
m_xmit_read = m_xmit_write = 0;
}
void z80dart_channel::update_serial()
{
int clocks = get_clock_mode();
if (m_rxc > 0)
{
set_rcv_rate(m_rxc / clocks);
}
if (m_txc > 0)
{
set_tra_rate(m_txc / clocks);
}
int num_data_bits = get_rx_word_length();
int stop_bit_count = get_stop_bits();
int parity_code = SERIAL_PARITY_NONE;
if (m_wr[1] & WR4_PARITY_ENABLE)
{
if (m_wr[1] & WR4_PARITY_EVEN)
parity_code = SERIAL_PARITY_EVEN;
else
parity_code = SERIAL_PARITY_ODD;
}
set_data_frame(num_data_bits, stop_bit_count, parity_code);
}
void lk201_device::device_reset()
{
m_beeper->adjust(attotime::never);
m_speaker->set_state(0);
m_speaker->set_output_gain(0, 0);
ddrs[0] = ddrs[1] = ddrs[2] = 0;
ports[0] = ports[1] = ports[2] = 0;
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rate(4800);
m_count->adjust(attotime::from_hz(1200), 0, attotime::from_hz(1200));
memset(m_timer.regs, 0, sizeof(m_timer.regs));
sci_status = (SCSR_TC | SCSR_TDRE);
spi_status = 0;
spi_data = 0;
kbd_data = 0;
led_data = 0;
transmit_register_reset();
receive_register_reset();
}
void z80dart_channel::update_serial()
{
int data_bit_count = get_rx_word_length();
stop_bits_t stop_bits = get_stop_bits();
parity_t parity;
if (m_wr[4] & WR4_PARITY_ENABLE)
{
if (m_wr[4] & WR4_PARITY_EVEN)
parity = PARITY_EVEN;
else
parity = PARITY_ODD;
}
else
parity = PARITY_NONE;
set_data_frame(1, data_bit_count, parity, stop_bits);
int clocks = get_clock_mode();
if (m_rxc > 0)
{
set_rcv_rate(m_rxc / clocks);
}
if (m_txc > 0)
{
set_tra_rate(m_txc / clocks);
}
receive_register_reset(); // if stop bits is changed from 0, receive register has to be reset (FIXME: doing this without checking is stupid)
}
void z80dart_channel::update_serial()
{
int data_bit_count = get_rx_word_length();
stop_bits_t stop_bits = get_stop_bits();
parity_t parity;
if (m_wr[4] & WR4_PARITY_ENABLE)
{
if (m_wr[4] & WR4_PARITY_EVEN)
parity = PARITY_EVEN;
else
parity = PARITY_ODD;
}
else
parity = PARITY_NONE;
set_data_frame(1, data_bit_count, parity, stop_bits);
int clocks = get_clock_mode();
if (m_rxc > 0)
{
set_rcv_rate(m_rxc / clocks);
}
if (m_txc > 0)
{
set_tra_rate(m_txc / clocks);
}
}
void octopus_keyboard_device::device_reset()
{
buffered_rs232_device::device_reset();
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rcv_rate(1200);
set_tra_rate(9600);
receive_register_reset();
transmit_register_reset();
m_enabled = 0;
m_delay = 500; // 3*100+200
m_repeat = 110; // 4^2*5+30
stop_processing();
reset_key_state();
typematic_stop();
clear_fifo();
output_dcd(0);
output_dsr(0);
output_cts(0);
output_rxd(1);
start_processing(attotime::from_hz(9600));
}
void midi_keyboard_device::device_start()
{
set_data_frame(8, 1, SERIAL_PARITY_NONE); //8N1?
set_tra_rate(clock());
m_out_tx_func.resolve_safe();
m_head = m_tail = 0;
m_keyboard_timer = timer_alloc();
m_keyboard_timer->adjust(attotime::from_msec(10), 0, attotime::from_msec(10));
}
void midiin_device::device_reset()
{
m_tx_busy = false;
m_xmit_read = m_xmit_write = 0;
// we don't Rx, we Tx at 31250 8-N-1
set_rcv_rate(0);
set_tra_rate(31250);
set_data_frame(8, 1, SERIAL_PARITY_NONE);
}
void midiin_device::device_reset()
{
m_tx_busy = false;
m_xmit_read = m_xmit_write = 0;
// we don't Rx, we Tx at 31250 8-N-1
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rcv_rate(0);
set_tra_rate(31250);
}
void mos6551_device::update_serial()
{
int brg = m_ctrl & CTRL_BRG_MASK;
if (brg == CTRL_BRG_16X_EXTCLK)
{
set_rcv_rate(m_ext_rxc / 16);
set_tra_rate(m_ext_rxc / 16);
}
else
{
int baud = clock() / brg_divider[brg] / 16;
set_tra_rate(baud);
if (m_ctrl & CTRL_RXC_BRG)
{
set_rcv_rate(baud);
}
else
{
set_rcv_rate(m_ext_rxc / 16);
}
int num_data_bits = 8;
int stop_bit_count = 1;
int parity_code = PARITY_NONE;
switch (m_ctrl & CTRL_WL_MASK)
{
case CTRL_WL_8: num_data_bits = 8; break;
case CTRL_WL_7: num_data_bits = 7; break;
case CTRL_WL_6: num_data_bits = 6; break;
case CTRL_WL_5: num_data_bits = 5; break;
}
set_data_frame(num_data_bits, stop_bit_count, parity_code, false);
}
if (m_cmd & CMD_DTR)
m_connection_state |= DTR;
else
m_connection_state &= ~DTR;
m_dtr_handler((m_connection_state & DTR) ? 0 : 1);
if ((m_cmd & CMD_TC_MASK) == CMD_TC_RTS_HI)
m_connection_state &= ~RTS;
else
m_connection_state |= RTS;
m_rts_handler((m_connection_state & RTS) ? 0 : 1);
serial_connection_out();
}
void graph_link_hle_device::device_reset()
{
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rate(9600);
receive_register_reset();
transmit_register_reset();
m_head = m_tail = 0;
m_empty = true;
m_ready = true;
}
void serial_keyboard_device::device_start()
{
int baud = clock();
if(!baud) baud = 9600;
m_owner = dynamic_cast<serial_port_device *>(owner());
m_out_tx_func.resolve(m_out_tx_cb, *this);
m_slot = m_owner && 1;
m_timer = timer_alloc();
set_tra_rate(baud);
set_data_frame(8, 1, SERIAL_PARITY_NONE);
}
void wangpc_keyboard_device::device_start()
{
m_txd_handler.resolve_safe();
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_2);
set_rcv_rate(62500);
//set_tra_rate(62500);
save_item(NAME(m_keylatch));
save_item(NAME(m_rxd));
}
void esqpanel_device::device_reset()
{
// panel comms is at 62500 baud (double the MIDI rate), 8N2
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_2);
set_rcv_rate(62500);
set_tra_rate(62500);
m_tx_busy = false;
m_xmit_read = m_xmit_write = 0;
m_bCalibSecondByte = false;
m_bButtonLightSecondByte = false;
}
void apricot_keyboard_hle_device::device_reset()
{
clear_fifo();
receive_register_reset();
transmit_register_reset();
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rcv_rate(7800);
set_tra_rate(7800);
reset_key_state();
start_processing(attotime::from_hz(7800));
}
void snes_miracle_device::device_reset()
{
m_strobe_on = 0;
m_sent_bits = 0;
m_strobe_clock = 0;
m_midi_mode = MIRACLE_MIDI_WAITING;
// set standard MIDI parameters
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rcv_rate(31250);
set_tra_rate(31250);
m_xmit_read = m_xmit_write = 0;
m_recv_read = m_recv_write = 0;
m_read_status = m_status_bit = false;
m_tx_busy = false;
}
void m20_keyboard_device::device_reset()
{
buffered_rs232_device::device_reset();
reset_key_state();
clear_fifo();
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_2);
set_rate(1'200);
receive_register_reset();
transmit_register_reset();
output_dcd(0);
output_dsr(0);
output_cts(0);
output_rxd(1);
start_processing(attotime::from_hz(1'200));
}
void ym3802_device::set_comms_mode()
{
uint8_t data_bits = (m_reg[REG_TMR] & 0x20) ? 7 : 8;
parity_t parity;
stop_bits_t stop_bits = (m_reg[REG_TMR] & 0x02) ? STOP_BITS_2 : STOP_BITS_1;
if(!(m_reg[REG_TMR] & 0x10)) // parity enable
parity = PARITY_NONE;
else
{
if(m_reg[REG_TMR] & 0x04)
parity = PARITY_ODD;
else
parity = PARITY_EVEN;
// TODO: 4-bit parity
}
set_data_frame(1, data_bits, parity, stop_bits);
logerror("MIDI comms set to 1 start bit, %i data bits, %s, parity = %i\n",data_bits, (stop_bits == STOP_BITS_2) ? "2 stop bits" : "1 stop bit", parity);
}
void x68k_keyboard_device::device_reset()
{
buffered_rs232_device::device_reset();
set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1);
set_rate(38'400); // TODO: Should be 2400 but MC68901 doesn't support divide by 16
receive_register_reset();
transmit_register_reset();
m_enabled = 0;
m_delay = 500; // 3*100+200
m_repeat = 110; // 4^2*5+30
stop_processing();
reset_key_state();
typematic_stop();
clear_fifo();
output_dcd(0);
output_dsr(0);
output_cts(0);
output_rxd(1);
}
//-------------------------------------------------
// update_serial -
//-------------------------------------------------
void z80sio_channel::update_serial()
{
int data_bit_count = get_rx_word_length();
stop_bits_t stop_bits = get_stop_bits();
parity_t parity;
LOG("%s\n", FUNCNAME);
if (m_wr4 & WR4_PARITY_ENABLE)
{
LOG("- Parity enabled\n");
if (m_wr4 & WR4_PARITY_EVEN)
parity = PARITY_EVEN;
else
parity = PARITY_ODD;
}
else
parity = PARITY_NONE;
set_data_frame(1, data_bit_count, parity, stop_bits);
int clocks = get_clock_mode();
if (m_rxc > 0)
{
LOG("- RxC:%d/%d = %d\n", m_rxc, clocks, m_rxc / clocks);
set_rcv_rate(m_rxc / clocks);
}
if (m_txc > 0)
{
LOG("- TxC:%d/%d = %d\n", m_txc, clocks, m_txc / clocks);
set_tra_rate(m_txc / clocks);
}
receive_register_reset(); // if stop bits is changed from 0, receive register has to be reset
}
void mc68901_device::register_w(offs_t offset, uint8_t data)
{
switch (offset)
{
case REGISTER_GPIP:
LOG("MC68901 General Purpose I/O : %x\n", data);
m_gpip = data;
gpio_output();
break;
case REGISTER_AER:
LOG("MC68901 Active Edge Register : %x\n", data);
m_aer = data;
break;
case REGISTER_DDR:
LOG("MC68901 Data Direction Register : %x\n", data);
m_ddr = data;
gpio_output();
break;
case REGISTER_IERA:
LOG("MC68901 Interrupt Enable Register A : %x\n", data);
m_ier = (data << 8) | (m_ier & 0xff);
m_ipr &= m_ier;
check_interrupts();
break;
case REGISTER_IERB:
LOG("MC68901 Interrupt Enable Register B : %x\n", data);
m_ier = (m_ier & 0xff00) | data;
m_ipr &= m_ier;
check_interrupts();
break;
case REGISTER_IPRA:
LOG("MC68901 Interrupt Pending Register A : %x\n", data);
m_ipr &= (data << 8) | (m_ipr & 0xff);
check_interrupts();
break;
case REGISTER_IPRB:
LOG("MC68901 Interrupt Pending Register B : %x\n", data);
m_ipr &= (m_ipr & 0xff00) | data;
check_interrupts();
break;
case REGISTER_ISRA:
LOG("MC68901 Interrupt In-Service Register A : %x\n", data);
m_isr &= (data << 8) | (m_isr & 0xff);
break;
case REGISTER_ISRB:
LOG("MC68901 Interrupt In-Service Register B : %x\n", data);
m_isr &= (m_isr & 0xff00) | data;
break;
case REGISTER_IMRA:
LOG("MC68901 Interrupt Mask Register A : %x\n", data);
m_imr = (data << 8) | (m_imr & 0xff);
m_isr &= m_imr;
check_interrupts();
break;
case REGISTER_IMRB:
LOG("MC68901 Interrupt Mask Register B : %x\n", data);
m_imr = (m_imr & 0xff00) | data;
m_isr &= m_imr;
check_interrupts();
break;
case REGISTER_VR:
LOG("MC68901 Interrupt Vector : %x\n", data & 0xf0);
m_vr = data & 0xf8;
if (m_vr & VR_S)
{
LOG("MC68901 Software End-Of-Interrupt Mode\n");
}
else
{
LOG("MC68901 Automatic End-Of-Interrupt Mode\n");
m_isr = 0;
}
break;
case REGISTER_TACR:
m_tacr = data & 0x1f;
switch (m_tacr & 0x0f)
{
case TCR_TIMER_STOPPED:
LOG("MC68901 Timer A Stopped\n");
m_timer[TIMER_A]->enable(false);
break;
case TCR_TIMER_DELAY_4:
case TCR_TIMER_DELAY_10:
case TCR_TIMER_DELAY_16:
case TCR_TIMER_DELAY_50:
case TCR_TIMER_DELAY_64:
case TCR_TIMER_DELAY_100:
case TCR_TIMER_DELAY_200:
{
int divisor = PRESCALER[m_tacr & 0x07];
LOG("MC68901 Timer A Delay Mode : %u Prescale\n", divisor);
m_timer[TIMER_A]->adjust(attotime::from_hz(m_timer_clock / divisor), 0, attotime::from_hz(m_timer_clock / divisor));
}
break;
case TCR_TIMER_EVENT:
LOG("MC68901 Timer A Event Count Mode\n");
m_timer[TIMER_A]->enable(false);
break;
case TCR_TIMER_PULSE_4:
case TCR_TIMER_PULSE_10:
case TCR_TIMER_PULSE_16:
case TCR_TIMER_PULSE_50:
case TCR_TIMER_PULSE_64:
case TCR_TIMER_PULSE_100:
case TCR_TIMER_PULSE_200:
{
int divisor = PRESCALER[m_tacr & 0x07];
LOG("MC68901 Timer A Pulse Width Mode : %u Prescale\n", divisor);
m_timer[TIMER_A]->adjust(attotime::never, 0, attotime::from_hz(m_timer_clock / divisor));
m_timer[TIMER_A]->enable(false);
}
break;
}
if (m_tacr & TCR_TIMER_RESET)
{
LOG("MC68901 Timer A Reset\n");
m_to[TIMER_A] = 0;
m_out_tao_cb(m_to[TIMER_A]);
}
break;
case REGISTER_TBCR:
m_tbcr = data & 0x1f;
switch (m_tbcr & 0x0f)
{
case TCR_TIMER_STOPPED:
LOG("MC68901 Timer B Stopped\n");
m_timer[TIMER_B]->enable(false);
break;
case TCR_TIMER_DELAY_4:
case TCR_TIMER_DELAY_10:
case TCR_TIMER_DELAY_16:
case TCR_TIMER_DELAY_50:
case TCR_TIMER_DELAY_64:
case TCR_TIMER_DELAY_100:
case TCR_TIMER_DELAY_200:
{
int divisor = PRESCALER[m_tbcr & 0x07];
LOG("MC68901 Timer B Delay Mode : %u Prescale\n", divisor);
m_timer[TIMER_B]->adjust(attotime::from_hz(m_timer_clock / divisor), 0, attotime::from_hz(m_timer_clock / divisor));
}
break;
case TCR_TIMER_EVENT:
LOG("MC68901 Timer B Event Count Mode\n");
m_timer[TIMER_B]->enable(false);
break;
case TCR_TIMER_PULSE_4:
case TCR_TIMER_PULSE_10:
case TCR_TIMER_PULSE_16:
case TCR_TIMER_PULSE_50:
case TCR_TIMER_PULSE_64:
case TCR_TIMER_PULSE_100:
case TCR_TIMER_PULSE_200:
{
int divisor = PRESCALER[m_tbcr & 0x07];
LOG("MC68901 Timer B Pulse Width Mode : %u Prescale\n", DIVISOR);
m_timer[TIMER_B]->adjust(attotime::never, 0, attotime::from_hz(m_timer_clock / divisor));
m_timer[TIMER_B]->enable(false);
}
break;
}
if (m_tacr & TCR_TIMER_RESET)
{
LOG("MC68901 Timer B Reset\n");
m_to[TIMER_B] = 0;
m_out_tbo_cb(m_to[TIMER_B]);
}
break;
case REGISTER_TCDCR:
m_tcdcr = data & 0x77;
switch (m_tcdcr & 0x07)
{
case TCR_TIMER_STOPPED:
LOG("MC68901 Timer D Stopped\n");
m_timer[TIMER_D]->enable(false);
break;
case TCR_TIMER_DELAY_4:
case TCR_TIMER_DELAY_10:
case TCR_TIMER_DELAY_16:
case TCR_TIMER_DELAY_50:
case TCR_TIMER_DELAY_64:
case TCR_TIMER_DELAY_100:
case TCR_TIMER_DELAY_200:
{
int divisor = PRESCALER[m_tcdcr & 0x07];
LOG("MC68901 Timer D Delay Mode : %u Prescale\n", divisor);
m_timer[TIMER_D]->adjust(attotime::from_hz(m_timer_clock / divisor), 0, attotime::from_hz(m_timer_clock / divisor));
}
break;
}
switch ((m_tcdcr >> 4) & 0x07)
{
case TCR_TIMER_STOPPED:
LOG("MC68901 Timer C Stopped\n");
m_timer[TIMER_C]->enable(false);
break;
case TCR_TIMER_DELAY_4:
case TCR_TIMER_DELAY_10:
case TCR_TIMER_DELAY_16:
case TCR_TIMER_DELAY_50:
case TCR_TIMER_DELAY_64:
case TCR_TIMER_DELAY_100:
case TCR_TIMER_DELAY_200:
{
int divisor = PRESCALER[(m_tcdcr >> 4) & 0x07];
LOG("MC68901 Timer C Delay Mode : %u Prescale\n", divisor);
m_timer[TIMER_C]->adjust(attotime::from_hz(m_timer_clock / divisor), 0, attotime::from_hz(m_timer_clock / divisor));
}
break;
}
break;
case REGISTER_TADR:
LOG("MC68901 Timer A Data Register : %x\n", data);
m_tdr[TIMER_A] = data;
if (!m_timer[TIMER_A]->enabled())
{
m_tmc[TIMER_A] = data;
}
break;
case REGISTER_TBDR:
LOG("MC68901 Timer B Data Register : %x\n", data);
m_tdr[TIMER_B] = data;
if (!m_timer[TIMER_B]->enabled())
{
m_tmc[TIMER_B] = data;
}
break;
case REGISTER_TCDR:
LOG("MC68901 Timer C Data Register : %x\n", data);
m_tdr[TIMER_C] = data;
if (!m_timer[TIMER_C]->enabled())
{
m_tmc[TIMER_C] = data;
}
break;
case REGISTER_TDDR:
LOG("MC68901 Timer D Data Register : %x\n", data);
m_tdr[TIMER_D] = data;
if (!m_timer[TIMER_D]->enabled())
{
m_tmc[TIMER_D] = data;
}
break;
case REGISTER_SCR:
LOG("MC68901 Sync Character : %x\n", data);
m_scr = data;
break;
case REGISTER_UCR:
{
int data_bit_count;
switch (data & 0x60)
{
case UCR_WORD_LENGTH_8: default: data_bit_count = 8; break;
case UCR_WORD_LENGTH_7: data_bit_count = 7; break;
case UCR_WORD_LENGTH_6: data_bit_count = 6; break;
case UCR_WORD_LENGTH_5: data_bit_count = 5; break;
}
parity_t parity;
if (data & UCR_PARITY_ENABLED)
{
if (data & UCR_PARITY_EVEN)
{
LOG("MC68901 Parity : Even\n");
parity = PARITY_EVEN;
}
else
{
LOG("MC68901 Parity : Odd\n");
parity = PARITY_ODD;
}
}
else
{
LOG("MC68901 Parity : Disabled\n");
parity = PARITY_NONE;
}
LOG("MC68901 Word Length : %u bits\n", data_bit_count);
int start_bits;
stop_bits_t stop_bits;
switch (data & 0x18)
{
case UCR_START_STOP_0_0:
default:
start_bits = 0;
stop_bits = STOP_BITS_0;
LOG("MC68901 Start Bits : 0, Stop Bits : 0, Format : synchronous\n");
break;
case UCR_START_STOP_1_1:
start_bits = 1;
stop_bits = STOP_BITS_1;
LOG("MC68901 Start Bits : 1, Stop Bits : 1, Format : asynchronous\n");
break;
case UCR_START_STOP_1_15:
start_bits = 1;
stop_bits = STOP_BITS_1_5;
LOG("MC68901 Start Bits : 1, Stop Bits : 1.5, Format : asynchronous\n");
break;
case UCR_START_STOP_1_2:
start_bits = 1;
stop_bits = STOP_BITS_2;
LOG("MC68901 Start Bits : 1, Stop Bits : 2, Format : asynchronous\n");
break;
}
if (data & UCR_CLOCK_DIVIDE_16)
{
LOG("MC68901 Rx/Tx Clock Divisor : 16\n");
}
else
{
LOG("MC68901 Rx/Tx Clock Divisor : 1\n");
}
set_data_frame(start_bits, data_bit_count, parity, stop_bits);
receive_register_reset();
m_ucr = data;
}
break;
case REGISTER_RSR:
if ((data & RSR_RCV_ENABLE) == 0)
{
LOG("MC68901 Receiver Disabled\n");
m_rsr = 0;
}
else
{
LOG("MC68901 Receiver Enabled\n");
if (data & RSR_SYNC_STRIP_ENABLE)
{
LOG("MC68901 Sync Strip Enabled\n");
}
else
{
LOG("MC68901 Sync Strip Disabled\n");
}
if (data & RSR_FOUND_SEARCH)
LOG("MC68901 Receiver Search Mode Enabled\n");
m_rsr = data & 0x0b;
}
break;
case REGISTER_TSR:
m_tsr = (m_tsr & (TSR_BUFFER_EMPTY | TSR_UNDERRUN_ERROR | TSR_END_OF_XMIT)) | (data & ~(TSR_BUFFER_EMPTY | TSR_UNDERRUN_ERROR | TSR_END_OF_XMIT));
if ((data & TSR_XMIT_ENABLE) == 0)
{
LOG("MC68901 Transmitter Disabled\n");
m_tsr &= ~TSR_UNDERRUN_ERROR;
if (is_transmit_register_empty())
m_tsr |= TSR_END_OF_XMIT;
}
else
{
LOG("MC68901 Transmitter Enabled\n");
switch (data & 0x06)
{
case TSR_OUTPUT_HI_Z:
LOG("MC68901 Transmitter Disabled Output State : Hi-Z\n");
break;
case TSR_OUTPUT_LOW:
LOG("MC68901 Transmitter Disabled Output State : 0\n");
break;
case TSR_OUTPUT_HIGH:
LOG("MC68901 Transmitter Disabled Output State : 1\n");
break;
case TSR_OUTPUT_LOOP:
LOG("MC68901 Transmitter Disabled Output State : Loop\n");
break;
}
if (data & TSR_BREAK)
{
LOG("MC68901 Transmitter Break Enabled\n");
}
else
{
LOG("MC68901 Transmitter Break Disabled\n");
}
if (data & TSR_AUTO_TURNAROUND)
{
LOG("MC68901 Transmitter Auto Turnaround Enabled\n");
}
else
{
LOG("MC68901 Transmitter Auto Turnaround Disabled\n");
}
m_tsr &= ~TSR_END_OF_XMIT;
if (m_transmit_pending && is_transmit_register_empty())
{
transmit_register_setup(m_transmit_buffer);
m_transmit_pending = false;
}
if (!m_transmit_pending)
m_tsr |= TSR_BUFFER_EMPTY;
}
break;
case REGISTER_UDR:
LOG("MC68901 UDR %x\n", data);
m_transmit_buffer = data;
m_transmit_pending = true;
m_tsr &= ~TSR_BUFFER_EMPTY;
if ((m_tsr & TSR_XMIT_ENABLE) && is_transmit_register_empty())
{
transmit_register_setup(m_transmit_buffer);
m_transmit_pending = false;
m_tsr |= TSR_BUFFER_EMPTY;
}
break;
}
}
