static int __init bcm53000_pcibios_init(void)
{
ulong flags;
extern int pci_probe_only;
pci_probe_only = 1;
if (!(sih = si_kattach(SI_OSH)))
panic("sb_kattach failed");
spin_lock_init(&sih_lock);
spin_lock_irqsave(&sih_lock, flags);
hndpci_init(sih);
spin_unlock_irqrestore(&sih_lock, flags);
register_pci_controller(&bcm53000_controller_port0);
register_pci_controller(&bcm53000_controller_port1);
return 0;
}
static int __devinit bcm5301x_hwinit(struct bcm5301x_i2c_data *pdata)
{
si_t *sih;
chipcommonbregs_t *ccb;
sih = si_kattach(SI_OSH);
if (!sih) {
BCM5301X_MSG_ERR("can't get sih");
return -ENXIO;
}
ccb = si_setcore(sih, NS_CCB_CORE_ID, 0);
if (!ccb) {
BCM5301X_MSG_ERR("can't get ccb");
return -ENXIO;
}
pdata->ccb = ccb;
bcm5301x_reset_and_en(pdata);
return 0;
}
/* Read the flash ID and set the globals */
int
sysFlashInit(char *flash_str)
{
osl_t *osh;
uint32 fltype = PFLASH;
uint16 flash_vendid = 0;
uint16 flash_devid = 0;
int idx;
struct sflash *sflash;
/*
* Check for serial flash.
*/
sih = si_kattach(SI_OSH);
ASSERT(sih);
osh = si_osh(sih);
cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc);
flashutl_base = (void *)OSL_UNCACHED((uintptr)SI_FLASH2);
/* Select SFLASH ? */
fltype = R_REG(osh, &cc->capabilities) & CC_CAP_FLASH_MASK;
if (fltype == SFLASH_ST || fltype == SFLASH_AT) {
if (sih->ccrev == 12)
flashutl_base = (void *)OSL_UNCACHED((uintptr)SI_FLASH2);
else
flashutl_base = (void *)OSL_CACHED((uintptr)SI_FLASH2);
sflash = sflash_init(sih, cc);
flashutl_cmd = &sflash_cmd_t;
flashutl_desc = &sflash_desc;
flashutl_desc->size = sflash->size;
if (flash_str)
sprintf(flash_str, "SFLASH %d kB", sflash->size/1024);
return (0);
}
flashutl_wsz = (R_REG(osh, &cc->flash_config) & CC_CFG_DS) ? sizeof(uint16) : sizeof(uint8);
ASSERT(flashutl_wsz == sizeof(uint8) || flashutl_wsz == sizeof(uint16));
/*
* Parallel flash support
* Some flashes have different unlock addresses, try each it turn
*/
for (idx = 0;
fltype == PFLASH && idx < ARRAYSIZE(flash_cmds);
idx ++) {
flashutl_cmd = &flash_cmds[idx];
if (flashutl_cmd->type == OLD)
continue;
if (flashutl_cmd->read_id) {
cmd(flashutl_cmd->read_id, CMD_ADDR);
/* Delay for turn around time */
OSL_DELAY(1);
}
#ifdef MIPSEB
#ifdef BCMHND74K
flash_vendid = flash_readword(FLASH_ADDR(0)^6);
flash_devid = flash_readword(FLASH_ADDR(2)^6);
#else /* !74K, bcm33xx */
flash_vendid = flash_readword(FLASH_ADDR(2));
flash_devid = flash_readword(FLASH_ADDR(0));
#endif /* BCMHND74K */
#else
flash_vendid = flash_readword(FLASH_ADDR(0));
flash_devid = flash_readword(FLASH_ADDR(2));
#endif /* MIPSEB */
/* Funky AMD, uses 3 byte device ID so use first byte (4th addr) to
* identify it is a 3-byte ID and use the next two bytes (5th & 6th addr)
* to form a word for unique identification of format xxyy, where
* xx = 5th addr and yy = 6th addr
*/
if ((flash_vendid == 1) &&
((flash_devid == 0x227e && flashutl_wsz == sizeof(uint16)) ||
(flash_devid == 0x7e && flashutl_wsz == sizeof(uint8)))) {
/* Get real devid */
uint16 flash_devid_5th;
#ifdef MIPSEB
#ifdef BCMHND74K
flash_devid_5th = flash_readword(FLASH_ADDR(0x1c)^6) << 8;
flash_devid = (flash_readword(FLASH_ADDR(0x1e)^6) & 0xff) | flash_devid_5th;
#else /* !74K, bcm33xx */
flash_devid_5th = flash_readword(FLASH_ADDR(0x1e)) << 8;
flash_devid = (flash_readword(FLASH_ADDR(0x1c)) & 0xff) | flash_devid_5th;
#endif /* BCMHND74K */
#else
flash_devid_5th = flash_readword(FLASH_ADDR(0x1c)) << 8;
flash_devid = (flash_readword(FLASH_ADDR(0x1e)) & 0xff) | flash_devid_5th;
#endif /* MIPSEB */
}
flashutl_desc = flashes;
while (flashutl_desc->mfgid != 0 &&
!(flashutl_desc->mfgid == flash_vendid &&
flashutl_desc->devid == flash_devid)) {
flashutl_desc++;
}
if (flashutl_desc->mfgid != 0)
break;
}
if (flashutl_desc->mfgid == 0) {
flashutl_desc = NULL;
flashutl_cmd = NULL;
} else {
flashutl_cmd = flash_cmds;
while (flashutl_cmd->type != 0 && flashutl_cmd->type != flashutl_desc->type)
flashutl_cmd++;
if (flashutl_cmd->type == 0)
flashutl_cmd = NULL;
}
if (flashutl_cmd != NULL) {
flash_reset();
}
if (flashutl_desc == NULL) {
if (flash_str)
sprintf(flash_str, "UNKNOWN 0x%x 0x%x", flash_vendid, flash_devid);
DPRINT(("Flash type UNKNOWN\n"));
return 1;
}
if (flash_str)
strcpy(flash_str, flashutl_desc->desc);
DPRINT(("Flash type \"%s\"\n", flashutl_desc->desc));
return 0;
}
static int __init
gpio_init(void)
{
int i;
if (!(gpio_sih = si_kattach(SI_OSH)))
return -ENODEV;
si_gpiosetcore(gpio_sih);
if ((gpio_major = register_chrdev(127, "gpio", &gpio_fops)) < 0)
{
return gpio_major;
}
// devfs_mk_cdev(MKDEV(gpio_major, 0), S_IFCHR | S_IRUGO | S_IWUGO, "gpio");
// devfs_mk_dir("gpio");
gpio_class = class_create(THIS_MODULE, "gpio");
for (i = 0; i < ARRAYSIZE(gpio_file); i++) {
// register_chrdev(MKDEV(127, i), gpio_file[i].name, &gpio_fops);
class_device_create(gpio_class, NULL, MKDEV(127, i), NULL, gpio_file[i].name);
// printk("gpio dev %d created\n",dev);
// devfs_mk_cdev(MKDEV(127, i), S_IFCHR | S_IRUGO | S_IWUGO, gpio_file[i].name);
}
gpio_init_flag=1;
int gpios = 0;
if (iswrt350n)
{
printk(KERN_EMERG "WRT350N GPIO Init\n");
/* For WRT350N USB LED control */
si_gpioreserve(gpio_sih, 0x400, GPIO_HI_PRIORITY);
si_gpioouten(gpio_sih, 0x400, 0x400, GPIO_HI_PRIORITY);
si_gpioreserve(gpio_sih, 0x800, GPIO_HI_PRIORITY);
si_gpioouten(gpio_sih, 0x800, 0x800, GPIO_HI_PRIORITY);
//if (nvram_match("disabled_5397", "1")) {
// printk("5397 switch GPIO-Reset \n");
//}
USB_SET_LED(USB_DISCONNECT); //2005-02-24 by kanki for USB LED
}
if (iswrt350n)
{
si_gpioreserve(gpio_sih, 0x4, GPIO_HI_PRIORITY);
si_gpioouten(gpio_sih, 0x4, 0x4, GPIO_HI_PRIORITY);
si_gpioout(gpio_sih, 0x4, 0x4, GPIO_HI_PRIORITY);
}
uint boardnum = bcm_strtoul( nvram_safe_get( "boardnum" ), NULL, 0 );
gpios = 1<<0 | 1<<1 | 1<<2 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1<<8 | 1<<9 | 1<<10 | 1<<11;
if ((boardnum == 1 || boardnum == 3500)
&& nvram_match("boardtype", "0x04CF")
&& (nvram_match("boardrev", "0x1213") || nvram_match("boardrev", "02")))
{
printk(KERN_EMERG "WNR3500V2 GPIO Init\n");
gpios = 1 << 1 | 1 << 2 | 1 << 3 | 1 << 7;
}
if ((boardnum == 42 || boardnum == 66)
&& nvram_match("boardtype", "0x04EF")
&& (nvram_match("boardrev", "0x1304") || nvram_match("boardrev", "0x1305") || nvram_match("boardrev", "0x1307")))
{
printk(KERN_EMERG "WRT320N/E2000 GPIO Init\n");
gpios = 1 << 2 | 1 << 3 | 1 << 4;
}
if (boardnum == 42 && ((nvram_match("boot_hw_model", "WRT160N") && nvram_match("boot_hw_ver", "3.0"))
|| (nvram_match("boot_hw_model", "M10") && nvram_match("boot_hw_ver", "1.0"))
|| (nvram_match("boot_hw_model", "E100") && nvram_match("boot_hw_ver", "1.0")) ) )
{
printk(KERN_EMERG "WRT160Nv3/M10/E1000 GPIO Init\n");
gpios = 1 << 1 | 1 << 2 | 1 << 4;
}
if (boardnum == 42 && ((nvram_match("boot_hw_model", "WRT310N") && nvram_match("boot_hw_ver", "2.0"))
|| (nvram_match("boot_hw_model", "M20") && nvram_match("boot_hw_ver", "1.0")) ) )
{
printk(KERN_EMERG "WRT310Nv2/M20 GPIO Init\n");
gpios = 1 << 1 | 1 << 2 | 1 << 4;
}
if (nvram_match("boardnum", "00") && nvram_match("boardrev", "0x11")
&& nvram_match("boardtype", "0x048e")
&& (nvram_match("melco_id", "32093") || nvram_match("melco_id", "32064")))
{
printk(KERN_EMERG "WHR-G125 / WHR-HP-G125 GPIO Init\n");
gpios = 1 << 1 | 1 << 6 | 1 << 7;
}
if (nvram_match("boardnum", "00") && nvram_match("boardrev", "0x13")
&& nvram_match("boardtype", "0x467"))
{
printk(KERN_EMERG "WHR-G54S / WHR-HP-G54 GPIO Init\n");
gpios = 1 << 1 | 1 << 6 | 1 << 7;
}
if (nvram_match("boardtype", "0x04cf") && (nvram_match("boot_hw_model", "WRT610N")
|| nvram_match("boot_hw_model", "E300")))
{
printk(KERN_EMERG "WRT610Nv2/E3000 GPIO Init\n");
gpios = 1 << 0 | 1 << 3 | 1 << 5 | 1 << 7;
}
if (boardnum == 42 && nvram_match("boardrev", "0x10")
&& (nvram_match("boardtype", "0x0467")
|| nvram_match("boardtype", "0x0708")
|| nvram_match("boardtype", "0x0101")))
{
printk(KERN_EMERG "WRT54G/GS/GL/TM GPIO Init\n");
gpios = 1 << 1 | 1 << 2 | 1 << 3 | 1 << 4 | 1 << 7;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1402")
&& nvram_match("boardtype", "0x04EC"))
{
printk(KERN_EMERG "RT-N10 GPIO Init\n");
gpios = 1 << 1;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1102")
&& nvram_match("boardtype", "0x0550"))
{
printk(KERN_EMERG "RT-N10U GPIO Init\n");
gpios = 1 << 5;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1153")
&& nvram_match("boardtype", "0x058e"))
{
printk(KERN_EMERG "RT-N10+ D1 GPIO INIT\n");
gpios = 1 << 6 | 1 << 7 | 1 << 21 | 1 << 20;
}
if (boardnum == 1 && nvram_match("boardtype", "0xE4CD")
&& nvram_match("boardrev", "0x1700"))
{
printk(KERN_EMERG "WNR2000v2 GPIO Init\n");
gpios = 1 << 2 | 1 << 6 | 1 << 7 | 1 << 8;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1201")
&& nvram_match("boardtype", "0x04CD"))
{
printk(KERN_EMERG "RT-N12 GPIO Init\n");
gpios = 1 << 0 | 1 << 2;
}
if (boardnum == 45 && nvram_match("boardrev", "0x1218")
&& nvram_match("boardtype", "0x04cf"))
{
printk(KERN_EMERG "RT-N16 GPIO Init\n");
gpios = 1 << 1;
}
if (boardnum == 1 && nvram_match("boardrev", "0x23")
&& nvram_match("boardtype", "0x0472"))
{
if (nvram_match("cardbus", "1")) {
printk(KERN_EMERG "WNR324v2 GPIO Init\n");
gpios = 1 << 2 | 1 << 3 | 1 << 7;
} else {
printk(KERN_EMERG "WNDR3300 GPIO Init\n");
gpios = 1 << 5 | 1 << 7;
}
}
if (nvram_match("boardnum", "00") && nvram_match("boardtype", "0x0101")
&& nvram_match("boardrev", "0x10"))
{
printk(KERN_EMERG "WBR2-G54(S) GPIO Init\n");
gpios = 1 << 1 | 1 << 6;
}
if (nvram_match("boardtype", "0xd4cf")
&& nvram_match("boardrev", "0x1204"))
{
printk(KERN_EMERG "F7D4301v1 GPIO Init\n");
gpios = 1 << 10 | 1 << 11 | 1 << 13;
}
if (nvram_match("boardtype", "0xa4cf")
&& (nvram_match("boardrev", "0x1100") || nvram_match("boardrev", "0x1102")))
{
printk(KERN_EMERG "F7D3301v1/3302v1/4302v1 - F5D8235v3 GPIO Init\n");
gpios = 1 << 10 | 1 << 11 | 1 << 13;
}
if (nvram_match("boot_hw_model", "E1000")
&& (nvram_match("boot_hw_ver", "2.0") || nvram_match("boot_hw_ver", "2.1")))
{
printk(KERN_EMERG "E1000v2/v21 GPIO Init\n");
gpios = 1 << 6 | 1 << 7 | 1 << 8;
}
if (nvram_match("boot_hw_model", "E4200")
&& nvram_match("boot_hw_ver", "1.0"))
{
printk(KERN_EMERG "E4200 GPIO Init\n");
gpios = 1 << 3 | 1 << 5;
}
if (nvram_match("boardnum", "01") && nvram_match("boardtype", "0xb4cf")
&& nvram_match("boardrev", "0x1100"))
{
printk(KERN_EMERG "WNDR3400 GPIO Init\n");
gpios = 1 << 0 | 1 << 1 | 1 << 2 | 1 << 3 | 1 << 7;
}
if (nvram_match("boardnum", "01") && nvram_match("boardtype", "0xF52C")
&& nvram_match("boardrev", "0x1101"))
{
printk(KERN_EMERG "WNDR4000 GPIO Init\n");
gpios = 1 << 0 | 1 << 6 | 1 << 7;
}
/*if (iswrt300n11)
{
printk(KERN_EMERG "WRT300N v1.1 GPIO Init\n");
int reset = 1 << 8;
sb_gpioout(gpio_sbh, reset, 0, GPIO_DRV_PRIORITY);
sb_gpioouten(gpio_sbh, reset, reset, GPIO_DRV_PRIORITY);
bcm_mdelay(50);
sb_gpioout(gpio_sbh, reset, reset, GPIO_DRV_PRIORITY);
bcm_mdelay(20);
}*/
for (i = 0; i < 16; i++)
{
if (gpios&1) {
si_gpioreserve(gpio_sih, 1 << i, GPIO_APP_PRIORITY);
}
gpios>>=1;
}
return 0;
}
static int __init
nflash_mtd_init(void)
{
int ret = 0;
hndnand_t *info;
#ifdef CONFIG_MTD_PARTITIONS
struct mtd_partition *parts;
int i;
#endif
memset(&nflash, 0, sizeof(struct nflash_mtd));
/* attach to the backplane */
if (!(nflash.sih = si_kattach(SI_OSH))) {
printk(KERN_ERR "nflash: error attaching to backplane\n");
ret = -EIO;
goto fail;
}
/* Initialize serial flash access */
if (!(info = hndnand_init(nflash.sih))) {
printk(KERN_ERR "nflash: found no supported devices\n");
ret = -ENODEV;
goto fail;
}
nflash.nfl = info;
/* Setup region info */
nflash.region.offset = 0;
nflash.region.erasesize = info->blocksize;
nflash.region.numblocks = info->numblocks;
if (nflash.region.erasesize > nflash.mtd.erasesize)
nflash.mtd.erasesize = nflash.region.erasesize;
/* At most 2GB is supported */
nflash.mtd.size = (info->size >= (1 << 11)) ? (1 << 31) : (info->size << 20);
nflash.mtd.numeraseregions = 1;
nflash.map = (unsigned char *)kmalloc(info->numblocks, GFP_KERNEL);
if (nflash.map)
memset(nflash.map, 0, info->numblocks);
/* Register with MTD */
nflash.mtd.name = "nflash";
nflash.mtd.type = MTD_NANDFLASH;
nflash.mtd.flags = MTD_CAP_NANDFLASH;
nflash.mtd.eraseregions = &nflash.region;
nflash.mtd.erase = nflash_mtd_erase;
nflash.mtd.read = nflash_mtd_read;
nflash.mtd.write = nflash_mtd_write;
nflash.mtd.writesize = info->pagesize;
nflash.mtd.priv = &nflash;
nflash.mtd.owner = THIS_MODULE;
nflash.controller = nand_hwcontrol_lock_init();
if (!nflash.controller)
return -ENOMEM;
/* Scan bad block */
NFLASH_LOCK(&nflash);
for (i = 0; i < info->numblocks; i++) {
if (hndnand_checkbadb(nflash.nfl, (i * (uint64)info->blocksize)) != 0) {
nflash.map[i] = 1;
}
}
NFLASH_UNLOCK(&nflash);
#ifdef CONFIG_MTD_PARTITIONS
parts = init_nflash_mtd_partitions(info, &nflash.mtd, nflash.mtd.size);
if (!parts)
goto fail;
for (i = 0; parts[i].name; i++)
;
ret = add_mtd_partitions(&nflash.mtd, parts, i);
if (ret) {
printk(KERN_ERR "nflash: add_mtd failed\n");
goto fail;
}
nflash_parts = parts;
#endif
return 0;
fail:
return ret;
}
int
flashDrvLibInit(void)
{
FLASH_TYPES dev;
FLASH_VENDORS vendor;
int i;
uint32 fltype = PFLASH;
osl_t *osh;
struct sflash *sflash;
if (flashDrvInitialized)
return (OK);
flashBaseAddress = FLASH_BASE_ADDRESS_ALIAS;
/*
* Check for serial flash.
*/
sih = si_kattach(SI_OSH);
ASSERT(sih);
osh = si_osh(sih);
cc = (chipcregs_t *)si_setcoreidx(sih, SI_CC_IDX);
ASSERT(cc);
/* Select SFLASH */
fltype = R_REG(osh, &cc->capabilities) & CC_CAP_FLASH_MASK;
if (fltype == SFLASH_ST || fltype == SFLASH_AT) {
sflash = sflash_init(sih, cc);
if (sflash == NULL) {
printf("flashInit(): Unrecognized Device (SFLASH)\n");
return (ERROR);
}
flashDrvFuncs = &flashsflash;
flashDrvFuncs->flashAutoSelect(&dev, &vendor);
flashSectorCount = sflash->numblocks;
flashDevSectorSize = sflash->blocksize;
if (flashVerbose) {
printf("flashInit(): SFLASH Found\n");
}
} else {
flashDrvFuncs = &flashs29gl256p;
flashDrvFuncs->flashAutoSelect(&dev, &vendor);
if ((vendor == 0xFF) && (dev == 0xFF)) {
flashDrvFuncs = &flash29gl128;
flashDrvFuncs->flashAutoSelect(&dev, &vendor);
}
if ((vendor == 0xFF) && (dev == 0xFF)) {
flashDrvFuncs = &flash29l640;
flashDrvFuncs->flashAutoSelect(&dev, &vendor);
}
if ((vendor == 0xFF) && (dev == 0xFF)) {
flashDrvFuncs = &flash29l320;
flashDrvFuncs->flashAutoSelect(&dev, &vendor);
}
if ((vendor == 0xFF) && (dev == 0xFF)) {
flashDrvFuncs = &flash29l160;
flashDrvFuncs->flashAutoSelect(&dev, &vendor);
}
if ((vendor == 0xFF) && (dev == 0xFF)) {
flashDrvFuncs = &flash28f320;
flashDrvFuncs->flashAutoSelect(&dev, &vendor);
}
switch (vendor) {
case AMD:
case ALLIANCE:
case MXIC:
switch (dev) {
case FLASH_2F040:
flashSectorCount = 8;
flashDevSectorSize = 0x10000;
if (flashVerbose)
printf("flashInit(): 2F040 Found\n");
break;
case FLASH_2F080:
flashSectorCount = 16;
flashDevSectorSize = 0x10000;
if (flashVerbose)
printf("flashInit(): 2F080 Found\n");
break;
case FLASH_2L081:
flashSectorCount = 16;
flashDevSectorSize = 0x10000;
if (flashVerbose)
printf("flashInit(): 29LV081B Found\n");
break;
case FLASH_2L160:
case FLASH_2L017:
flashSectorCount = 32;
flashDevSectorSize = 0x10000;
if (flashVerbose)
printf("flashInit(): 29LV160D Found\n");
break;
case FLASH_2L640:
case FLASH_MX2L640:
flashSectorCount = 128;
flashDevSectorSize = 0x10000;
if (flashVerbose)
printf("flashInit(): 29LV640M Found\n");
break;
case FLASH_29GL128:
/* Spansion 29GL128 is physically 128 sector count
* To make flash support backward compatible to old device,
* only use 64 for 8MB */
flashSectorCount = 64;
flashDevSectorSize = 0x20000;
if (flashVerbose)
printf("flashInit(): 29GL128 Found\n");
break;
case FLASH_2L320:
flashSectorCount = 64;
flashDevSectorSize = 0x10000;
if (flashVerbose)
printf("flashInit(): 29LV320D Found\n");
break;
case FLASH_S29GL128P:
flashSectorCount = 128;
flashDevSectorSize = 0x20000;
if (flashVerbose)
printf("flashInit(): FLASH_S29GL128P Found\n");
break;
case FLASH_S29GL256P:
flashSectorCount = 256;
flashDevSectorSize = 0x20000;
if (flashVerbose)
printf("flashInit(): S29GL256P Found\n");
break;
case FLASH_S29GL512P:
flashSectorCount = 512;
flashDevSectorSize = 0x20000;
if (flashVerbose)
printf("flashInit(): FLASH_S29GL512P Found\n");
break;
case FLASH_S29GL01GP:
flashSectorCount = 1024;
flashDevSectorSize = 0x20000;
if (flashVerbose)
printf("flashInit(): FLASH_S29GL01GP Found\n");
break;
default:
printf("flashInit(): Unrecognized Device (0x%02X)\n", dev);
return (ERROR);
}
break;
case INTEL:
switch (dev) {
case FLASH_2F320:
flashSectorCount = 32;
flashDevSectorSize = 0x20000;
if (flashVerbose)
printf("flashInit(): 28F320 Found\n");
break;
default:
printf("flashInit(): Unrecognized Device (0x%02X)\n", dev);
return (ERROR);
}
break;
default:
printf("flashInit(): Unrecognized Vendor (0x%02X)\n", vendor);
return (ERROR);
}
}
flashSize = flashDevSectorSize * flashSectorCount;
for (i = 0; i < TOTAL_LOADED_SECS; i++) {
flashLoadedSectors[i].buffer = malloc(FLASH_SECTOR_SIZE);
if (flashLoadedSectors[i].buffer == NULL) {
printf("flashInit(): malloc() failed\n");
for (; i > 0; i--) {
free(flashLoadedSectors[i-1].buffer);
}
return (ERROR);
}
flashLoadedSectors[i].sector = -1;
flashLoadedSectors[i].dirty = 0;
flashLoadedSectors[i].fsSemID =
semMCreate (SEM_Q_PRIORITY | SEM_DELETE_SAFE);
}
flashDrvInitialized ++;
return (OK);
}
void __init
brcm_setup(void)
{
char *value;
/* Get global SB handle */
sih = si_kattach(SI_OSH);
/* Initialize clocks and interrupts */
si_mips_init(sih, SBMIPS_VIRTIRQ_BASE);
if (BCM330X(current_cpu_data.processor_id) &&
(read_c0_diag() & BRCM_PFC_AVAIL)) {
/*
* Now that the sih is inited set the proper PFC value
*/
printk("Setting the PFC to its default value\n");
enable_pfc(PFC_AUTO);
}
#ifdef CONFIG_SERIAL_CORE
/* Initialize UARTs */
serial_setup(sih);
#endif /* CONFIG_SERIAL_CORE */
iswrt350n=1;
iswrt300n11=1;
char *boardtype = nvram_get("boardtype");
char *boothwmodel = nvram_get("boot_hw_model");
char *boothwver = nvram_get("boot_hw_ver");
char *cardbus = nvram_get("cardbus");
if (boardtype==NULL || strcmp(boardtype,"0x478"))iswrt350n=0;
if (cardbus!=NULL && !strcmp(cardbus, "0") && boardtype!=NULL && !strcmp(boardtype,"0x478"))
{
iswrt350n=0;
iswrt300n11=0;
}
if (boothwmodel==NULL || strcmp(boothwmodel,"WRT300N"))iswrt300n11=0;
if (boothwmodel!=NULL && !strcmp(boothwmodel,"WRT610N"))
{
iswrt300n11=0;
iswrt350n=0;
}
if (boothwver==NULL || strcmp(boothwver,"1.1"))iswrt300n11=0;
if (iswrt300n11)
iswrt350n=0;
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
ide_ops = &std_ide_ops;
#endif
sprintf(arcs_cmdline, "root=/dev/mtdblock%d console=ttyS0,115200 init=/sbin/preinit", rootfs_mtdblock());
/* Override default command line arguments */
value = nvram_get("kernel_args");
if (value && strlen(value) && strncmp(value, "empty", 5))
strncpy(arcs_cmdline, value, sizeof(arcs_cmdline));
if ((lanports_enable = getgpiopin(NULL, "lanports_enable", GPIO_PIN_NOTDEFINED)) ==
GPIO_PIN_NOTDEFINED)
lanports_enable = 0;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
/* Check if we want to enable cpu wait */
if (nvram_match("wait", "1"))
cpu_wait_enable = 1;
#endif
/* Generic setup */
_machine_restart = bcm947xx_machine_restart;
_machine_halt = bcm947xx_machine_halt;
pm_power_off = bcm947xx_machine_halt;
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
board_time_init = bcm947xx_time_init;
#endif
}
void __init
brcm_setup(void)
{
char *value;
/* Get global SB handle */
sih = si_kattach(SI_OSH);
/* Initialize clocks and interrupts */
si_mips_init(sih, SBMIPS_VIRTIRQ_BASE);
if (BCM330X(current_cpu_data.processor_id) &&
(read_c0_diag() & BRCM_PFC_AVAIL)) {
/*
* Now that the sih is inited set the proper PFC value
*/
printk("Setting the PFC to its default value\n");
enable_pfc(PFC_AUTO);
}
#ifdef CONFIG_SERIAL_CORE
/* Initialize UARTs */
serial_setup(sih);
#endif /* CONFIG_SERIAL_CORE */
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
ide_ops = &std_ide_ops;
#endif
/* Override default command line arguments */
value = nvram_get("kernel_args");
if (value && strlen(value) && strncmp(value, "empty", 5))
strncpy(arcs_cmdline, value, sizeof(arcs_cmdline));
if ((lanports_enable = getgpiopin(NULL, "lanports_enable", GPIO_PIN_NOTDEFINED)) ==
GPIO_PIN_NOTDEFINED)
lanports_enable = 0;
/* Check if we want to enable cpu wait */
if (nvram_match("wait", "1"))
cpu_wait_enable = 1;
/* wombo reset */
if ((wombo_reset = getgpiopin(NULL, "wombo_reset", GPIO_PIN_NOTDEFINED)) !=
GPIO_PIN_NOTDEFINED) {
int reset = 1 << wombo_reset;
printk("wombo_reset set to gpio %d\n", wombo_reset);
si_gpioout(sih, reset, 0, GPIO_DRV_PRIORITY);
si_gpioouten(sih, reset, reset, GPIO_DRV_PRIORITY);
bcm_mdelay(10);
si_gpioout(sih, reset, reset, GPIO_DRV_PRIORITY);
bcm_mdelay(20);
}
/* Generic setup */
_machine_restart = bcm947xx_machine_restart;
_machine_halt = bcm947xx_machine_halt;
pm_power_off = bcm947xx_machine_halt;
board_time_init = bcm947xx_time_init;
}
static int __init gpio_init(void)
{
int i;
int gpios = 0;
printk(KERN_INFO "init gpio code\n");
if (!(gpio_sih = si_kattach(SI_OSH)))
return -ENODEV;
si_gpiosetcore(gpio_sih);
set_hc595_core(gpio_sih);
if ((gpio_major = register_chrdev(127, "gpio", &gpio_fops)) < 0) {
return gpio_major;
}
gpio_class = class_create(THIS_MODULE, "gpio");
for (i = 0; i < ARRAYSIZE(gpio_file); i++) {
device_create(gpio_class, NULL, MKDEV(127, i), NULL, gpio_file[i].name);
}
uint boardnum = bcm_strtoul(nvram_safe_get("boardnum"), NULL, 0);
if (boardnum == 00 && nvram_match("boardtype", "0xF646")
&& nvram_match("boardrev", "0x1100")
&& nvram_match("melco_id", "RD_BB12068")) {
printk(KERN_EMERG "Buffalo WZR-1750DHP\n");
isbuffalo = 1;
set_hc595_reset();
gpio_init_flag = 1;
return 0;
}
if (boardnum == 00 && nvram_match("boardtype", "0x0665")
&& nvram_match("boardrev", "0x1103")
&& nvram_match("melco_id", "RD_BB13049")) {
printk(KERN_EMERG "Buffalo WXR-1900DHP\n");
isbuffalowxr = 1;
gpio_init_flag = 1;
return 0;
}
if ((!strncmp(nvram_safe_get("boardnum"),"2013",4) || !strncmp(nvram_safe_get("boardnum"),"2014",4)) && nvram_match("boardtype", "0x0646")
&& nvram_match("boardrev", "0x1110")
&& nvram_match("0:rxchain", "7")) {
printk(KERN_EMERG "Buffalo WZR-900DHP\n");
isbuffalo = 1;
set_hc595_reset();
gpio_init_flag = 1;
return 0;
}
if ((!strncmp(nvram_safe_get("boardnum"),"2013",4) || !strncmp(nvram_safe_get("boardnum"),"2014",4)) && nvram_match("boardtype", "0x0646")
&& nvram_match("boardrev", "0x1110")
&& nvram_match("0:rxchain", "3")) {
printk(KERN_EMERG "Buffalo WZR-600DHP2\n");
isbuffalo = 1;
set_hc595_reset();
gpio_init_flag = 1;
return 0;
}
if ((boardnum == 0) && nvram_match("boardtype", "0x0646") && (nvram_match("boardrev", "0x1100"))) {
printk(KERN_EMERG "Asus-RT-AC56U init\n");
isac66 = 1;
}
if (nvram_match("model","RT-AC68U")) {
printk(KERN_EMERG "Asus-RT-AC68U init\n");
isac68 = 1;
} else if ((boardnum != 24) && nvram_match("boardtype", "0x0646") && (nvram_match("boardrev", "0x1100"))) {
printk(KERN_EMERG "Asus-RT-AC68U init\n");
isac68 = 1;
}
if ((boardnum == 24) && nvram_match("boardtype", "0x0646") && nvram_match("boardrev", "0x1110") && !nvram_match("gpio6", "wps_led")) {
printk(KERN_EMERG "DLink DIR-868 init\n");
isac66 = 1;
}
if ((boardnum == 679) && nvram_match("boardtype", "0x0646") && (nvram_match("boardrev", "0x1110"))) {
printk(KERN_EMERG "Netgear AC1450/R6250/R6300v2/EX6200 init\n");
gpios = 1<<0 | 1<<1 | 1<<2 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1<<8 | 1<<9 | 1<<10 | 1<<11 | 1<<15;
}
if ((boardnum == 32) && nvram_match("boardtype", "0x0665") && (nvram_match("boardrev", "0x1301"))) {
printk(KERN_EMERG "Netgear R7000 init\n");
gpios = 1<<0 | 1<<1 | 1<<2 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1<<8 | 1<<9 | 1<<10 | 1<<11 | 1<<15;
}
if ((boardnum == 32) && nvram_match("boardtype", "0x0665") && (nvram_match("boardrev", "0x1101"))) {
printk(KERN_EMERG "Netgear R8000 init\n");
gpios = 1<<0 | 1<<1 | 1<<2 | 1<<3 | 1<<4 | 1<<5 | 1<<6 | 1<<7 | 1<<8 | 1<<9 | 1<<10 | 1<<11 | 1<<15;
}
for (i = 0; i < 16; i++) {
if (gpios&1) {
si_gpioreserve(gpio_sih, 1 << i, GPIO_APP_PRIORITY);
}
}
gpio_init_flag = 1;
return 0;
}
