void sim_reset() { if (!initialized) sim_init(); clear_pipes(); clear_mem(reg); minAddr = 0; memCnt = 0; starting_up = 1; cycles = instructions = 0; #ifdef HAS_GUI if (gui_mode) { signal_register_clear(); create_memory_display(minAddr, memCnt); } #endif amux = bmux = MUX_NONE; cc = cc_in = DEFAULT_CC; wb_destE = REG_NONE; wb_valE = 0; wb_destM = REG_NONE; wb_valM = 0; mem_addr = 0; mem_data = 0; mem_write = FALSE; sim_report(); }
void sim_reset() { if (!initialized) sim_init(); clear_mem(reg); minAddr = 0; memCnt = 0; #ifdef HAS_GUI if (gui_mode) { signal_register_clear(); create_memory_display(minAddr, memCnt); sim_report(); } #endif if (plusmode) { prev_icode = prev_icode_in = I_NOP; prev_ifun = prev_ifun_in = 0; prev_valc = prev_valc_in = 0; prev_valm = prev_valm_in = 0; prev_valp = prev_valp_in = 0; prev_bcond = prev_bcond_in = FALSE; pc = 0; } else { pc_in = 0; } cc = DEFAULT_CC; cc_in = DEFAULT_CC; destE = REG_NONE; destM = REG_NONE; mem_write = FALSE; mem_addr = 0; mem_data = 0; /* Reset intermediate values to clear display */ icode = I_NOP; ifun = 0; instr = HPACK(I_NOP, F_NONE); ra = REG_NONE; rb = REG_NONE; valc = 0; valp = 0; srcA = REG_NONE; srcB = REG_NONE; destE = REG_NONE; destM = REG_NONE; vala = 0; valb = 0; vale = 0; cond = FALSE; bcond = FALSE; valm = 0; sim_report(); }