int sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length) { SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); return sim_core_write_buffer (sd, NULL, write_map, buf, mem, length); }
syscall_write_mem (host_callback *cb, struct cb_syscall *sc, unsigned long taddr, const char *buf, int bytes) { SIM_DESC sd = (SIM_DESC) sc->p1; sim_cpu *cpu = STATE_CPU(sd, 0); return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); }
static int syscall_write_mem (host_callback *cb, struct cb_syscall *sc, unsigned long taddr, const char *buf, int bytes) { SIM_DESC sd = (SIM_DESC) sc->p1; SIM_CPU *cpu = (SIM_CPU *) sc->p2; frv_cache_invalidate_all (CPU_INSN_CACHE (cpu), 0); frv_cache_invalidate_all (CPU_DATA_CACHE (cpu), 1); return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); }
static int syscall_write_mem (host_callback *cb, struct cb_syscall *sc, unsigned long taddr, const char *buf, int bytes) { SIM_DESC sd = (SIM_DESC) sc->p1; SIM_CPU *cpu = (SIM_CPU *) sc->p2; MAYBE_TRACE (CORE, cpu, "DBUS STORE (syscall) %i bytes @ 0x%08lx", bytes, taddr); return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); }
static unsigned dv_core_dma_write_buffer_callback (struct hw *me, const void *source, int space, unsigned_word addr, unsigned nr_bytes, int violate_read_only_section) { return sim_core_write_buffer (hw_system (me), NULL, /*cpu*/ space, /*???*/ source, addr, nr_bytes); }