/*
* Card initialization
*/
static int sunxi_daudio_init(struct snd_soc_pcm_runtime *rtd)
{
int ret;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_dapm_context *dapm = &codec->dapm;
struct snd_soc_card *card = rtd->card;
runtime = rtd;
/* Add imapx specific widgets */
snd_soc_dapm_new_controls(dapm, rt3261_dapm_widgets,
ARRAY_SIZE(rt3261_dapm_widgets));
/* add imapx specific controls */
snd_soc_add_codec_controls(codec, rt3261_imapx_controls,
ARRAY_SIZE(rt3261_imapx_controls));
snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
/* Add virtual switch */
ret = snd_soc_add_codec_controls(codec, sunxi_daudio_controls,
ARRAY_SIZE(sunxi_daudio_controls));
if (ret) {
dev_warn(card->dev,
"Failed to register audio mode control, "
"will continue without it.\n");
}
/* always connected */
snd_soc_dapm_enable_pin(dapm, "micbias1");
snd_soc_dapm_enable_pin(dapm, "Headphone Jack");
snd_soc_dapm_enable_pin(dapm, "Line In Jack");
snd_soc_dapm_sync(dapm);
i2s_set_dma_daudio0_to_hdmi(1);
atomic_set(&hdmi_open_num, 0);
return 0;
}
static int wm8741_add_controls(struct snd_soc_codec *codec)
{
struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec);
switch (wm8741->pdata.diff_mode) {
case WM8741_DIFF_MODE_STEREO:
case WM8741_DIFF_MODE_STEREO_REVERSED:
snd_soc_add_codec_controls(codec,
wm8741_snd_controls_stereo,
ARRAY_SIZE(wm8741_snd_controls_stereo));
break;
case WM8741_DIFF_MODE_MONO_LEFT:
snd_soc_add_codec_controls(codec,
wm8741_snd_controls_mono_left,
ARRAY_SIZE(wm8741_snd_controls_mono_left));
break;
case WM8741_DIFF_MODE_MONO_RIGHT:
snd_soc_add_codec_controls(codec,
wm8741_snd_controls_mono_right,
ARRAY_SIZE(wm8741_snd_controls_mono_right));
break;
default:
return -EINVAL;
}
return 0;
}
static int sirf_audio_codec_probe(struct snd_soc_codec *codec)
{
struct snd_soc_dapm_context *dapm = &codec->dapm;
pm_runtime_enable(codec->dev);
if (of_device_is_compatible(codec->dev->of_node, "sirf,prima2-audio-codec")) {
snd_soc_dapm_new_controls(dapm,
prima2_output_driver_dapm_widgets,
ARRAY_SIZE(prima2_output_driver_dapm_widgets));
snd_soc_dapm_new_controls(dapm,
&prima2_codec_clock_dapm_widget, 1);
return snd_soc_add_codec_controls(codec,
volume_controls_prima2,
ARRAY_SIZE(volume_controls_prima2));
}
if (of_device_is_compatible(codec->dev->of_node, "sirf,atlas6-audio-codec")) {
snd_soc_dapm_new_controls(dapm,
atlas6_output_driver_dapm_widgets,
ARRAY_SIZE(atlas6_output_driver_dapm_widgets));
snd_soc_dapm_new_controls(dapm,
&atlas6_codec_clock_dapm_widget, 1);
return snd_soc_add_codec_controls(codec,
volume_controls_atlas6,
ARRAY_SIZE(volume_controls_atlas6));
}
return -EINVAL;
}
static int cs42l52_add_mic_controls(struct snd_soc_codec *codec)
{
struct cs42l52_private *cs42l52 = snd_soc_codec_get_drvdata(codec);
struct cs42l52_platform_data *pdata = &cs42l52->pdata;
if (!pdata->mica_diff_cfg)
snd_soc_add_codec_controls(codec, cs42l52_mica_controls,
ARRAY_SIZE(cs42l52_mica_controls));
if (!pdata->micb_diff_cfg)
snd_soc_add_codec_controls(codec, cs42l52_micb_controls,
ARRAY_SIZE(cs42l52_micb_controls));
return 0;
}
static int wm9090_add_controls(struct snd_soc_codec *codec)
{
struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_dapm_context *dapm = &codec->dapm;
int i;
snd_soc_dapm_new_controls(dapm, wm9090_dapm_widgets,
ARRAY_SIZE(wm9090_dapm_widgets));
snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
snd_soc_add_codec_controls(codec, wm9090_controls,
ARRAY_SIZE(wm9090_controls));
if (wm9090->pdata.lin1_diff) {
snd_soc_dapm_add_routes(dapm, audio_map_in1_diff,
ARRAY_SIZE(audio_map_in1_diff));
} else {
snd_soc_dapm_add_routes(dapm, audio_map_in1_se,
ARRAY_SIZE(audio_map_in1_se));
snd_soc_add_codec_controls(codec, wm9090_in1_se_controls,
ARRAY_SIZE(wm9090_in1_se_controls));
}
if (wm9090->pdata.lin2_diff) {
snd_soc_dapm_add_routes(dapm, audio_map_in2_diff,
ARRAY_SIZE(audio_map_in2_diff));
} else {
snd_soc_dapm_add_routes(dapm, audio_map_in2_se,
ARRAY_SIZE(audio_map_in2_se));
snd_soc_add_codec_controls(codec, wm9090_in2_se_controls,
ARRAY_SIZE(wm9090_in2_se_controls));
}
if (wm9090->pdata.agc_ena) {
for (i = 0; i < ARRAY_SIZE(wm9090->pdata.agc); i++)
snd_soc_write(codec, WM9090_AGC_CONTROL_0 + i,
wm9090->pdata.agc[i]);
snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
WM9090_AGC_ENA, WM9090_AGC_ENA);
} else {
snd_soc_update_bits(codec, WM9090_POWER_MANAGEMENT_3,
WM9090_AGC_ENA, 0);
}
return 0;
}
int adau17x1_add_widgets(struct snd_soc_codec *codec)
{
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
struct adau *adau = snd_soc_codec_get_drvdata(codec);
int ret;
ret = snd_soc_add_codec_controls(codec, adau17x1_controls,
ARRAY_SIZE(adau17x1_controls));
if (ret)
return ret;
ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets,
ARRAY_SIZE(adau17x1_dapm_widgets));
if (ret)
return ret;
if (adau17x1_has_dsp(adau)) {
ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets,
ARRAY_SIZE(adau17x1_dsp_dapm_widgets));
if (ret)
return ret;
if (!adau->sigmadsp)
return 0;
ret = sigmadsp_attach(adau->sigmadsp, &codec->component);
if (ret) {
dev_err(codec->dev, "Failed to attach firmware: %d\n",
ret);
return ret;
}
}
return 0;
}
static int wl1273_probe(struct snd_soc_codec *codec)
{
struct wl1273_core **core = codec->dev->platform_data;
struct wl1273_priv *wl1273;
int r;
dev_dbg(codec->dev, "%s.\n", __func__);
if (!core) {
dev_err(codec->dev, "Platform data is missing.\n");
return -EINVAL;
}
wl1273 = kzalloc(sizeof(struct wl1273_priv), GFP_KERNEL);
if (wl1273 == NULL) {
dev_err(codec->dev, "Cannot allocate memory.\n");
return -ENOMEM;
}
wl1273->mode = WL1273_MODE_BT;
wl1273->core = *core;
snd_soc_codec_set_drvdata(codec, wl1273);
r = snd_soc_add_codec_controls(codec, wl1273_controls,
ARRAY_SIZE(wl1273_controls));
if (r)
kfree(wl1273);
return r;
}
static int max9768_probe(struct snd_soc_codec *codec)
{
struct max9768 *max9768 = snd_soc_codec_get_drvdata(codec);
int ret;
codec->control_data = max9768->regmap;
ret = snd_soc_codec_set_cache_io(codec, 2, 6, SND_SOC_REGMAP);
if (ret)
return ret;
if (max9768->flags & MAX9768_FLAG_CLASSIC_PWM) {
ret = snd_soc_write(codec, MAX9768_CTRL, MAX9768_CTRL_PWM);
if (ret)
return ret;
}
if (gpio_is_valid(max9768->mute_gpio)) {
ret = snd_soc_add_codec_controls(codec, max9768_mute,
ARRAY_SIZE(max9768_mute));
if (ret)
return ret;
}
return 0;
}
static int aic31xx_add_controls(struct snd_soc_codec *codec)
{
int ret = 0;
struct aic31xx_priv *aic31xx = snd_soc_codec_get_drvdata(codec);
if (aic31xx->pdata.codec_type & AIC31XX_STEREO_CLASS_D_BIT)
ret = snd_soc_add_codec_controls(
codec, aic311x_snd_controls,
ARRAY_SIZE(aic311x_snd_controls));
else
ret = snd_soc_add_codec_controls(
codec, aic310x_snd_controls,
ARRAY_SIZE(aic310x_snd_controls));
return ret;
}
static int stac9766_codec_probe(struct snd_soc_codec *codec)
{
int ret = 0;
printk(KERN_INFO "STAC9766 SoC Audio Codec %s\n", STAC9766_VERSION);
ret = snd_soc_new_ac97_codec(codec, &soc_ac97_ops, 0);
if (ret < 0)
goto codec_err;
/* do a cold reset for the controller and then try
* a warm reset followed by an optional cold reset for codec */
stac9766_reset(codec, 0);
ret = stac9766_reset(codec, 1);
if (ret < 0) {
printk(KERN_ERR "Failed to reset STAC9766: AC97 link error\n");
goto codec_err;
}
stac9766_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
snd_soc_add_codec_controls(codec, stac9766_snd_ac97_controls,
ARRAY_SIZE(stac9766_snd_ac97_controls));
return 0;
codec_err:
snd_soc_free_ac97_codec(codec);
return ret;
}
static int cq93vc_probe(struct snd_soc_codec *codec)
{
struct davinci_vc *davinci_vc = codec->dev->platform_data;
davinci_vc->cq93vc.codec = codec;
codec->control_data = davinci_vc;
/* Set controls */
snd_soc_add_codec_controls(codec, cq93vc_snd_controls,
ARRAY_SIZE(cq93vc_snd_controls));
/* Off, with power on */
cq93vc_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
/* Turn on Automatic Level Control (VC_REG06) */
cq93vc_write(codec, DAVINCI_VC_REG06, 1);
/* Turn on microphone Gain (VC_REG05) */
cq93vc_write(codec, DAVINCI_VC_REG05, 0x1f);
/* Recording Mode Control (VC_REG04) */
cq93vc_write(codec, DAVINCI_VC_REG04, 0x0);
return 0;
}
static int max97236_add_widgets(struct snd_soc_codec *codec)
{
snd_soc_add_codec_controls(codec, max97236_snd_controls,
ARRAY_SIZE(max97236_snd_controls));
return 0;
}
static int lm4857_probe(struct snd_soc_codec *codec)
{
struct lm4857 *lm4857 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_dapm_context *dapm = &codec->dapm;
int ret;
codec->control_data = lm4857->i2c;
ret = snd_soc_add_codec_controls(codec, lm4857_controls,
ARRAY_SIZE(lm4857_controls));
if (ret)
return ret;
ret = snd_soc_dapm_new_controls(dapm, lm4857_dapm_widgets,
ARRAY_SIZE(lm4857_dapm_widgets));
if (ret)
return ret;
ret = snd_soc_dapm_add_routes(dapm, lm4857_routes,
ARRAY_SIZE(lm4857_routes));
if (ret)
return ret;
snd_soc_dapm_new_widgets(dapm);
return 0;
}
static int alc5632_probe(struct snd_soc_codec *codec)
{
struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec);
int ret;
codec->control_data = alc5632->regmap;
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
if (ret != 0) {
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
return ret;
}
/* */
alc5632_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
switch (alc5632->id) {
case 0x5c:
snd_soc_add_codec_controls(codec, alc5632_vol_snd_controls,
ARRAY_SIZE(alc5632_vol_snd_controls));
break;
default:
return -EINVAL;
}
return ret;
}
/*
* Card initialization
*/
static int sunxi_daudio_init(struct snd_soc_pcm_runtime *rtd)
{
int ret;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_dapm_context *dapm = &codec->dapm;
struct snd_soc_card *card = rtd->card;
runtime = rtd;
snd_soc_dapm_disable_pin(&codec->dapm, "HPOUTR");
snd_soc_dapm_disable_pin(&codec->dapm, "HPOUTL");
snd_soc_dapm_disable_pin(&codec->dapm, "EAROUTP");
snd_soc_dapm_disable_pin(&codec->dapm, "EAROUTN");
snd_soc_dapm_disable_pin(&codec->dapm, "SPK1P");
snd_soc_dapm_disable_pin(&codec->dapm, "SPK2P");
snd_soc_dapm_disable_pin(&codec->dapm, "SPK1N");
snd_soc_dapm_disable_pin(&codec->dapm, "SPK2N");
snd_soc_dapm_disable_pin(&codec->dapm, "MIC1P");
snd_soc_dapm_disable_pin(&codec->dapm, "MIC1N");
snd_soc_dapm_disable_pin(&codec->dapm, "MIC2");
snd_soc_dapm_disable_pin(&codec->dapm, "MIC3");
snd_soc_dapm_disable_pin(&codec->dapm, "D_MIC");
/* Add HDMI/SPDIF switch */
ret = snd_soc_add_codec_controls(codec, sunxi_daudio_controls,
ARRAY_SIZE(sunxi_daudio_controls));
if (ret) {
dev_warn(card->dev,
"Failed to register audio mode control, "
"will continue without it.\n");
}
snd_soc_dapm_sync(dapm);
atomic_set(&hdmi_open_num, 0);
return 0;
}
static int ad1980_soc_probe(struct snd_soc_codec *codec)
{
int ret;
u16 vendor_id2;
u16 ext_status;
printk(KERN_INFO "AD1980 SoC Audio Codec\n");
ret = snd_soc_new_ac97_codec(codec, &soc_ac97_ops, 0);
if (ret < 0) {
printk(KERN_ERR "ad1980: failed to register AC97 codec\n");
return ret;
}
ret = ad1980_reset(codec, 0);
if (ret < 0) {
printk(KERN_ERR "Failed to reset AD1980: AC97 link error\n");
goto reset_err;
}
if (ac97_read(codec, AC97_VENDOR_ID1) != 0x4144) {
ret = -ENODEV;
goto reset_err;
}
vendor_id2 = ac97_read(codec, AC97_VENDOR_ID2);
if (vendor_id2 != 0x5370) {
if (vendor_id2 != 0x5374) {
ret = -ENODEV;
goto reset_err;
} else {
printk(KERN_WARNING "ad1980: "
"Found AD1981 - only 2/2 IN/OUT Channels "
"supported\n");
}
}
ac97_write(codec, AC97_MASTER, 0x0000);
ac97_write(codec, AC97_PCM, 0x0000);
ac97_write(codec, AC97_REC_GAIN, 0x0000);
ac97_write(codec, AC97_CENTER_LFE_MASTER, 0x0000);
ac97_write(codec, AC97_SURROUND_MASTER, 0x0000);
ext_status = ac97_read(codec, AC97_EXTENDED_STATUS);
ac97_write(codec, AC97_EXTENDED_STATUS, ext_status&~0x3800);
snd_soc_add_codec_controls(codec, ad1980_snd_ac97_controls,
ARRAY_SIZE(ad1980_snd_ac97_controls));
return 0;
reset_err:
snd_soc_free_ac97_codec(codec);
return ret;
}
static int adau1761_setup_headphone_mode(struct snd_soc_codec *codec)
{
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
struct adau *adau = snd_soc_codec_get_drvdata(codec);
struct adau1761_platform_data *pdata = codec->dev->platform_data;
enum adau1761_output_mode mode;
int ret;
if (pdata)
mode = pdata->headphone_mode;
else
mode = ADAU1761_OUTPUT_MODE_HEADPHONE;
switch (mode) {
case ADAU1761_OUTPUT_MODE_LINE:
break;
case ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS:
regmap_update_bits(adau->regmap, ADAU1761_PLAY_MONO_OUTPUT_VOL,
ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP |
ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE,
ADAU1761_PLAY_MONO_OUTPUT_VOL_MODE_HP |
ADAU1761_PLAY_MONO_OUTPUT_VOL_UNMUTE);
/* fallthrough */
case ADAU1761_OUTPUT_MODE_HEADPHONE:
regmap_update_bits(adau->regmap, ADAU1761_PLAY_HP_RIGHT_VOL,
ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP,
ADAU1761_PLAY_HP_RIGHT_VOL_MODE_HP);
break;
default:
return -EINVAL;
}
if (mode == ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS) {
ret = snd_soc_dapm_new_controls(dapm,
adau1761_capless_dapm_widgets,
ARRAY_SIZE(adau1761_capless_dapm_widgets));
if (ret)
return ret;
ret = snd_soc_dapm_add_routes(dapm,
adau1761_capless_dapm_routes,
ARRAY_SIZE(adau1761_capless_dapm_routes));
} else {
ret = snd_soc_add_codec_controls(codec, adau1761_mono_controls,
ARRAY_SIZE(adau1761_mono_controls));
if (ret)
return ret;
ret = snd_soc_dapm_new_controls(dapm,
adau1761_mono_dapm_widgets,
ARRAY_SIZE(adau1761_mono_dapm_widgets));
if (ret)
return ret;
ret = snd_soc_dapm_add_routes(dapm,
adau1761_mono_dapm_routes,
ARRAY_SIZE(adau1761_mono_dapm_routes));
}
return ret;
}
/**
* rt3261_dsp_probe - register DSP for rt3261
* @codec: audio codec
*
* To register DSP function for rt3261.
*
* Returns 0 for success or negative error code.
*/
int rt3261_dsp_probe(struct snd_soc_codec *codec)
{
//struct rt3261_priv *rt3261;
int ret;
if (codec == NULL)
return -EINVAL;
snd_soc_add_codec_controls(codec, rt3261_dsp_snd_controls,
ARRAY_SIZE(rt3261_dsp_snd_controls));
snd_soc_dapm_new_controls(&codec->dapm, rt3261_dsp_dapm_widgets,
ARRAY_SIZE(rt3261_dsp_dapm_widgets));
snd_soc_dapm_add_routes(&codec->dapm, rt3261_dsp_dapm_routes,
ARRAY_SIZE(rt3261_dsp_dapm_routes));
/* Patch DSP rom code if IC version is larger than C version */
ret = snd_soc_update_bits(codec, RT3261_PWR_DIG2,
RT3261_PWR_I2S_DSP, RT3261_PWR_I2S_DSP);
if (ret < 0) {
dev_err(codec->dev,
"Failed to power up DSP IIS interface: %d\n", ret);
}
#ifdef INIT_DSP_IN_PROBE
rt3261_dsp_snd_effect(codec);
ret = rt3261_dsp_read(codec, 0x22fb);
if(ret == 0x5a5a)
pr_info("DSP init success\n");
else
pr_info("DSP init failed\n");
#else
rt3261_dsp_conf(codec);
#endif
ret = rt3261_dsp_read(codec, 0x3800);
pr_info("DSP version code = 0x%04x\n",ret);
/*if(ret != 0x501a) {
rt3261 = snd_soc_codec_get_drvdata(codec);
INIT_DELAYED_WORK(&rt3261->patch_work, rt3261_do_dsp_patch);
schedule_delayed_work(&rt3261->patch_work,
msecs_to_jiffies(100));
}*/
#ifdef INIT_DSP_IN_PROBE
snd_soc_update_bits(codec, RT3261_DSP_CTRL3,
RT3261_DSP_PD_PIN_MASK, RT3261_DSP_PD_PIN_LO);
#endif
snd_soc_update_bits(codec, RT3261_PWR_DIG2,
RT3261_PWR_I2S_DSP, 0);
ret = device_create_file(codec->dev, &dev_attr_dsp_reg);
if (ret != 0) {
dev_err(codec->dev,
"Failed to create index_reg sysfs files: %d\n", ret);
return ret;
}
return 0;
}
static int cs4271_probe(struct snd_soc_codec *codec)
{
struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec);
struct cs4271_platform_data *cs4271plat = codec->dev->platform_data;
int ret;
int gpio_nreset = -EINVAL;
if (cs4271plat && gpio_is_valid(cs4271plat->gpio_nreset))
gpio_nreset = cs4271plat->gpio_nreset;
if (gpio_nreset >= 0)
if (gpio_request(gpio_nreset, "CS4271 Reset"))
gpio_nreset = -EINVAL;
if (gpio_nreset >= 0) {
/* Reset codec */
gpio_direction_output(gpio_nreset, 0);
mdelay(1);
gpio_set_value(gpio_nreset, 1);
/* Give the codec time to wake up */
mdelay(1);
}
cs4271->gpio_nreset = gpio_nreset;
/*
* In case of I2C, chip address specified in board data.
* So cache IO operations use 8 bit codec register address.
* In case of SPI, chip address and register address
* passed together as 16 bit value.
* Anyway, register address is masked with 0xFF inside
* soc-cache code.
*/
if (cs4271->bus_type == SND_SOC_SPI)
ret = snd_soc_codec_set_cache_io(codec, 16, 8,
cs4271->bus_type);
else
ret = snd_soc_codec_set_cache_io(codec, 8, 8,
cs4271->bus_type);
if (ret) {
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
return ret;
}
ret = snd_soc_update_bits(codec, CS4271_MODE2,
CS4271_MODE2_PDN | CS4271_MODE2_CPEN,
CS4271_MODE2_PDN | CS4271_MODE2_CPEN);
if (ret < 0)
return ret;
ret = snd_soc_update_bits(codec, CS4271_MODE2, CS4271_MODE2_PDN, 0);
if (ret < 0)
return ret;
/* Power-up sequence requires 85 uS */
udelay(85);
return snd_soc_add_codec_controls(codec, cs4271_snd_controls,
ARRAY_SIZE(cs4271_snd_controls));
}
static int wm8737_probe(struct snd_soc_codec *codec)
{
struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
int ret, i;
ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8737->control_type);
if (ret != 0) {
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
return ret;
}
for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
wm8737->supplies[i].supply = wm8737_supply_names[i];
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8737->supplies),
wm8737->supplies);
if (ret != 0) {
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
return ret;
}
ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
wm8737->supplies);
if (ret != 0) {
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
goto err_get;
}
ret = wm8737_reset(codec);
if (ret < 0) {
dev_err(codec->dev, "Failed to issue reset\n");
goto err_enable;
}
snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
WM8737_LVU);
snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
WM8737_RVU);
wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
/* Bias level configuration will have done an extra enable */
regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
snd_soc_add_codec_controls(codec, wm8737_snd_controls,
ARRAY_SIZE(wm8737_snd_controls));
wm8737_add_widgets(codec);
return 0;
err_enable:
regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
err_get:
regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
return ret;
}
static int max98925_add_widgets(struct snd_soc_codec *codec)
{
int ret;
ret = snd_soc_add_codec_controls(codec, max98925_snd_controls,
ARRAY_SIZE(max98925_snd_controls));
return 0;
}
static int ad193x_codec_probe(struct snd_soc_codec *codec)
{
struct ad193x_priv *ad193x = snd_soc_codec_get_drvdata(codec);
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
int num, ret;
/* default setting for ad193x */
/* unmute dac channels */
regmap_write(ad193x->regmap, AD193X_DAC_CHNL_MUTE, 0x0);
/* de-emphasis: 48kHz, powedown dac */
regmap_write(ad193x->regmap, AD193X_DAC_CTRL2, 0x1A);
/* dac in tdm mode */
regmap_write(ad193x->regmap, AD193X_DAC_CTRL0, 0x40);
/* adc only */
if (ad193x_has_adc(ad193x)) {
/* high-pass filter enable */
regmap_write(ad193x->regmap, AD193X_ADC_CTRL0, 0x3);
/* sata delay=1, adc aux mode */
regmap_write(ad193x->regmap, AD193X_ADC_CTRL1, 0x43);
}
/* pll input: mclki/xi */
regmap_write(ad193x->regmap, AD193X_PLL_CLK_CTRL0, 0x99); /* mclk=24.576Mhz: 0x9D; mclk=12.288Mhz: 0x99 */
regmap_write(ad193x->regmap, AD193X_PLL_CLK_CTRL1, 0x04);
/* adc only */
if (ad193x_has_adc(ad193x)) {
/* add adc controls */
num = ARRAY_SIZE(ad193x_adc_snd_controls);
ret = snd_soc_add_codec_controls(codec,
ad193x_adc_snd_controls,
num);
if (ret)
return ret;
/* add adc widgets */
num = ARRAY_SIZE(ad193x_adc_widgets);
ret = snd_soc_dapm_new_controls(dapm,
ad193x_adc_widgets,
num);
if (ret)
return ret;
/* add adc routes */
num = ARRAY_SIZE(ad193x_adc_audio_paths);
ret = snd_soc_dapm_add_routes(dapm,
ad193x_adc_audio_paths,
num);
if (ret)
return ret;
}
return 0;
}
static int aic32x4_probe(struct snd_soc_codec *codec)
{
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
u32 tmp_reg;
if (aic32x4->control_type == SND_SOC_SPI)
codec->hw_write = (hw_write_t) spi_write;
else
codec->hw_write = (hw_write_t) i2c_master_send;
codec->control_data = aic32x4->control_data;
snd_soc_write(codec, AIC32X4_RESET, 0x01);
/* Power platform configuration */
if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) {
snd_soc_write(codec, AIC32X4_MICBIAS, AIC32X4_MICBIAS_LDOIN |
AIC32X4_MICBIAS_2075V);
}
if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE) {
snd_soc_write(codec, AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE);
}
tmp_reg = (aic32x4->power_cfg & AIC32X4_PWR_AIC32X4_LDO_ENABLE) ?
AIC32X4_LDOCTLEN : 0;
snd_soc_write(codec, AIC32X4_LDOCTL, tmp_reg);
tmp_reg = snd_soc_read(codec, AIC32X4_CMMODE);
if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36) {
tmp_reg |= AIC32X4_LDOIN_18_36;
}
if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED) {
tmp_reg |= AIC32X4_LDOIN2HP;
}
snd_soc_write(codec, AIC32X4_CMMODE, tmp_reg);
/* Do DACs need to be swapped? */
if (aic32x4->swapdacs) {
snd_soc_write(codec, AIC32X4_DACSETUP, AIC32X4_LDAC2RCHN | AIC32X4_RDAC2LCHN);
} else {
snd_soc_write(codec, AIC32X4_DACSETUP, AIC32X4_LDAC2LCHN | AIC32X4_RDAC2RCHN);
}
/* Mic PGA routing */
if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) {
snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K);
}
if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) {
snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K);
}
aic32x4_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
snd_soc_add_codec_controls(codec, aic32x4_snd_controls,
ARRAY_SIZE(aic32x4_snd_controls));
aic32x4_add_widgets(codec);
return 0;
}
static int wm8961_probe(struct snd_soc_codec *codec)
{
struct snd_soc_dapm_context *dapm = &codec->dapm;
int ret = 0;
u16 reg;
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
if (ret != 0) {
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
return ret;
}
/* Enable class W */
reg = snd_soc_read(codec, WM8961_CHARGE_PUMP_B);
reg |= WM8961_CP_DYN_PWR_MASK;
snd_soc_write(codec, WM8961_CHARGE_PUMP_B, reg);
/* Latch volume update bits (right channel only, we always
* write both out) and default ZC on. */
reg = snd_soc_read(codec, WM8961_ROUT1_VOLUME);
snd_soc_write(codec, WM8961_ROUT1_VOLUME,
reg | WM8961_LO1ZC | WM8961_OUT1VU);
snd_soc_write(codec, WM8961_LOUT1_VOLUME, reg | WM8961_LO1ZC);
reg = snd_soc_read(codec, WM8961_ROUT2_VOLUME);
snd_soc_write(codec, WM8961_ROUT2_VOLUME,
reg | WM8961_SPKRZC | WM8961_SPKVU);
snd_soc_write(codec, WM8961_LOUT2_VOLUME, reg | WM8961_SPKLZC);
reg = snd_soc_read(codec, WM8961_RIGHT_ADC_VOLUME);
snd_soc_write(codec, WM8961_RIGHT_ADC_VOLUME, reg | WM8961_ADCVU);
reg = snd_soc_read(codec, WM8961_RIGHT_INPUT_VOLUME);
snd_soc_write(codec, WM8961_RIGHT_INPUT_VOLUME, reg | WM8961_IPVU);
/* Use soft mute by default */
reg = snd_soc_read(codec, WM8961_ADC_DAC_CONTROL_2);
reg |= WM8961_DACSMM;
snd_soc_write(codec, WM8961_ADC_DAC_CONTROL_2, reg);
/* Use automatic clocking mode by default; for now this is all
* we support.
*/
reg = snd_soc_read(codec, WM8961_CLOCKING_3);
reg &= ~WM8961_MANUAL_MODE;
snd_soc_write(codec, WM8961_CLOCKING_3, reg);
wm8961_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
snd_soc_add_codec_controls(codec, wm8961_snd_controls,
ARRAY_SIZE(wm8961_snd_controls));
snd_soc_dapm_new_controls(dapm, wm8961_dapm_widgets,
ARRAY_SIZE(wm8961_dapm_widgets));
snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
return 0;
}
static int i2s_dai_init(struct snd_soc_pcm_runtime *rtd)
{
int err;
struct snd_soc_codec *codec = rtd->codec;
err = snd_soc_add_codec_controls(codec, b2_snd_controls,
ARRAY_SIZE(b2_snd_controls));
if (err < 0)
return err;
return 0;
}
static int wm8960_probe(struct snd_soc_codec *codec)
{
struct wm8960_data *pdata = dev_get_platdata(codec->dev);
int ret = 0;
snd_soc_add_codec_controls(codec, wm8960_snd_controls,
ARRAY_SIZE(wm8960_snd_controls));
return 0;
}
static int max98504_add_widgets(struct snd_soc_codec *codec)
{
//struct max98504_priv *max98504 = snd_soc_codec_get_drvdata(codec);
msg_maxim("\n");
snd_soc_add_codec_controls(codec, max98504_snd_controls,
ARRAY_SIZE(max98504_snd_controls));
return 0;
}
static int aic31xx_add_controls(struct snd_soc_codec *codec)
{
int err = 0;
struct aic31xx_priv *aic31xx = snd_soc_codec_get_drvdata(codec);
if (aic31xx->pdata.codec_type == AIC311X) {
err = snd_soc_add_codec_controls(
codec, aic311x_snd_controls,
ARRAY_SIZE(aic311x_snd_controls));
if (err < 0)
dev_dbg(codec->dev, "Invalid control\n");
} else if (aic31xx->pdata.codec_type == AIC310X) {
err = snd_soc_add_codec_controls(
codec, aic310x_snd_controls,
ARRAY_SIZE(aic310x_snd_controls));
if (err < 0)
dev_dbg(codec->dev, "Invalid Control\n");
}
return 0;
}
static int msm_audrx_init(struct snd_soc_pcm_runtime *rtd)
{
int err;
struct snd_soc_codec *codec = rtd->codec;
struct snd_soc_dapm_context *dapm = &codec->dapm;
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
pr_info("%s(), dev_name%s\n", __func__, dev_name(cpu_dai->dev));
if (machine_is_msm8960_liquid()) {
top_spk_pamp_gpio = (PM8921_GPIO_PM_TO_SYS(19));
bottom_spk_pamp_gpio = (PM8921_GPIO_PM_TO_SYS(18));
}
rtd->pmdown_time = 0;
err = snd_soc_add_codec_controls(codec, msm_snd_controls,
ARRAY_SIZE(msm_snd_controls));
if (err < 0)
return err;
snd_soc_dapm_new_controls(dapm, msm_dapm_widgets,
ARRAY_SIZE(msm_dapm_widgets));
snd_soc_dapm_add_routes(dapm, common_audio_map,
ARRAY_SIZE(common_audio_map));
snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Pos");
snd_soc_dapm_enable_pin(dapm, "Ext Spk Bottom Neg");
snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Pos");
snd_soc_dapm_enable_pin(dapm, "Ext Spk Top Neg");
snd_soc_dapm_sync(dapm);
err = snd_soc_jack_new(codec, "Headset Jack",
(SND_JACK_HEADSET | SND_JACK_OC_HPHL |
SND_JACK_OC_HPHR | SND_JACK_UNSUPPORTED),
&hs_jack);
if (err) {
pr_err("failed to create new jack\n");
return err;
}
err = snd_soc_jack_new(codec, "Button Jack",
TAIKO_JACK_BUTTON_MASK, &button_jack);
if (err) {
pr_err("failed to create new jack\n");
return err;
}
return err;
}
static int pm805_probe(struct snd_soc_codec *codec)
{
struct pm805_priv *pm805 = snd_soc_codec_get_drvdata(codec);
struct pm80x_chip *chip = pm805->chip;
pm805->codec = codec;
codec->control_data = chip;
/* add below snd ctls to keep align with audio server */
snd_soc_add_codec_controls(codec, pm805_audio_controls,
ARRAY_SIZE(pm805_audio_controls));
return 0;
}
